CN217156778U - Socket and test system - Google Patents
Socket and test system Download PDFInfo
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- CN217156778U CN217156778U CN202121177111.1U CN202121177111U CN217156778U CN 217156778 U CN217156778 U CN 217156778U CN 202121177111 U CN202121177111 U CN 202121177111U CN 217156778 U CN217156778 U CN 217156778U
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Abstract
The application discloses a socket, which comprises a metal jack and a signal conversion chip, wherein the signal conversion chip is connected with an upper computer through a non-low level signal line; the non-low level signal line is connected with the metal jack, when the tested device is inserted into the metal jack, the non-low level signal line is connected to the ground wire of the tested device through the metal jack and the tested device, so that the upper computer can start to test the tested device after detecting that the non-low level signal line is in a low level state; by using the socket, the test can be started without manual control, so that the operation steps are reduced, and the efficiency is improved.
Description
Technical Field
The application relates to the technical field of automatic testing, in particular to a socket and a testing system.
Background
The upper computer usually adopts a fixed type communication interface to communicate with other electronic equipment, and when testing is carried out, the tested equipment is also tested through the electronic equipment. When the communication protocol adopted by the tested device and the upper computer is the same, the upper computer can detect the event accessed by the tested device so as to start the test. However, if the two communication protocols are different, the switching needs to be performed by using the signal conversion chip, in this case, the upper computer cannot sense whether the device to be tested is connected, and the upper computer needs to be manually operated to start the test, which increases the operation steps in the test process and reduces the production efficiency.
Disclosure of Invention
In view of this, an object of the present application is to provide a socket and a test system, which can start a test without manual control, reduce operation steps, and improve efficiency.
In order to solve the technical problem, the application provides a socket, which comprises a metal jack and a signal conversion chip, wherein the signal conversion chip is connected with an upper computer through a non-low level signal line;
the non-low level signal line is connected with the metal jack, and when the tested device is inserted into the metal jack, the non-low level signal line is connected to the ground wire of the tested device through the metal jack and the tested device, so that the upper computer starts to test the tested device after detecting that the non-low level signal line is in a low level state.
Optionally, the metal plug housing of the device under test is connected to the ground wire, and when the metal plug housing is inserted into the metal jack, the metal jack is connected to the ground wire through the metal plug housing.
Optionally, the signal conversion chip is a USB signal and serial port signal conversion chip.
Optionally, the signal conversion chip is connected with the metal socket and the upper computer through a test signal line.
Optionally, the test signal line includes an input signal line and an output signal line.
Optionally, the number of the metal sockets and the number of the non-low level signal lines are multiple, and each metal socket corresponds to each non-low level signal line one to one.
Optionally, the number of the metal jack and the non-low level signal line is one.
Optionally, the non-low level signal line is a floating signal line.
Optionally, the non-low level signal line is a high level signal line.
The application also provides a test system which comprises an upper computer, tested equipment and the socket, wherein a signal conversion chip of the socket is connected with the upper computer through a non-low level signal line, and the non-low level signal line is connected with a metal socket of the socket;
when the tested device is inserted into the metal jack, the non-low level signal line is connected to the ground wire of the tested device through the metal jack and the tested device, so that the upper computer starts to test the tested device after detecting that the non-low level signal line is in a low level state.
The socket comprises a metal jack and a signal conversion chip, wherein the signal conversion chip is connected with an upper computer through a non-low level signal line; the non-low level signal line is connected with the metal jack, and when the tested device is inserted into the metal jack, the non-low level signal line is connected to the ground wire of the tested device through the metal jack and the tested device, so that the upper computer can start to test the tested device after detecting that the non-low level signal line is in a low level state.
It can be seen that the signal conversion chip in the socket has a non-low level signal line, the signal line connects the upper computer with the metal jack of the socket, and the signal line is in a non-low level state when the jack is not plugged into the device under test. When the tested device is inserted into the metal jack on the socket, the jack is in contact with the tested device, and the tested device is connected with the ground wire, so that the non-low-level signal wire is connected with the ground wire and is converted into a low-level state, and after the upper computer detects that the upper computer is in the low-level state, the tested device can be determined to be connected, and therefore the test can be started. By using the socket, the test can be started without manual control, so that the operation steps are reduced, and the efficiency is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or related technologies of the present application, the drawings needed to be used in the description of the embodiments or related technologies are briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a test system according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of a specific test system according to an embodiment of the present disclosure;
fig. 3 is a schematic diagram of a specific socket structure according to an embodiment of the present disclosure.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a test system according to an embodiment of the present disclosure. The device comprises an upper computer 10, a socket 11 and a device to be tested 12. The socket 11 includes a metal jack and a signal conversion chip, and the signal conversion chip is connected to the upper computer through a non-low level signal line. The non-low level signal line means a signal line which is not at a low level when not connected to a ground line in a normal condition. In addition, the non-low level signal line is also connected with the metal jack, when the tested device is inserted into the metal jack, the non-low level signal line can be connected to the tested device through the metal jack and further connected with the ground wire of the tested device, and the non-low level signal line is inevitably converted into a low level state after being connected with the bottom wire. The upper computer can start to test the tested equipment after detecting that the non-low level signal line is in a low level state, and the process and the mode of the trigger test and the specific test process and the mode are not limited in this embodiment, and the prior art can be referred to. In addition, when the tested device is pulled out of the metal socket and the connection with the socket is disconnected, the non-low level signal line is no longer in a grounding state, and the non-low level state is recovered, and at the moment, the upper computer can stop testing the tested device.
For how the non-low level signal line is connected to the ground of the device under test through the metal jack, in one possible embodiment, a plug on the device under test is plugged into the metal jack to make connection with the socket. The plug of the device under test has a metal plug housing which is connected to ground. When the plug is inserted into the metal jack, the metal plug shell is also inserted into the metal jack, the metal jack and the metal jack are connected, and the metal jack can be connected with the ground wire through the metal plug shell. And the non-low level signal line is connected to the metal jack such that the non-low level signal line is connected to the ground line.
In another possible embodiment, the device under test has a metallic device housing, which is connected to ground. The tested device is connected with the metal socket through the plug, and the plug can be completely inserted into the metal socket. When the plug is inserted into the metal jack, the metal jack can be contacted with the metal equipment shell of the tested equipment, and at the moment, the non-low level signal line can be communicated with the ground wire through the metal jack and the metal equipment shell.
The embodiment of the application does not limit the specific type of the signal conversion chip, and the signal conversion chip can be a chip of any type and used for converting any signal, for example, the signal conversion chip can be a USB signal and serial signal conversion chip, that is, a chip used for converting between a USB signal and a serial signal, and the specific type of the chip is not limited. In this case, the upper computer may be a general computer or a server, and the device to be tested is specifically a device using a serial signal.
Because the host computer need link to each other with equipment under test through the socket, be used for testing equipment under test simultaneously, consequently still include the test signal line in the socket, and this test signal line links to each other with host computer and metal socket. When the tested device is inserted into the metal socket, the upper computer can be connected with the tested device through the test signal wire, so that the tested device is tested, and the specific test mode can refer to the related technology.
In one possible embodiment, the number of test signal lines is one, and in other embodiments, the number of test signal lines may be multiple, each of which may have a different role. For example, in one specific embodiment, the test signal line includes an input signal line and an output signal line for transmitting data to the device under test and for receiving data fed back by the device under test, respectively. For how the upper computer sends data and how the device under test feeds back data, the prior art can be referred to.
It will be appreciated that the number of metal jacks in the jack may be one, in which case the number of non-low level signal lines is also one. In another embodiment, the number of the metal sockets in the socket may be multiple, in this case, multiple non-low level signal lines are required, each non-low level signal line is connected to the upper computer, but different non-low level signal lines are connected to different metal sockets, that is, each metal socket corresponds to each non-low level signal line one by one. By corresponding the metal sockets to the non-low level signal lines one by one, the upper computer can judge whether the tested equipment is inserted into each metal socket or not by detecting the state of each non-low level signal line, and test the tested equipment by testing the signal lines after detecting that the tested equipment is inserted.
The non-low level signal line may be any signal line that is not in a low level state under normal conditions, and in one embodiment, is specifically a high level signal line; in another embodiment, it may be a floating signal line.
By applying the socket provided by the embodiment of the application, the signal conversion chip in the socket is provided with the non-low level signal line, the signal line connects the upper computer with the metal jack of the socket, and the signal line is in a non-low level state when the jack is not inserted into the tested device. When the tested device is inserted into the metal jack on the socket, the jack is in contact with the tested device, and the tested device is connected with the ground wire, so that the non-low-level signal wire is connected with the ground wire and is converted into a low-level state, and after the upper computer detects that the upper computer is in the low-level state, the tested device can be determined to be connected, and therefore the test can be started. By using the socket, the test can be started without manual control, so that the operation steps are reduced, and the efficiency is improved.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a specific test system according to an embodiment of the present disclosure. The serial port communication board interface A is an interface used for being connected with an upper computer on the signal conversion chip and is provided with a non-low level signal line DSR. The communication adapter plate jack B is a metal jack in the socket, and the DSR signal wire is connected with a metal shell of the communication adapter plate jack. The socket C of the device under test is a plug on the device under test for connecting to a metal socket, and a metal housing of the plug (i.e. a socket metal housing of the device under test) is connected to the ground GND of the device under test. Therefore, after the socket C of the device under test is inserted into the socket B of the communication patch panel, the ground GND of the device under test is connected to the DSR signal line along the path of the metal shell of the socket C of the device under test-the metal shell of the socket B of the communication patch panel, and at this time, a virtual path between GND in the interface a of the serial communication panel in fig. 2 and GND in the socket B of the communication patch panel and GND between the sockets C of the device under test is constructed. The upper computer detects that the DSR signal line is converted into a low level state and then starts to test the tested equipment, and specifically, the three interfaces or the sockets are respectively provided with an input signal line TX and an output signal line RX which are used for receiving and sending data.
Referring to fig. 3, fig. 3 is a schematic diagram of a specific socket structure according to an embodiment of the present disclosure. As shown in fig. 3, the socket includes a USB to serial port board and a USB socket base board on which USB sockets are provided. The USB-to-serial port board is a USB signal and serial port signal conversion chip, is connected with an upper computer by using a non-low level signal line, and is connected with the USB socket bottom board by using a serial port signal line. The USB socket bottom plate is used for providing a USB socket, and the USB socket is the metal socket.
Finally, it should also be noted that, herein, relationships such as first and second, etc., are intended only to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms include, or any other variation is intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
The principle and the implementation of the present application are explained herein by applying specific examples, and the above description of the embodiments is only used to help understand the method and the core idea of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. A socket is characterized by comprising a metal jack and a signal conversion chip, wherein the signal conversion chip is connected with an upper computer through a non-low level signal line;
the non-low level signal line is connected with the metal jack, and when the tested device is inserted into the metal jack, the non-low level signal line is connected to the ground wire of the tested device through the metal jack and the tested device, so that the upper computer starts to test the tested device after detecting that the non-low level signal line is in a low level state.
2. The socket of claim 1, wherein said device under test's metal plug housing is connected to said ground, said metal jack being connected to said ground through said metal plug housing when said metal plug housing is inserted into said metal jack.
3. The socket of claim 1, wherein the signal conversion chip is a USB signal and serial signal conversion chip.
4. The socket of claim 1, wherein the signal conversion chip is connected to the metal jack and the upper computer through a test signal line.
5. The receptacle of claim 4, wherein the test signal lines include input signal lines and output signal lines.
6. The socket of claim 1, wherein the number of the metal sockets and the non-low level signal lines is plural, and each metal socket corresponds to each non-low level signal line one by one.
7. The receptacle of claim 1, wherein the number of said metal jacks and said non-low level signal lines is one.
8. The receptacle of claim 1, wherein the non-low level signal line is a floating signal line.
9. The receptacle of claim 1, wherein the non-low level signal line is a high level signal line.
10. A test system, comprising an upper computer, a device under test and a socket according to any one of claims 1 to 9, wherein a signal conversion chip of the socket is connected with the upper computer through a non-low level signal line, and the non-low level signal line is connected with a metal jack of the socket;
when the tested device is inserted into the metal jack, the non-low level signal line is connected to the ground wire of the tested device through the metal jack and the tested device, so that the upper computer starts to test the tested device after detecting that the non-low level signal line is in a low level state.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121177111.1U CN217156778U (en) | 2021-05-28 | 2021-05-28 | Socket and test system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121177111.1U CN217156778U (en) | 2021-05-28 | 2021-05-28 | Socket and test system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN217156778U true CN217156778U (en) | 2022-08-09 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202121177111.1U Active CN217156778U (en) | 2021-05-28 | 2021-05-28 | Socket and test system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN217156778U (en) |
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2021
- 2021-05-28 CN CN202121177111.1U patent/CN217156778U/en active Active
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