CN216303266U - Airtight packaging structure of device with cavity - Google Patents
Airtight packaging structure of device with cavity Download PDFInfo
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- CN216303266U CN216303266U CN202122446019.7U CN202122446019U CN216303266U CN 216303266 U CN216303266 U CN 216303266U CN 202122446019 U CN202122446019 U CN 202122446019U CN 216303266 U CN216303266 U CN 216303266U
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Abstract
The utility model provides an airtight packaging structure with a cavity device, which comprises: a semiconductor component; a cover plate; a bonding layer between the semiconductor component and the cover plate; a first cavity located between the semiconductor component and the cover plate and partially sealed; a second cavity located between the semiconductor component and the cover plate and partially sealed; the first through holes penetrate through the cover plate to the first cavity; the second through holes penetrate through the cover plate to the second cavity; the first sealing layer is arranged on one side surface, far away from the semiconductor component, of the cover plate so as to seal the plurality of first through holes; the second sealing layer is arranged on one side surface, far away from the cover plate, of the first sealing layer so as to seal the second through holes. Compared with the prior art, the utility model can provide higher vacuum degree for the device with the cavity, and the uniformity of air pressure of different chips is good, thereby improving the performance of the device with the cavity and improving the yield.
Description
[ technical field ] A method for producing a semiconductor device
The utility model belongs to the field of Micro-Electro-Mechanical System (MEMS) devices, and particularly relates to an airtight packaging structure with a cavity device, which can package MEMS with different working air pressure requirements and/or different gas composition requirements on the same wafer.
[ background of the utility model ]
The movable structures of micro inertial sensors each require a cavity to provide a movable space, and the cavity is usually formed by bonding two or more wafers during the manufacturing process. An existing consumer-grade Inertial Measurement Unit (IMU) processes and manufactures an accelerometer and a gyroscope on the same wafer, but the requirements of the accelerometer and the gyroscope on packaging air pressure are different, the packaging air pressure required by the gyroscope is lower than that of the accelerometer, and how to realize packaging of double cavities with different air pressures is a difficulty in process manufacturing.
[ Utility model ] content
One objective of the present invention is to provide an airtight package structure with a cavity device, which can provide a higher vacuum degree (extremely low air pressure) for the cavity device, and has good uniformity of air pressure of different chips, thereby improving the performance of the cavity device and improving the yield.
According to an aspect of the present invention, there is provided a hermetic package structure with a cavity device, comprising: a semiconductor component; a cover plate; a bonding layer between the semiconductor component and the cover plate to bond the semiconductor component and the cover plate together; a first cavity located between the semiconductor component and a cover plate and surrounded by and partially sealed by the bonding layer; a second cavity between the semiconductor component and the cover plate, the second cavity being located on one side of the first cavity, the second cavity being surrounded by the bonding layer and partially sealed; the first through holes penetrate through the cover plate to the first cavity; the second through holes penetrate through the cover plate to the second cavity; the first sealing layer is arranged on one side surface, far away from the semiconductor component, of the cover plate so as to seal the plurality of first through holes, so that the first cavity is completely sealed; and the second sealing layer is arranged on one side surface of the first sealing layer, which is far away from the cover plate, so as to seal the plurality of second through holes, and the second cavity is completely sealed.
Compared with the prior art, the utility model adopts a bulk silicon process to manufacture the airtight packaging structure with the cavity device, the cover plate of the airtight packaging structure is etched with a through hole penetrating through the cover plate, a first cavity accommodating a first micro-electro-mechanical system device and a second cavity accommodating a second micro-electro-mechanical system device are obtained by bonding, then two layers of sealing layers are sequentially covered on the cover plate, and the first layer of sealing layer is used for sealing the through hole communicated with the first cavity so as to completely seal the first cavity; the second layer of sealing layer is used for sealing the through hole communicated with the second cavity so as to completely seal the second cavity. Therefore, the utility model can provide higher vacuum degree (extremely low air pressure) for the device with the cavity, and the uniformity of the air pressure of different chips is good, thereby improving the performance of the device with the cavity and improving the yield.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts. Wherein:
FIG. 1 is a flow chart of a method of fabricating a hermetically sealed package structure with a cavity device in accordance with the present invention in one embodiment;
fig. 2 is a partial longitudinal cross-sectional view of a semiconductor component 200 provided in one embodiment of the present invention;
FIG. 3 is a partial longitudinal cross-sectional view of a cover plate 300 provided in an embodiment of the present invention;
FIG. 4 is a partial longitudinal cross-sectional view of a bonded structure formed after bonding the semiconductor component shown in FIG. 2 and the lid shown in FIG. 3 in one embodiment of the present invention;
FIG. 5 is a partial longitudinal cross-sectional view of a hermetic package structure formed after depositing a first sealant layer on the bonded structure shown in FIG. 4 in one embodiment of the present invention;
FIG. 6 is a partial longitudinal cross-sectional view of the hermetic package structure formed after depositing a second sealing layer on the hermetic package structure shown in FIG. 5 according to an embodiment of the present invention;
fig. 7 is a partial longitudinal cross-sectional view of a hermetic package with a cavity device according to an embodiment of the present invention.
[ detailed description ] embodiments
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
Reference herein to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic may be included in at least one implementation of the utility model. The appearances of the phrase "in one embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Unless otherwise specified, the terms connected, and connected as used herein mean electrically connected, directly or indirectly.
Fig. 1 is a flow chart of a method for manufacturing a hermetic package structure with a cavity device according to an embodiment of the present invention. The manufacturing method includes the following steps.
In the embodiment shown in fig. 2, the semiconductor component 200 comprises: a first surface 210, a second surface 220 opposite the first surface 210, a first MEMS device 230, and a second MEMS device 240. Wherein the first and second mems devices 230 and 240 are located on the first surface 210 of the semiconductor component 200 and spaced apart along the first surface 210 of the semiconductor component 200.
The first MEMS device 230 and the second MEMS device 240 may be different types of devices that require different working gas pressures and/or different working gas compositions, such as the first MEMS device 230 being a gyroscope and the second MEMS device 240 being an accelerometer, or vice versa.
In the embodiment shown in fig. 3, the cover plate 300 includes a first surface 310, a second surface 320 opposite to the first surface 310, a first groove 330 and a second groove 340, and a plurality of first through holes 350 and a plurality of second through holes 360. The first grooves 330 and the second grooves 340 are formed on the first surface 310 of the cover plate 300 and are arranged at intervals along the first surface 310 of the cover plate 300; the first through hole 350 penetrates the cover plate 300 from the second surface 320 of the cover plate 300 to the first groove 330; the second through holes 360 penetrate the cover plate 300 from the second surface 320 of the cover plate 300 to the second grooves 340, and the plurality of first through holes 350 and the plurality of second through holes 360 are arranged at intervals along the second surface 320 of the cover plate 300. In one embodiment, the first and second grooves 330 and 340 may be obtained by dry or wet etching; the cover plate 300 may be a silicon wafer or glass.
The semiconductor part 200 and the cap plate 300 may be bonded using adhesive/anodic bonding, metal bonding, hybrid metal/polymer wafer bonding, and the like. When the semiconductor component 200 and the cover plate 300 are bonded together, the first recess 330 engages with the first surface 210 of the semiconductor component 200 in (or around) the area where the first mems device 230 is located to form a first cavity a, in which the first mems device 230 is received; the second recess 340 is engaged with the first surface 210 of the semiconductor component 200 in (or around) the area where the second mems device 240 is located to form a second cavity B, and the second mems device 240 is received in the second cavity B. That is, when the semiconductor component 200 and the cover plate 300 are bonded together, the first mems device 230 is located in the first cavity a, the second mems device 240 is located in the second cavity B, and after bonding, the first cavity a is still communicated with the outside through a plurality of first through holes 350, and the first through holes 350 are used to adjust the gas pressure and gas composition of the first cavity a; the second chamber B is still communicated with the outside through a plurality of second through holes 360, and the second through holes 360 are used for adjusting the gas pressure and the gas composition of the second chamber B.
The gas pressure and the gas composition of the completely sealed first cavity a are adjusted by adjusting the gas pressure and the gas composition of the first sealing environment, for example, the gas pressure in the completely sealed first cavity a may be determined by the gas pressure of the first sealing environment when the first sealing layer 500 is deposited and other process parameters in the process.
The gas pressure and the gas composition of the second cavity B are adjusted by adjusting the gas pressure and the gas composition of the second encapsulation environment, for example, the gas pressure in the second cavity B after being completely sealed can be determined by the gas pressure of the second encapsulation environment when the second encapsulation layer 600 is deposited and other process parameters in the process.
The air pressure of the completely sealed first cavity a is greater than the air pressure of the completely sealed second cavity B, and may also be less than the air pressure of the completely sealed second cavity B, which may be determined by adjusting the air pressures of the first and second packaging environments. In one embodiment, the first MEMS device 230 in the lower air pressure cavity A may be a gyroscope and the second MEMS device 240 in the higher air pressure cavity B may be an accelerometer.
In the embodiment shown in fig. 5 and 6, the first sealing layer 500 is a first silicon oxide film, which can be formed by Plasma Enhanced Chemical Vapor Deposition (PECVD); the second sealing layer 600 is a second silicon oxide film, which can be formed by an APCVD (Atmospheric Pressure Chemical Vapor Deposition) process.
According to another aspect of the present invention, a hermetic package structure with a cavity device is provided.
Fig. 7 is a partial longitudinal cross-sectional view of a hermetic package with a cavity device according to an embodiment of the present invention. The hermetically sealed structure of the cavity-equipped device shown in fig. 7 includes a semiconductor component 200, a cover plate 300, a bonding layer 400, a first sealing layer 500, a second sealing layer 600, a first cavity a, and a second cavity B.
In the embodiment shown in fig. 7, the semiconductor component 200 includes: a first surface 210, a second surface 220 opposite the first surface 210, a first MEMS device 230, and a second MEMS device 240. Wherein the first and second mems devices 230 and 240 are located on the first surface 210 of the semiconductor component 200 and spaced apart along the first surface 210 of the semiconductor component 200.
The first MEMS device 230 and the second MEMS device 240 may be different types of devices that require different working gas pressures and/or different working gas compositions, such as the first MEMS device 230 being a gyroscope and the second MEMS device 240 being an accelerometer, or vice versa.
In the embodiment shown in fig. 7, the cap plate 300 includes a first surface 310, a second surface 320 opposite to the first surface 310, a first groove 330 and a second groove 340, and a plurality of first through holes 350 and a plurality of second through holes 360. The first grooves 330 and the second grooves 340 are formed on the first surface 310 of the cover plate 300 and are arranged at intervals along the first surface 310 of the cover plate 300; the first through hole 350 penetrates the cover plate 300 from the second surface 320 of the cover plate 300 to the first groove 330; the second through hole 360 penetrates the cover plate 300 from the second surface 320 of the cover plate 300 to the second groove 340; and the plurality of first through holes 350 and the plurality of second through holes 360 are arranged at intervals along the second surface 320 of the cap plate 300.
In the embodiment shown in fig. 7, the bonding layer 400 is located between the first surface 210 of the semiconductor component 200 and the first surface 310 of the cover plate 300 to bond the first surface 210 of the semiconductor component 200 and the first surface 310 of the cover plate 300 together. The bonding layer 400 is used for wafer bonding, and may be implemented by thin film deposition or the like. The first and second grooves 330 and 340 may be formed by dry or wet etching. The cover plate 300 may be a silicon wafer or glass. The first cavity a is located between the first surface 210 of the semiconductor component 200 and the first surface 310 of the cover plate 300, is completely surrounded by the bonding layer 220 to be partially sealed, and is communicated with the outside through the first through holes 350; the second cavity B is located between the first surface 210 of the semiconductor component 200 and the first surface 310 of the cover plate 300, and the second cavity B is located at one side of the first cavity a, the second cavity B is completely surrounded by the bonding layer 220 and is partially sealed (or the bonding layer 220 surrounds the first cavity a and the second cavity B, respectively), and the second cavity B is communicated with the outside through the second through holes 360.
The semiconductor part 200 and the cap plate 300 may be bonded using adhesive/anodic bonding, metal bonding, hybrid metal/polymer wafer bonding, and the like. The first recess 330 engages with the first surface 210 of the semiconductor component 200 in (or around) the area of the first mems device 230 to form a first cavity a, wherein the first mems device 230 is received; the second recess 340 is engaged with the first surface 210 of the semiconductor component 200 in (or around) the area where the second mems device 240 is located to form a second cavity B, and the second mems device 240 is received in the second cavity B. That is, when the semiconductor component 200 and the cover plate 300 are bonded together, the first mems device 230 is located in the first cavity a, the second mems device 240 is located in the second cavity B, and after bonding, the first cavity a is still communicated with the outside through a plurality of first through holes 350, and the first through holes 350 are used to adjust the gas pressure and gas composition of the first cavity a; the second chamber B is still communicated with the outside through a plurality of second through holes 360, and the second through holes 360 are used for adjusting the gas pressure and the gas composition of the second chamber B.
In the embodiment shown in fig. 7, a first sealing layer 500 is disposed on a surface of the cover plate 300 (i.e., the second surface 320 of the cover plate 300) away from the semiconductor component 200, to seal the first through holes 350, such that the first cavity a is completely sealed, the first sealing layer 500 is formed by deposition in a first packaging environment, it should be noted that the first sealing layer 500 seals the plurality of first through holes 350, thereby realizing the complete sealing of the first cavity A; the first sealing layer 500 does not seal the plurality of second through holes 360, the gas pressure and the gas composition of the completely sealed first cavity a are adjusted by adjusting the gas pressure and the gas composition of the first packaging environment, for example, the pressure in the first cavity a after complete sealing may be determined by the pressure of the first packaging environment when the first sealing layer 500 is deposited and other process parameters in the process.
In the embodiment shown in fig. 7, a second sealant 600 is disposed on a side surface of the first sealant 500 away from the cover plate 300 to seal the second through holes 360, so that the second cavity B is completely sealed. The second encapsulant layer 600 is formed by deposition in a second encapsulation environment. The gas pressure and the gas composition of the second cavity B are adjusted by adjusting the gas pressure and the gas composition of the second encapsulation environment, for example, the gas pressure in the second cavity B after being completely sealed can be determined by the gas pressure of the second encapsulation environment when the second encapsulation layer 600 is deposited and other process parameters in the process.
The air pressure of the completely sealed first cavity a is greater than the air pressure of the completely sealed second cavity B, and may also be less than the air pressure of the completely sealed second cavity B, which may be determined by adjusting the air pressures of the first and second packaging environments. In one embodiment, the first MEMS device 230 in the lower air pressure cavity A may be a gyroscope and the second MEMS device 240 in the higher air pressure cavity B may be an accelerometer.
In the embodiment shown in fig. 7, the first sealing layer 500 is a first silicon oxide film, which may be formed by Plasma Enhanced Chemical Vapor Deposition (PECVD); the second sealing layer 600 is a second silicon oxide film, which can be formed by an APCVD (Atmospheric Pressure Chemical Vapor Deposition) process.
In summary, the utility model adopts a bulk silicon process to manufacture the airtight packaging structure with the cavity device. The hermetically sealed semiconductor component with cavity device 200; a cover plate 300; a bonding layer 400 located between the semiconductor component 200 and the cap plate 300 to bond the semiconductor component 200 and the cap plate 300 together; a first cavity a between the semiconductor component 200 and the cap plate 300, surrounded by the bonding layer 400 and partially sealed; a second cavity B between the semiconductor component 200 and the cap plate 300 and on one side of the first cavity a, the second cavity B being surrounded by the bonding layer 400 and partially sealed; a plurality of first through holes 350 penetrating the cover plate 300 to the first cavity a; a plurality of second through holes 360 penetrating the cover plate 300 to the second cavity B; a first sealing layer 500 disposed on a side surface of the cover plate 300 away from the semiconductor component 200 to seal the first through holes 350, so that the first cavity a is completely sealed; the second sealing layer 600 is disposed on a side surface of the first sealing layer 500 away from the cover plate 300 to seal the second through holes 360, so that the second cavity B is completely sealed. Therefore, the utility model can provide higher vacuum degree (extremely low air pressure) for the device with the cavity, and the uniformity of the air pressure of different chips is good, thereby improving the performance of the device with the cavity and improving the yield.
In the present invention, the terms "connected", "connecting", and the like mean electrical connections, and direct or indirect electrical connections unless otherwise specified.
The above description is only a preferred embodiment of the present invention, and the scope of the present invention is not limited to the above embodiment, but equivalent modifications or changes made by those skilled in the art according to the present disclosure should be included in the scope of the present invention as set forth in the appended claims.
Claims (7)
1. The utility model provides a take airtight packaging structure of cavity device which characterized in that, it includes:
a semiconductor component;
a cover plate;
a bonding layer between the semiconductor component and the cover plate to bond the semiconductor component and the cover plate together;
a first cavity located between the semiconductor component and a cover plate and surrounded by and partially sealed by the bonding layer;
a second cavity between the semiconductor component and the cover plate, the second cavity being located on one side of the first cavity, the second cavity being surrounded by the bonding layer and partially sealed;
the first through holes penetrate through the cover plate to the first cavity;
the second through holes penetrate through the cover plate to the second cavity;
the first sealing layer is arranged on one side surface, far away from the semiconductor component, of the cover plate so as to seal the plurality of first through holes, so that the first cavity is completely sealed;
and the second sealing layer is arranged on one side surface of the first sealing layer, which is far away from the cover plate, so as to seal the plurality of second through holes, and the second cavity is completely sealed.
2. The hermetic package structure with cavity device according to claim 1,
the gas pressure within the fully sealed first cavity is different from the gas pressure within the fully sealed second cavity; and/or
The composition of the gas within the first fully sealed cavity is different from the composition of the gas within the second fully sealed cavity; and/or
A first microelectromechanical system device within the first cavity is different from a second microelectromechanical system device within the second cavity.
3. The hermetic package structure with cavity device according to claim 1,
the cover plate further comprises a first groove and a second groove which are formed on the first surface of the cover plate, and the first groove and the second groove are arranged at intervals along the first surface of the cover plate;
the semiconductor component further includes first and second MEMS devices located at the first surface of the semiconductor component, the first and second MEMS devices spaced apart along the first surface of the semiconductor component;
the first groove is buckled with a first surface of the semiconductor component in the area where the first micro-electro-mechanical system device is located to form a first cavity, and the first micro-electro-mechanical system device is contained in the first cavity; the second groove is buckled with the first surface of the semiconductor component in the area where the second micro-electro-mechanical system device is located to form a second cavity, and the second micro-electro-mechanical system device is contained in the second cavity.
4. The hermetic package structure with cavity device according to claim 3,
the first micro-electro-mechanical system device accommodated in the first cavity is a gyroscope;
the second micro-electro-mechanical system device contained in the second cavity is an accelerometer.
5. The hermetic package structure with cavity device according to any one of claims 1 to 4,
the first sealing layer is deposited on the cover plate under a first packaging environment and is used for sealing the first through holes so as to completely seal the first cavity;
the second sealing layer is deposited on the first sealing layer under a second packaging environment and is used for sealing the second through holes so as to completely seal the second cavity;
adjusting the gas pressure and gas composition of the fully sealed first cavity by adjusting the gas pressure and gas composition of the first packaging environment; adjusting the gas pressure and gas composition of the second cavity, which is completely sealed, by adjusting the gas pressure and gas composition of the second package environment.
6. The hermetic package structure with cavity device according to claim 5,
the first sealing layer is a first silicon oxide film;
the second sealing layer is a second silicon dioxide film.
7. The hermetic package structure with cavity device according to claim 6,
forming a first silicon oxide film by adopting a plasma enhanced chemical vapor deposition method;
and forming a second silicon dioxide film by adopting an atmospheric pressure chemical vapor deposition process.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202122446019.7U CN216303266U (en) | 2021-10-09 | 2021-10-09 | Airtight packaging structure of device with cavity |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202122446019.7U CN216303266U (en) | 2021-10-09 | 2021-10-09 | Airtight packaging structure of device with cavity |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113830724A (en) * | 2021-10-09 | 2021-12-24 | 美新半导体（无锡）有限公司 | Airtight packaging structure of device with cavity and manufacturing method |
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- 2021-10-09 CN CN202122446019.7U patent/CN216303266U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113830724A (en) * | 2021-10-09 | 2021-12-24 | 美新半导体（无锡）有限公司 | Airtight packaging structure of device with cavity and manufacturing method |
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