CN211577949U - Expansion device of semiconductor test equipment and system using same - Google Patents

Expansion device of semiconductor test equipment and system using same Download PDF

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CN211577949U
CN211577949U CN201921615165.4U CN201921615165U CN211577949U CN 211577949 U CN211577949 U CN 211577949U CN 201921615165 U CN201921615165 U CN 201921615165U CN 211577949 U CN211577949 U CN 211577949U
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image
semiconductor test
output terminal
test equipment
electronic component
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CN201921615165.4U
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杨维平
颜宝泉
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Intel Products Chengdu Co Ltd
Intel Corp
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Intel Products Chengdu Co Ltd
Intel Corp
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Abstract

There is provided an extension apparatus of a semiconductor test device, including: a dispenser including an input terminal connected to an image capture device and for receiving an image of an electronic component tested by the semiconductor test equipment from the image capture device, and a first output terminal for outputting the received image; an image memory connected to the first output terminal for storing the image output from the first output terminal; and an evaluation device connected with the image memory for generating a score for each stored image, the score indicating whether the electronic component in the corresponding one image has a defect. The extension device is capable of being connected to existing semiconductor test equipment to provide an improvement over existing semiconductor test equipment.

Description

Expansion device of semiconductor test equipment and system using same
Technical Field
The present application relates to the field of electronic component manufacturing, and more particularly, to an apparatus for testing electronic components.
Background
Surface defects of electronic parts such as semiconductor chips can cause problems of yield reduction, performance deterioration, and the like of semiconductor devices. Therefore, it is necessary to detect defects on the semiconductor chip in time. Such inspection is typically done by semiconductor test equipment on the basis of captured images of the semiconductor chip.
Typical existing semiconductor test equipment selectively stores captured images for defect detection according to predetermined rules. For example, during the production of a batch of semiconductor chips, a camera may constantly take a large number of images, one or more of which may be generated for each individual chip. Then, only the image at a predetermined node is stored, for example, one image is stored after every 10 chips are produced. Typically less than 10% of the image is stored, while some semiconductor test equipment stores even only around 3% of the image. The detection of defects is performed manually by observing a small number of stored images. Storing only a partial image and manually observing the stored partial image may reduce the chance of detecting defects early.
Some of the current new semiconductor test apparatuses have a capability of storing 100% images, and a user can observe and detect defects based on the stored 100% images to avoid missing early images that can embody defects, thereby achieving early detection. But this is certainly time consuming and laborious. In addition, for a user who already owns an old type semiconductor test device storing only a partial image, the inspection cost of the user is increased whether to repurchase the new type semiconductor test device or to request a vendor of the test device to perform hardware and software upgrade modification on the old type semiconductor test device that he already owns.
Disclosure of Invention
It is desirable to provide an electronic component inspection system that is low cost, efficient, and capable of early detection of defects.
Provided are an extension device of a semiconductor test apparatus, which can detect defects in an electronic component at low cost, efficiently and early, and a system for testing the electronic component using the extension device.
According to one embodiment of the present application, there is provided an extension apparatus of a semiconductor test device. The expansion device includes: a dispenser including an input terminal connected to an image capture device and for receiving an image of an electronic component tested by the semiconductor test equipment from the image capture device, and a first output terminal for outputting the received image; an image memory connected to the first output terminal for storing the image output from the first output terminal; and an evaluation device connected with the image memory for generating a score for each stored image, the score indicating whether the electronic component in the corresponding one image has a defect.
According to another embodiment of the present application, a system for testing an electronic component is provided. The system includes semiconductor test equipment; and an extension device of the semiconductor test equipment according to the application.
According to yet another embodiment of the present application, a system for testing electronic components is provided. The system includes semiconductor test equipment; and an extension device of the semiconductor device. The extension device is connected with the semiconductor test apparatus and includes: a dispenser including an input terminal connected to an image capture device and for receiving an image of an electronic component tested by the semiconductor test equipment from the image capture device, and a first output terminal for outputting the received image; and an image memory connected to the first output terminal for storing the image output from the first output terminal.
For a user who owns a semiconductor test device that stores only a part of an image, in order to implement defect detection based on an early image, the user needs to re-purchase a new type of semiconductor test device that can store 100% of the image to prevent missing an early image that can embody an artificially recognizable defect, which may increase additional detection costs for the user. Alternatively, a user has to resort to suppliers of their existing semiconductor test equipment to provide update services for the hardware and software of their semiconductor test equipment, which most suppliers do not support. Even if a vendor can provide an upgrade service to existing semiconductor test equipment by redesigning and configuring its software and hardware, the upgrade costs are considerable due to the relatively closed software and hardware systems of the semiconductor test equipment. Furthermore, manual defect detection based on images of electronic components is time consuming and laborious, which is particularly evident as the number of images increases.
Therefore, it is desirable to be able to shunt the image collected by the image collecting device of the existing semiconductor testing device to the extension device configured according to the embodiments of the present application without changing the software and hardware of the existing semiconductor testing device, so that the improved testing system can not only retain the detection mode of the existing semiconductor testing device, but also implement the functions of storing and performing defect detection based on 100% of the image in the extension device. The cost of obtaining the extension device is far lower than the cost of re-purchasing a novel semiconductor testing device or updating and modifying software and hardware of the existing semiconductor testing device.
Specifically, according to various embodiments of the present application, on one hand, the distributor can be connected to the image acquisition device of the existing semiconductor test equipment, and the image acquired by the image acquisition device of the existing semiconductor test equipment is completely transmitted and stored in the image memory through the distributor for subsequent processing in the evaluation device. On the other hand, it is possible to configure a new function developed for defect detection into the extension apparatus by easily modifying the image evaluation apparatus in the extension apparatus. In particular, by configuring a function of scoring an image with a predetermined model in the external evaluation device, semi-automatic or automatic defect detection can be realized. This not only can improve detection efficiency, but also can prompt a user for a defect that is more difficult to perceive at an early stage, compared to, for example, manual recognition based on an image, thereby enabling earlier, accurate, and efficient defect detection. Still further advantages of the present application will be appreciated to those of ordinary skill in the art upon reading and understand the following detailed description.
Drawings
FIG. 1 shows a block diagram of a system for testing electronic components according to one embodiment of the present application;
FIG. 2 illustrates a particular form of dispenser according to one embodiment of the present application; and is
Fig. 3 shows a block diagram of an evaluation device according to an embodiment of the present application.
Detailed Description
FIG. 1 shows a block diagram of a system 100 for testing electronic components (e.g., semiconductor chips) according to one embodiment of the present application. The electronic component can be any electronic component for which defect detection is desired, such as a metal sheet, a wire, etc., as will be appreciated by those skilled in the art.
In fig. 1, a portion defined by a dashed box is an extension device 101 of a semiconductor test apparatus according to an embodiment of the present application.
The expanding device 101 of the semiconductor test apparatus includes a distributor 10. In one embodiment, dispenser 10 can be specifically designed as an adapter for an image capture device for various types of semiconductor test equipment, such as the INV dispenser provided by Intel corporation. Fig. 2 shows a specific example of the distributor 10 with different data ports. It will be appreciated that the distributor 10 can comprise any device having the ability to receive data and to stream the received data, for example, a data line having a branched structure. The distributor 10 comprises an input a and a first output B. The input terminal a of the dispenser 10 is connected to an image pickup device (e.g., a camera 20) and receives an image of a semiconductor chip to be tested picked up by the camera 20. The image capturing device may be a component included in the semiconductor test apparatus, or may be a component independent of the semiconductor test apparatus and the extension device 101. The semiconductor test apparatus is, for example, a semiconductor test apparatus already owned by a user, which is capable of selecting and storing only a part (i.e., a subset, of which the number of images is less than the entire images captured by the camera) of the captured images of the semiconductor chip, so as to perform manual detection of whether there is a defect in the semiconductor chip based on the part of the images. The captured image may also be a video image. The semiconductor test apparatus is capable of providing defect detection independent of an evaluation device as will be described below. The dispenser 10 can be, for example, an adapter having different ports that can be designed to connect with different components.
The expanding means 101 of the semiconductor test apparatus further comprises an image memory 30 connected to the first output terminal B of the distributor 10. Through this first output terminal B, all images (i.e., 100% images) for all the individual semiconductor chips received from the camera 20 are output and stored in the image memory 30.
In one embodiment, the expansion device 101 further comprises an image capture card (not shown) capable of capturing the image stream output from the first output B for storage in the image memory 30.
The acquired image of the semiconductor chip can be an image acquired in a manufacturing process for a batch of semiconductor chips of the same model or different models. Each of the images corresponds to at least a different individual of the batch of semiconductor chips. The image memory 30 will store at least an image for each individual.
The expanding means 101 of the semiconductor test apparatus further comprises evaluating means 40 connected to the image memory 30 for generating a score for each stored image, the score indicating a likelihood that the electronic component in a corresponding one of the images has a defect. Preferably, the evaluation device 40 can score each image using a predetermined model to indicate whether the semiconductor chip in the image has a defect, and preferably, the score can be a probability that indicates that the corresponding semiconductor chip has a defect. For example, the score may be in the form of a percentage, between 0-100%. If the score indicates a high probability value of the presence of a defect, it is possible to draw the attention of the user and to confirm and find the presence of a defect on the chip. Or the score may be simply binary, being 0 or 1.
The evaluation device 40 is capable of automatic or semi-automatic defect detection. For example, the evaluation device 40 automatically determines that a defect is present in a particular image in the event that a score, determined using a predetermined model, indicating a probability of a defect being present in the image exceeds a predetermined threshold. For another example, in the event that a score, determined using a predetermined model, indicating a probability that a defect is present in a particular image exceeds a predetermined threshold, the evaluation device 40 can perform further processing on the image, such as image segmentation, feature ratio, and the like, to automatically detect the defect.
As another example, the evaluation device 40 can compare the score determined for each image with a further predetermined threshold value, and if greater than the further predetermined threshold value, display the corresponding image to the user for further manual detection, thereby enabling semi-automatic defect detection. In this embodiment, the extension means 101 can comprise a display for displaying images with a score above a predetermined threshold, or the evaluation means 40 can be connected to another display, for example a display of the present semiconductor test device, for displaying images with a score above a predetermined threshold. The above-mentioned threshold value can be set by a person.
In the above-mentioned automatic or semi-automatic defect detection, the evaluation device 40 may further include a comparator for comparing the score with a predetermined threshold, and the evaluation device performs corresponding processing based on the comparison result, such as outputting a signal indicating the defect determination result, or outputting an image having a score higher than the predetermined threshold to a display.
In one embodiment, the predetermined model can be manually input or set. For example, a professional can empirically set parameters of the model (e.g., gray value distribution, texture characteristics, etc. of the image) to construct the model.
In another embodiment, the predetermined model can be trained based on a plurality of images using a machine learning algorithm. The plurality of images used to train the model are known to be defective and/or not defective, and the parameters of the model can be trained based on these known images. The trained model can greatly improve the accuracy of defect scoring. This is particularly important for early detection of defects.
For example, some defects may appear more and more pronounced in the same batch of semiconductor chips (e.g., defects caused by oil contamination), and at an early stage, the number of images that present defects that can be manually identified is quite rare. Generally, in a semiconductor test apparatus, only less than 10% of the total images for one lot of semiconductor chips are stored according to a predetermined rule. For example, for a batch of chips produced with one image per chip, the predetermined rules may require that only one image be stored per 20 chips (only 5% of the images are stored). Therefore, it is highly likely that early images, which are rare in themselves, can be missed and result in the lack of early images to detect defects. Furthermore, even if an early image is provided, these semiconductor test apparatuses rely mainly on manual detection by users, and therefore defects that do not appear obvious at an early stage as described above may be missed. Compared with manual detection, the method has the advantages that the defect detection is carried out by using the model trained by the machine learning method, so that the detection accuracy and speed can be improved, and the defect can be found as early as possible to save chips of the next batch in time.
The above-described expanding means 101 including the distributor, the image memory and the evaluating means can be connected to the semiconductor test apparatus through the distributor 10. For example, the semiconductor test equipment itself includes an image selector connected to the camera and a storage device, the image selector selecting a subset, typically less than 10%, of the image captured by the camera to be stored in the storage device according to a predetermined rule. The image captured by the camera is split into two paths by the distributor 10 connected to the expansion device 101 of the semiconductor test apparatus, so that both a subset of the image is stored in the memory device of the semiconductor test apparatus according to the principles of the semiconductor test apparatus and the entire image is stored in the memory 30 of the expansion device 101. Such an embedded/external system can be designed to be embedded between a camera and a selector/storage device of an existing semiconductor test apparatus according to the type of camera connection cable of the existing semiconductor test apparatus.
It will be appreciated that the above-described evaluation means 40 may perform its function by executing a software module, which may be configured, for example, as a computer processor with specific instructions. Furthermore, the evaluation means 40 may also be implemented by a processing circuit, for example a DSP chip.
Referring to fig. 3, in an embodiment the processing circuitry of the evaluation device 40 comprises an extractor 401 for extracting image features (e.g. grey value distribution, texture features) and a model feature provider 402 for providing features of a predetermined model. The processing circuitry of the evaluation apparatus 40 further comprises a subtractor 403, the extractor 401 and the model feature provider 402 being connected to the subtractor 403 as distinct input signal sources, respectively. The subtractor 403 subtracts the image features provided by the extractor 401 from the corresponding features of the predetermined model provided by the model feature provider 402. The processing circuitry of the evaluation device 40 further comprises a scorer 404 connected to the subtractor 403, which receives the difference output by the subtractor 403 and scores the image based on the difference.
Further, the processing circuitry of the evaluation device 40 can also include a comparator 406 having one input connected to the scorer 404 and receiving the score output by the scorer 404. Another input of the comparator 406 receives the threshold 405 and compares the score with the threshold to output a comparison result. The comparison result is a signal that can be used to indicate whether the image has a defect or can be used to output to a user to prompt the user. When the comparator 406 determines that the score is greater than the predetermined threshold, outputting a signal indicating that the electronic component in a corresponding one of the images has a defect; and vice versa.
The system 100 of fig. 1 shows a scenario in which an extension means 101 comprising a distributor, an image memory and an evaluation means is used in conjunction with a semiconductor test apparatus.
In addition to the above-described expanding means 101 comprising the dispenser 10, the image memory 30 and the evaluation means 40, the system 100 further comprises a camera 20 for acquiring an image of the semiconductor chip under inspection. The camera 20 may be a component included in the semiconductor test apparatus, or may be a component independent of the semiconductor test apparatus and the expansion device 101.
In the system 100, the dispenser 10 further includes a second output terminal C connected to the image selector 50 of the semiconductor test equipment. A portion (i.e., a subset) of the image captured by the camera 20 is selected via the image selector 50 and output to a memory device 60 of the semiconductor test equipment coupled to the image selector to ensure that the semiconductor test equipment is able to perform processing in accordance with its native functionality.
The storage means 60 of the semiconductor test apparatus is used to store a subset of the selected images output from the second output terminal C, i.e., not 100% of the images, to enable storing and detecting the partially captured images.
It is to be understood that the storage device 60 of the semiconductor test apparatus is a separate component from the image memory 30, without any direct or indirect connection therebetween; and the image selector 50 of the semiconductor test apparatus is a separate component from the evaluation device 40 without any direct or indirect connection therebetween.
The system 100 also includes a display (not shown) that can be used to display a subset of the images stored by the memory device 60 of the semiconductor test equipment. The display may be a component included in the semiconductor test apparatus, or may be a component independent of the semiconductor test apparatus and the expansion device 101. Thus, the system 100, while configured with an automatic defect scoring function by the evaluation device 40, also allows the user to manually identify defects through the images displayed on the display. The results of the manual identification can be used to evaluate and verify the automatic defect scoring function of the evaluation device 40.
The camera 20, the image selector 50, the storage device 60, and the display of fig. 1 may be included in the semiconductor test apparatus. The system 100 in fig. 1 can be regarded as a system in which the extension apparatus 101 is embedded in the semiconductor test equipment.
Although it is described in the above embodiment that the extension apparatus 101 includes the evaluation apparatus 40 for automatic/semi-automatic defect detection, it can be understood by those skilled in the art that the extension apparatus 101 can not include the evaluation apparatus 40, and can allow a user to manually perform defect detection on 100% of the stored images. Such an extension apparatus 101 can also provide more advantageous functions to the semiconductor test device than a semiconductor test device that does not store 100%.
The system of the present application has been described above with reference to various embodiments, which may include a particular feature, structure, or characteristic, but not every embodiment necessarily includes the particular feature, structure, or characteristic. In addition, some embodiments may have some, all, or none of the features described for other embodiments.
Various features of different embodiments or examples may be combined in various ways with some features included and others excluded to accommodate various different applications. The figures and the foregoing description give examples of embodiments. Those skilled in the art will appreciate that one or more of the described elements may be combined into a single functional element. Alternatively, some elements may be divided into multiple functional elements. Elements from one embodiment may be added to another embodiment. The scope of the embodiments is in no way limited by these specific examples. Many variations, whether explicitly given in the specification or not, such as differences in product composition and structure, are possible.

Claims (11)

1. An extension apparatus of a semiconductor test device, comprising:
a dispenser including an input terminal connected to an image capture device and for receiving an image of an electronic component tested by the semiconductor test equipment from the image capture device, and a first output terminal for outputting the received image;
an image memory connected to the first output terminal for storing the image output from the first output terminal; and
an evaluation device connected to the image memory for generating a score for each stored image, the score indicating a likelihood that the electronic component in the corresponding one of the images has a defect.
2. The extension device according to claim 1, wherein the evaluation device generates the score based on a predetermined model for each stored image.
3. The extension device according to claim 2, wherein the predetermined model is trained with a machine learning method based on a plurality of images showing electronic components with known defects and/or without defects.
4. The extension device of any one of claims 1-3, wherein the evaluation device further comprises
A comparator that compares the score with a predetermined threshold and, when it is determined that the score is greater than the predetermined threshold, outputs a signal indicating that the electronic component in a corresponding one of the images has a defect.
5. A system for testing an electronic component includes
Semiconductor test equipment; and
the extension device of the semiconductor test apparatus according to any one of claims 1 to 4.
6. The system of claim 5, wherein the first and second sensors are arranged in a single unit,
wherein the distributor in the expansion device further comprises a second output end for outputting the received image; and wherein the semiconductor test apparatus comprises
An image selector connected to the second output terminal, selecting a subset of images output from the second output terminal according to a predetermined rule;
a storage device connected to the image selector for storing a subset of the images output from the second output; and
a display for displaying the subset of the image to allow a user to identify a defect of the electronic component based on the subset of the image.
7. The system of claim 5 or 6, wherein the semiconductor test equipment further comprises:
the image acquisition device is used for acquiring the image of the electronic component.
8. A system for testing electronic components, comprising:
semiconductor test equipment; and
the extension device of the semiconductor test equipment is connected with the semiconductor test equipment, and comprises:
a dispenser including an input terminal connected to an image capture device and for receiving an image of an electronic component tested by the semiconductor test equipment from the image capture device, and a first output terminal for outputting the received image; and
an image memory connected to the first output terminal for storing the image output from the first output terminal.
9. The system of claim 8, wherein the first and second sensors are arranged in a single package,
wherein the distributor in the extension apparatus further includes a second output terminal for outputting the received image, the second output terminal being connected to the semiconductor test equipment and being for outputting the received image to the semiconductor test equipment.
10. The system of claim 9, further comprising:
a display connected to the image memory and/or the semiconductor test apparatus for displaying the image outputted from the first output terminal into the image memory and/or displaying the image outputted from the second output terminal into the semiconductor test apparatus.
11. The system of any of claims 8-10, further comprising:
the image acquisition device is used for acquiring the image of the electronic component.
CN201921615165.4U 2019-09-26 2019-09-26 Expansion device of semiconductor test equipment and system using same Active CN211577949U (en)

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CN201921615165.4U CN211577949U (en) 2019-09-26 2019-09-26 Expansion device of semiconductor test equipment and system using same

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Publication Number Publication Date
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