CN210742306U - Short-circuit prevention makeup testing device - Google Patents
Short-circuit prevention makeup testing device Download PDFInfo
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- CN210742306U CN210742306U CN201921140820.5U CN201921140820U CN210742306U CN 210742306 U CN210742306 U CN 210742306U CN 201921140820 U CN201921140820 U CN 201921140820U CN 210742306 U CN210742306 U CN 210742306U
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Abstract
The utility model relates to a prevent short circuit makeup testing arrangement, makeup is including a plurality of circuit boards of parallelly connected, prevents that short circuit makeup testing arrangement includes the power for each circuit board power supply and a plurality of short-circuit protection circuit that are used for protecting each circuit board, and short-circuit protection circuit includes: the detection circuit is used for detecting the voltage at two ends of the circuit board; the switch circuit is arranged between the power supply and the power supply end of the circuit board, and the output end of the detection circuit is connected with the control end of the switch circuit; when the detection circuit detects the short circuit of the circuit board, the power supply is disconnected to supply power to the circuit board, and when the detection circuit does not detect the short circuit of the circuit board, the power supply supplies power to the circuit board. The utility model discloses a design simple circuit, the realization is supplied power to the circuit board when the circuit board is normal and is tested and cut off the power supply to the circuit board when the circuit board short circuit to protect the circuit board, this circuit is simple easily to be realized, reduces design cost, and the detection accuracy is high.
Description
Technical Field
The utility model belongs to the technical field of the PCB board test, concretely relates to prevent short circuit makeup testing arrangement.
Background
In the production process of consumer electronics products, the PCBA which is mounted well is often tested. Because consumer electronics systems are more and more complex, test items are more and more, and the process takes a long time, the production cost is greatly increased, and for this reason, manufacturers gradually adopt makeup tests, namely one test tool tests one or more makeup PCBAs simultaneously, so that the time is saved, and the efficiency is improved.
However, in the process of the imposition test, a 'bad' or 'bad' board exists in one imposition, and once the 'bad' or 'bad' board has a power supply short circuit, the test of the whole imposition is influenced. In order to solve this problem, the methods adopted in the prior art are: (1) a relay scanning difference plate is added, and in the burning process, the difference plate is forbidden to be electrified, so that time is wasted; (2) a plurality of power supplies are added, and a power supply parallel scheme is used, so that the tooling cost is greatly increased. Therefore, a device with low cost, simple design and high testing accuracy is needed in the split-type testing process.
SUMMERY OF THE UTILITY MODEL
The utility model provides a prevent short circuit makeup testing arrangement through designing simple circuit, realizes supplying power to the circuit board when the circuit board is normal and tests and cut off the power supply to the circuit board when the circuit board short circuit to protect the circuit board, this circuit is simple easily realized, reduces the design cost, and the detection accuracy is high.
In order to solve the technical problem, the utility model provides a following technical scheme solves:
the utility model provides a prevent short circuit makeup testing arrangement, the makeup includes a plurality of circuit boards of parallelly connected, a serial communication port, prevent short circuit makeup testing arrangement includes the power for each circuit board power supply and a plurality of short-circuit protection circuit that are used for protecting each circuit board, short-circuit protection circuit includes: the detection circuit is used for detecting the voltage at two ends of the circuit board; the switch circuit is arranged between the power supply and the power supply end of the circuit board, and the output end of the detection circuit is connected with the control end of the switch circuit; when the detection circuit detects the short circuit of the circuit board, the power supply is disconnected to supply power to the circuit board, and when the detection circuit does not detect the short circuit of the circuit board, the power supply supplies power to the circuit board.
The short-circuit prevention imposition test device as described above is an embodiment of a switch circuit, where the switch circuit includes a pull-up resistor and a first switch control circuit, one end of the pull-up resistor is connected between the power supply and the input end of the first switch control circuit, and the other end of the pull-up resistor is connected between the output end of the detection circuit and the control end of the first switch control circuit; the output end of the first switch control circuit is connected with the power supply end of the circuit board.
As an embodiment of the detection circuit, the detection circuit includes a first resistor and a second switch control circuit, one end of the first resistor is connected between the power supply and one end of the pull-up resistor, the other end of the first resistor is connected between a control end of the second switch control circuit and a power supply end of the circuit board, and an output end of the second switch control circuit is connected to the control end of the first switch control circuit.
As an embodiment of the first switch control circuit, the short-circuit prevention imposition test apparatus described above is a switch circuit that is turned on at a low level.
According to the short-circuit prevention makeup testing device, the first switch control circuit is a PMOS (P-channel metal oxide semiconductor) tube, the grid electrode of the PMOS tube is connected between the other end of the pull-up resistor and the output end of the second switch control circuit, the source electrode of the PMOS tube is connected between the power supply and one end of the pull-up resistor, and the drain electrode of the PMOS tube is connected with the power supply end of the circuit board.
As an embodiment of the second switch control circuit, the short-circuit prevention imposition test apparatus described above is a switch circuit that is turned on at a high level.
According to the short-circuit prevention makeup testing device, the second switch control circuit is an NMOS tube, the grid electrode of the NMOS is connected between the other end of the first resistor and the power supply end of the circuit board, and the drain electrode of the NMOS tube is connected with the other end of the pull-up resistor and the control end of the first switch control circuit.
Compared with the prior art, the utility model discloses an advantage and beneficial effect are: by designing a simple circuit, when the circuit board is in short circuit or normal, the voltages at two ends of the circuit board are different, whether the circuit board is in short circuit or not is detected by the detection circuit and is output to the switch circuit, the circuit board is powered when the circuit board is normal, and the power supply of the power supply to the circuit board is cut off when the circuit board is in short circuit, so that the circuit board is protected from being damaged; a plurality of circuit boards in the makeup are respectively protected, the short circuit of a single circuit board cannot influence the test of the whole makeup, and the reliability is high.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the embodiments of the present invention or the description of the prior art will be briefly described below, and it is obvious that the drawings described below are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic block diagram of an embodiment of the short-circuit prevention imposition test device of the present invention;
fig. 2 is a circuit diagram of an embodiment of a short-circuit protection circuit in an embodiment of the short-circuit prevention imposition test device of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
The circuit board is capable of being detected by a detection circuit when a circuit board (such as a PCB, PCBA) is short-circuited by using a simple circuit, and the on/off of a switch circuit is controlled by an output signal of the detection circuit so that the switch circuit is off when the circuit board is short-circuited and the switch circuit is on when the circuit board is normal. As shown in fig. 1, the present embodiment relates to a short-circuit prevention imposition test device, wherein an imposition includes a plurality of circuit boards connected in parallel (only one circuit board 2 is labeled in fig. 1), the short-circuit prevention imposition test device includes a power supply 1 for supplying power to each circuit board and a plurality of short-circuit protection circuits for protecting each circuit board, only a short-circuit protection circuit 3 for protecting the circuit board 2 is labeled in fig. 1, and the short-circuit protection circuit 3 includes: a detection circuit 31 for detecting a voltage across the circuit board 2; a switch circuit 32 disposed between the power supply 1 and the power supply terminal of the circuit board 2, and the output terminal of the detection circuit 31 is connected to the control terminal of the switch circuit 32; when the detection circuit 31 detects a short circuit of the circuit board 2, the power supply 1 cuts off the power supply to the circuit board 2, and when the detection circuit 31 does not detect a short circuit of the circuit board 2, the power supply 1 supplies power to the circuit board 2. And one short-circuit protection circuit is respectively used for protecting one circuit board, and when one circuit board has a short-circuit fault, the power supply of the power supply 1 to the circuit board is cut off, so that the power supply of the power supply 2 to other circuit boards is not influenced, and the whole makeup is protected from being damaged.
As shown in fig. 2, in the present embodiment, the detection of whether the circuit board 2 is short-circuited is realized by detecting the voltage drop across the circuit board 2. Specifically, the switch circuit 32 of the present embodiment is composed of a resistor R2 and a first switch control circuit, the first switch control circuit of the present embodiment is selected as a switch circuit that is turned on at a low level, is turned on when its control terminal receives a low level, and is turned off when it receives a high level, the switch circuit that is turned on at a low level in the present embodiment is selected as a PMOS transistor Q2, a gate G of the PMOS transistor Q2 is connected to the power supply 1 through a resistor R2 and is also connected to the output terminal of the detection circuit 31, a source S of the PMOS transistor Q2 is connected between the power supply 1 and one end of the resistor R2, and a drain D is connected to the power supply terminal of the circuit board 2. The detection circuit 31 of this embodiment is composed of a resistor R1 and a second switch control circuit, the second switch control circuit of this embodiment selects a switch circuit that is turned on at a high level, and is turned on when a control terminal of the switch circuit receives the high level and is turned off when a control terminal of the switch circuit receives the low level, the switch circuit that is turned on at the high level in this embodiment selects an NMOS tube Q1, a gate G of an NMOS tube Q1 is connected with the power supply 1 through a resistor R1, a connection point between the resistor R1 and the gate G is connected with a power supply terminal of the circuit board 2, a source S is connected with a negative electrode (i.e., ground) of the power supply 1, and a drain D is.
When the split-type board is tested, a plurality of circuit boards are tested in parallel, and the test principle of each circuit board 2 is as follows: when the circuit board 2 is normal, the power supply 1 provides a high level at the grid G of the NMOS tube Q1 through the resistor R1, the Q1 is conducted, the grid G level of the PMOS tube Q2 is pulled down, the PMOS tube Q2 is conducted, so that the power supply 1 and the circuit board 2 form a current path, and the power supply 1 supplies power to the circuit board 2; when the circuit board 2 is short-circuited, the level at the gate G of the NMOS transistor Q1 is pulled low, and Q1 is cut off, because the gate G of the PMOS transistor Q2 is connected to the power supply 1 through the resistor R2, the gate G of the PMOS transistor Q2 is at a high level, at this time, Q2 is cut off, and the power supply 1 cannot supply power to the circuit board 2, thereby protecting the circuit board 2 from being damaged.
According to the short-circuit-prevention jointed board testing device, through designing a simple circuit, when a circuit board is short-circuited or normal, voltages at two ends of the circuit board are different, whether the circuit board 2 is short-circuited or not is detected through the detection circuit 31 and is output to the switch circuit 32, power is supplied to the circuit board 2 when the circuit board 2 is normal, and power supply 1 is disconnected to the circuit board 2 when the circuit board 2 is short-circuited, so that the circuit board 2 is protected from being damaged; a plurality of circuit boards in the makeup are respectively protected, the short circuit of a single circuit board cannot influence the test of the whole makeup, and the reliability is high.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.
Claims (7)
1. The utility model provides a prevent short circuit makeup testing arrangement, the makeup includes a plurality of circuit boards of parallelly connected, a serial communication port, prevent short circuit makeup testing arrangement includes the power for each circuit board power supply and a plurality of short-circuit protection circuit that are used for protecting each circuit board, short-circuit protection circuit includes:
the detection circuit is used for detecting the voltage at two ends of the circuit board;
the switch circuit is arranged between the power supply and the power supply end of the circuit board, and the output end of the detection circuit is connected with the control end of the switch circuit;
when the detection circuit detects the short circuit of the circuit board, the power supply is disconnected to supply power to the circuit board, and when the detection circuit does not detect the short circuit of the circuit board, the power supply supplies power to the circuit board.
2. The short-circuit prevention imposition test device according to claim 1, wherein the switch circuit comprises a pull-up resistor and a first switch control circuit, one end of the pull-up resistor is connected between the power supply and the input terminal of the first switch control circuit, and the other end is connected between the output terminal of the detection circuit and the control terminal of the first switch control circuit; the output end of the first switch control circuit is connected with the power supply end of the circuit board.
3. The short-circuit prevention imposition test device according to claim 2, wherein the detection circuit comprises a first resistor and a second switch control circuit, one end of the first resistor is connected between the power supply and one end of the pull-up resistor, the other end of the first resistor is connected between a control terminal of the second switch control circuit and a power supply terminal of the circuit board, and an output terminal of the second switch control circuit is connected to the control terminal of the first switch control circuit.
4. The short-circuit prevention imposition test device according to claim 2 or 3, wherein the first switch control circuit is a low-level conducting switch circuit.
5. The short-circuit prevention imposition test device according to claim 3, wherein the first switch control circuit is a PMOS tube, a gate of the PMOS tube is connected between the other end of the pull-up resistor and the output end of the second switch control circuit, a source of the PMOS tube is connected between the power supply and one end of the pull-up resistor, and a drain of the PMOS tube is connected to the power supply end of the circuit board.
6. The short-circuit prevention imposition test device according to claim 3 or 5, wherein the second switch control circuit is a high-level conducting switch circuit.
7. The short-circuit prevention imposition test device according to claim 5, wherein the second switch control circuit is an NMOS transistor, a gate of the NMOS transistor is connected between the other end of the first resistor and a power supply end of the circuit board, and a drain of the NMOS transistor is connected with the other end of the pull-up resistor and a control end of the first switch control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921140820.5U CN210742306U (en) | 2019-07-19 | 2019-07-19 | Short-circuit prevention makeup testing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201921140820.5U CN210742306U (en) | 2019-07-19 | 2019-07-19 | Short-circuit prevention makeup testing device |
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| Publication Number | Publication Date |
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| CN210742306U true CN210742306U (en) | 2020-06-12 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201921140820.5U Active CN210742306U (en) | 2019-07-19 | 2019-07-19 | Short-circuit prevention makeup testing device |
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| CN (1) | CN210742306U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112505393A (en) * | 2020-11-13 | 2021-03-16 | 杭州辰汉智能科技有限公司 | Electric vehicle instrument signal detection method and system |
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2019
- 2019-07-19 CN CN201921140820.5U patent/CN210742306U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112505393A (en) * | 2020-11-13 | 2021-03-16 | 杭州辰汉智能科技有限公司 | Electric vehicle instrument signal detection method and system |
| CN112505393B (en) * | 2020-11-13 | 2022-09-20 | 杭州辰汉智能科技有限公司 | Electric vehicle instrument signal detection method and system |
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