CN210199300U - Radar data transmission device and radar system - Google Patents

Radar data transmission device and radar system Download PDF

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CN210199300U
CN210199300U CN201920460240.8U CN201920460240U CN210199300U CN 210199300 U CN210199300 U CN 210199300U CN 201920460240 U CN201920460240 U CN 201920460240U CN 210199300 U CN210199300 U CN 210199300U
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data
radar
output node
signal
interval
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Hongquan Liu
刘洪泉
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Calterah Semiconductor Technology Shanghai Co Ltd
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Calterah Semiconductor Technology Shanghai Co Ltd
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Abstract

The utility model relates to a radar technical field especially relates to transmission device and radar system of radar data. The transmission device includes: the radar transceiver is used for generating a frequency sweeping signal, the frequency sweeping signal has a pulse transmitting interval and a waiting interval on a time domain, and the waiting interval is used for isolating adjacent pulse transmitting intervals; and a data transmitter connected to the radar transceiver; the radar transceiver is used for providing a clock signal to the data transmitter in the waiting interval, and the data transmitter carries out serial transmission of radar data based on the clock signal. The multi-channel data high-speed transmission can be realized without an additional clock circuit, and the multi-channel data high-speed transmission device is simple in structure and low in cost.

Description

Radar data transmission device and radar system
Technical Field
The utility model relates to a radar technical field, more specifically relates to a transmission device and radar system of radar data.
Background
Currently, miniaturization and thin termination have gradually become the design trend of radar systems. The thin-terminated design refers to that only a small amount of signal processing procedures or no signal processing procedures are executed on the radar terminal equipment side, but most of the procedures of signal processing and data fusion are executed in the processing terminal (such as a central processing unit, a domain processor and the like) of the radar system, and the design has the advantage that the performance and the efficiency of the radar system can be improved. In practical application, an additional clock signal chip is required to be introduced to perform data transmission between the radar terminal equipment side and the processing terminal, so that not only can the cost of the radar system be increased, but also the complexity of the radar system is increased.
SUMMERY OF THE UTILITY MODEL
In order to solve the problems existing in the prior art, the utility model provides a transmission device and radar system of radar data has reduced cost, system architecture complexity and pin figure, and can not influence the normal transmission of radar system and receive function.
According to the utility model discloses an aspect provides a transmission device of radar data, include: the radar transceiver is used for generating a frequency sweeping signal, the frequency sweeping signal has a pulse transmitting interval and a waiting interval on a time domain, and the waiting interval is used for isolating adjacent pulse transmitting intervals; and a data transmitter connected to the radar transceiver; the radar transceiver is used for providing a clock signal to the data transmitter in the waiting interval, and the data transmitter transmits radar data based on the clock signal. The radar transceiver utilizes the existing circuit to generate the clock signal, so that the transmission device provided by the embodiment of the utility model does not need to be provided with an additional clock signal generating circuit. Optionally, the data transmitter transmits the radar data serially so that the transmission means does not introduce too many pins.
Optionally, the transmission device further includes: presetting a data link, which comprises at least one data output node; the data link port is respectively connected with the data transmitter and each data output node, and is used for receiving radar data through each data output node and sending the received radar data to the data transmitter; and the preset data link comprises any section of data link from the original data output by the analog-digital converter in the radar transceiver to the output end of the radar transceiver.
Optionally, the data output node includes at least one of an output node of original data, an output node of one-dimensional fast fourier transform data, an output node of two-dimensional fast fourier transform data, an output node of three-dimensional fast fourier transform data, an output node of target detection data, an output node of arrival angle data, an output node of cluster data, and an output node of tracking data.
Optionally, the transmission device further includes: and the preprocessor is connected between the radar transceiver and the data transmitter and is used for preprocessing radar data provided by the radar transceiver and sending the preprocessed radar data to the data transmitter.
Optionally, the preprocessing includes at least one of data buffering, data sorting on demand, sorting, encoding and decoding, parallel-to-serial conversion, and serial-to-parallel conversion.
Optionally, the transmission device further includes: and the memory is respectively connected with the data link port and each data output node, and is used for storing the radar data output by each data output node and outputting the radar data stored by the memory through the data link port.
Optionally, the radar transceiver comprises a phase-locked loop unit for generating a frequency-swept signal; and/or the data transmitter comprises a pre-emphasis unit for compensating data transmitted by the data transmitter. The pre-emphasis unit enables the transmission device to realize long-distance high-speed data transmission.
Optionally, the waiting interval includes at least one of a first sub-waiting interval and a second sub-waiting interval; the first sub-waiting interval comprises an interval used for separating adjacent frames in the sweep frequency signal, the second sub-waiting interval comprises an interval used for separating adjacent chirp stages in the sweep frequency signal, each frame of the sweep frequency signal comprises at least one chirp stage, and the frequency of the sweep frequency signal in the waiting interval is constant. Thereby the embodiment of the utility model provides a frequency invariant clock signal can be provided to the sweep frequency signal that can utilize in waiting for the interval.
According to the utility model discloses an on the other hand still provides a radar system, include: at least one radar terminal side device, each of which includes any one of the transmission apparatuses as described above; the external processor is connected with the data transmitters of the transmission devices and is used for post-processing the data transmitted by the data transmitters; and an execution terminal connected with the external processor for executing terminal operations based on the post-processed data.
Optionally, the radar system is a system on chip.
The radar data transmission device and the radar system of the embodiment of the utility model utilize the existing circuit of the radar transceiver to provide the clock signal for the data transmitter, so that the data transmitter can transmit the radar data based on the clock signal, thereby avoiding introducing an additional clock generating chip/circuit, reducing the complexity of the radar system and reducing the cost of the radar system; the radar transceiver provides a clock signal in the waiting interval of the frequency sweeping signal so that the data transmitter transmits radar data in the waiting interval, and therefore the data processing process, the working period and the analog signal quality of the radar transceiver and the whole radar system are not affected.
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The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings.
Fig. 1 shows a schematic block diagram of a radar system of an embodiment of the present invention;
fig. 2 shows a schematic configuration of a transmission apparatus of the radar terminal side device in fig. 1;
fig. 3 is a schematic diagram illustrating a structure of a default data link and a data link port in fig. 2;
fig. 4 shows a schematic diagram of frequency variation of a frequency sweep signal in an embodiment of the present invention;
FIG. 5a is a schematic illustration of an interval distribution of the frequency sweep signal shown in FIG. 4;
fig. 5b shows a schematic diagram of another interval distribution of the swept frequency signal described in fig. 4.
Detailed Description
The invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by like reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale. Moreover, certain well-known elements may not be shown in the figures.
Fig. 1 shows a schematic block diagram of a radar system of an embodiment of the present invention.
As shown in fig. 1, a radar system 1000 according to an embodiment of the present invention includes at least one radar terminal side device 1100 and an external processor 1200. Each radar terminal side device 1100 generates radar data according to the received radar signal, respectively; the external processor 1200 receives the radar DATA _ m supplied from each radar terminal-side device 1100, and performs post-processing on the radar DATA _ m to obtain corresponding reception DATA.
The data processing link (also called digital baseband processing link) of the radar system 1000 is implemented jointly by the radar terminal side device 1100 and the external processor 1200. The radar terminal side device 1100 first generates corresponding original data according to a received radar signal, the data processing link sequentially executes preset algorithms (the preset algorithms include, but are not limited to, a window algorithm, a one-dimensional fast fourier transform algorithm, a two-dimensional fast fourier transform algorithm, a three-dimensional fast fourier transform algorithm, a target detection algorithm, an arrival angle output algorithm, a clustering output algorithm, a tracking output algorithm, and the like) based on the original data to obtain corresponding result data, and the data processing link may further extract the target data from the original data and/or the result data generated by each preset algorithm. As an alternative embodiment, in the thin-terminated radar system, the radar terminal side device 1100 is only used to complete a data processing process in a part of the data processing link, and the radar terminal side device 1100 may use the raw data, the result data, or the target data as node data and generate corresponding radar data according to the node data.
In an alternative embodiment, the radar system 1000 shown in fig. 1 may further include at least one execution terminal 1300 connected to the external processor 1200, each execution terminal 1300 being configured to execute a terminal operation, i.e., to execute various specific control functions, according to the post-processed received data provided by the external processor 1200, for example, in a radar system applied to an automobile, the execution terminal 1300 being configured to control a traveling direction of the automobile, etc., according to the received data provided by the external processor 1200.
In an alternative embodiment, radar system 1000 is a system-on-a-chip.
In the present embodiment, each radar terminal side device includes a transmission means. Fig. 2 is a schematic diagram showing a structure of a transmission device of the radar terminal side apparatus in fig. 1.
As shown in fig. 2, the transmission apparatus 1100a includes at least a radar transceiver 1110 and a data transmitter 1120.
The radar transceiver 1110 is configured to generate a frequency sweep signal Vfc and a clock signal Vclk. The frequency sweep signal Vfc has a pulse transmission interval and a waiting interval in the time domain, wherein the waiting interval is used for isolating adjacent pulse transmission intervals. The frequency sweep signal Vfc and the clock signal Vclk are implemented, for example, by a phase-locked loop circuit within the radar transceiver 1110.
As an alternative embodiment, a phase-locked loop circuit within radar transceiver 1110 is used to generate frequency sweep signal Vfc based on a control signal (e.g., generated by a voltage-controlled voltage source within the phase-locked loop circuit based on the control signal, which characterizes the frequency of frequency signal Vfc). The phase-locked loop circuit generates, for example, an FMCW (Frequency Modulated Continuous Wave) signal, an MFSK (Multiple Frequency Shift Keying) signal, or another form of Frequency-swept signal Vfc.
Radar transceiver 1110 may also include any number of transmit channels and any number of receive channels. Each receiving channel converts the received radar signal Vr into an intermediate frequency signal in each pulse transmitting interval based on the frequency sweep signal Vfc or the frequency sweep signal processed by the frequency multiplier, and the intermediate frequency signal can be converted into corresponding radar data by an analog-to-digital converter in the radar transceiver; each transmit channel provides a corresponding transmit signal based on the swept frequency signal Vfc or the swept frequency signal after being processed by the frequency multiplier. As an alternative embodiment, each receiving channel includes, for example, a low noise amplifier, a mixer, an analog baseband circuit, and an intermediate frequency output circuit, which are sequentially cascaded, where the mixer down-converts a signal output by the low noise amplifier based on the frequency sweep signal Vfc or the frequency sweep signal processed by the frequency multiplier; each transmit channel includes, for example, a phase shifter and a power amplifier, which are cascaded in sequence, the power amplifier outputting a transmit signal.
The radar transceiver 1110 provides a clock signal Vclk to the DATA transmitter 1120 during a waiting interval of the frequency sweeping signal, and the DATA transmitter 1120 is connected to the radar transceiver 1110 to receive radar DATA provided by the radar transceiver 1110 and output the received radar DATA _ m based on the clock signal Vclk during a corresponding waiting interval (e.g., output the radar DATA serially, and in some embodiments, output the radar DATA in parallel). Because the clock signal Vclk who is used for data transmission obtains according to frequency sweep signal Vfc, consequently the utility model discloses transmission device need not extra high-speed clock circuit, and can carry out arbitrary high-speed data transmission standard.
As an alternative embodiment, the data transmitter 1120 is, for example, a SERDES (SERializer/DESerializer) transmitter conforming to the JESD204B standard. The SERDES transmitter is a Time Division Multiplexing (TDM), point-to-point (P2P) serial communication technology, and can convert multiple low-speed parallel signals into high-speed serial signals at a transmitting end, pass through a transmission medium (optical cable or copper wire), and finally convert the high-speed serial signals into the low-speed parallel signals again at a receiving end. The point-to-point serial communication technology fully utilizes the channel capacity of a transmission medium, reduces the number of required transmission channels and device pins, and improves the transmission speed of signals, thereby greatly reducing the communication cost.
As an alternative embodiment, the data transmitter 1120 may include a pre-emphasis module for compensating the radar data transmitted by the data transmitter so that the radar data output by the data transmitter 1120 conforms to the long-distance transmission standard.
As an alternative embodiment, the data transmitter 1120 may further include a wireless transmission module) that wirelessly serially outputs radar data or pre-emphasized radar data based on the clock signal Vclk.
As an alternative embodiment, the transmission apparatus 1100a further includes a preprocessor 1130 connected between the radar transceiver and the data transmitter, for preprocessing radar data provided by the radar transceiver 1110 and transmitting the preprocessed radar data to the data transmitter 1120. As an alternative embodiment, the preprocessing process implemented by the preprocessor includes at least one of data buffering, data sorting on demand, codec (for example, DC balanced coding, the coding mode may be 8b/10b, 64/66, etc.), sorting, parallel-to-serial conversion (for generating a high-speed data stream), and serial-to-parallel conversion.
The transmission device 1100a further includes a preset data link and a data link port. In some alternative embodiments, the transmission device 1100a further comprises a memory connected between the predetermined data link and the data link port. This is illustrated in the following with reference to the accompanying drawings.
Fig. 3 is a schematic diagram illustrating a structure of a default data link and a data link port in fig. 2.
As shown in fig. 3, the predetermined data link 1140 of the transmitting device includes at least one data output node; the data link port 1150 (e.g., a Direct Memory Access (DMA)) is respectively connected to the data transmitter and each data output node, so as to receive corresponding radar data through each data output node and send the received radar data to the data transmitter.
The preset data link comprises any section of data link in a data processing link of the radar system, namely the preset data link comprises any section of data link from raw data output by an analog-to-digital converter in the radar transceiver to an output end of the radar transceiver. The preset data link comprises at least one data output node, wherein the data output node comprises at least one of an output node of original data, an output node of one-dimensional fast Fourier transform data, an output node of two-dimensional fast Fourier transform data, an output node of three-dimensional fast Fourier transform data, an output node of target detection data, an output node of arrival angle data, an output node of clustering data and an output node of tracking data, which are provided by an analog-to-digital converter in the radar transceiver.
As an alternative embodiment, a memory 1160 is also connected between the data link port and each data output node. The memory is used for storing data provided by each data output node and for outputting the data stored by the memory via the data link port. The memory may include static memory and/or dynamic memory, either on-chip or off-chip.
Fig. 4 shows a schematic diagram of frequency variation of a frequency sweep signal in an embodiment of the present invention. Fig. 5a shows a schematic interval distribution of the frequency sweep signal shown in fig. 4. Fig. 5b shows a schematic diagram of another interval distribution of the swept frequency signal described in fig. 4.
As shown in fig. 4, each frame period Tf of the swept frequency signal Vctl includes at least one chirp (chirp) phase Tf _ sub.
Each pulse emission interval of the sweep frequency signal corresponds to one chirp stage Tf _ sub, and each waiting interval comprises at least one of a first sub-waiting interval and a second sub-waiting interval. Wherein the first sub-waiting interval includes an interval separating adjacent frame periods Tf in the sweep signal (as shown in fig. 5 a), and the second sub-waiting interval includes an interval separating adjacent chirp stages in the sweep signal (as shown in fig. 5 b).
The frequency of the frequency sweep signal continuously changes in each pulse transmission interval (i.e., each chirp phase Tf _ sub), and is reset to the reference frequency at the end of each pulse transmission interval. As an alternative embodiment, in the radar system based on the FMCW technology, the frequency of the frequency sweep signal changes linearly in a periodic manner (for example, in each pulse transmission interval, the frequency is increased linearly from the reference frequency to the set frequency and then decreased linearly from the set frequency to the reference frequency, the duration of the frequency increasing phase is generally longer than the duration of the frequency decreasing phase, and the duration of the specific frequency increasing phase and the duration of the frequency decreasing phase may be different in each pulse transmission interval of the frequency sweep signal), so that a frequency difference exists between the transmission signal and the reception signal of the radar system, the propagation time of the electromagnetic wave between the radar system and the target object can be indirectly measured by measuring the frequency difference, and then the target distance and the target speed are calculated by using the measured propagation time.
And the frequency sweep signal is equal to the constant reference frequency during each waiting interval. At this time, the radar transceiver obtains a clock signal for serial data transmission from the constant frequency sweep signal, so that the data transmitter can serially output radar data based on the clock signal. As an alternative embodiment, the transmission device may directly use the constant frequency sweep signal as a clock signal for the serial transmission of radar data during the waiting interval, without the need for an additional high-speed clock circuit.
For example, when the radar data output by the transmission device is the original data provided by the analog-to-digital converter and the interval layout of the sweep frequency signal is as shown in fig. 5a, assuming that the radar terminal side device has 4 receiving channels, each chirp stage samples 1024 data points, each data point is 16 bits, then the total amount of data corresponding to each chirp stage is 64kbit, and in the case of adopting 8b/10b coding, the total data amount is equivalent to 80 kbit. At this time, assuming that the frequency sweep signal provided by the radar transceiver has a constant frequency of 20GHz in the waiting interval, i.e. the data transmitter uses a 20GHz clock for serial transmission, it only needs 4 μ s to complete transmission of the total data amount of 80 kbit.
For example, when the radar data bit analog-to-digital converter output by the transmission device provides raw data and the interval layout of the sweep frequency signal is as shown in fig. 5b, assuming that the radar terminal side device has 4 receiving channels, each chirp phase samples 1024 data points, each data point is 16 bits, each frame period includes 512 chirp phases, and in the case of 8b/10b coding, the total data amount of each frame period is 40 Mbit. At this time, assuming that the frequency sweep signal provided by the radar transceiver has a constant frequency of 20GHz in the waiting interval, i.e., the data transmitter uses a 20GHz clock for transmission, it only needs 2ms to complete transmission of the total data amount of 40Mbit, and the transceiving process and the update rate of the radar system (i.e., the number of cycles that the radar terminal side device can output radar data per second) are not affected.
As a preferred embodiment, the above-mentioned phase-locked loop circuit, the preprocessor, and the data transmitter may be integrated within the same system-on-chip. However, the embodiments of the present invention are not limited thereto, and those skilled in the art may also implement all or part of the functions of the phase-locked loop circuit, the preprocessor and the data transmitter by using off-chip devices. For the radar system that utilizes the multichannel output that LVDS or MIPI technique realized, technical personnel in the art can also be based on the utility model discloses an utilize Field-Programmable Gate Array (FPGA) to realize the serial-parallel conversion and utilize transmission circuit or the extra transmission chip realization of FPGA inside to the data transmission of external processor.
It should be noted that, the above mainly describes the embodiment in which the data transmitter outputs the radar data serially, however, the embodiments of the present invention are not limited thereto, and the radar data may also be provided by using the data transmitter through parallel transmission or the like.
The radar data transmission device and the radar system provided by the embodiment of the utility model utilize the existing circuit of the radar transceiver to provide the clock signal for the data transmitter, so that the data transmitter can transmit the radar data based on the clock signal, and an additional serial clock generation circuit is not required to be introduced, thereby reducing the complexity of the radar system and the cost of the radar system; the radar transceiver provides a clock signal in the waiting interval of the frequency sweeping signal so that the data transmitter transmits radar data in the waiting interval, and therefore the data processing process, the working period and the analog signal quality of the radar transceiver and the whole radar system are not affected.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
In accordance with the embodiments of the present invention as set forth above, these embodiments are not exhaustive and do not limit the invention to the precise embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and its practical application, to thereby enable others skilled in the art to best utilize the invention and its various embodiments with various modifications as are suited to the particular use contemplated. The present invention is limited only by the claims and their full scope and equivalents.

Claims (10)

1. An apparatus for transmitting radar data, comprising:
the radar transceiver is used for generating a frequency sweeping signal, wherein the frequency sweeping signal has a pulse transmitting interval and a waiting interval in a time domain, and the waiting interval is used for isolating the adjacent pulse transmitting intervals; and
a data transmitter connected to the radar transceiver;
wherein the radar transceiver is configured to provide a clock signal to the data transmitter during the waiting interval, and the data transmitter is configured to transmit the radar data based on the clock signal.
2. The transmission apparatus according to claim 1, further comprising:
presetting a data link, which comprises at least one data output node;
a data link port connected to the data transmitter and each of the data output nodes,
the data link port is used for receiving the radar data through each data output node and sending the received radar data to the data transmitter; and
the preset data link comprises any section of data link from the original data output by the analog-digital converter in the radar transceiver to the output end of the radar transceiver.
3. The transmission apparatus according to claim 2, wherein the data output node includes at least one of an output node of the original data, an output node of one-dimensional fast fourier transform data, an output node of two-dimensional fast fourier transform data, an output node of three-dimensional fast fourier transform data, an output node of target detection data, an output node of arrival angle data, an output node of cluster data, and an output node of trace data.
4. The transmission apparatus according to claim 2, further comprising:
and the preprocessor is connected between the radar transceiver and the data transmitter and is used for preprocessing the radar data provided by the radar transceiver and sending the preprocessed radar data to the data transmitter.
5. The transmission apparatus according to claim 4, wherein the preprocessing comprises at least one of data buffering, data on-demand sorting, encoding and decoding, parallel-to-serial conversion, and serial-to-parallel conversion.
6. The transmission apparatus according to claim 2, further comprising:
a memory connected to the data link port and each of the data output nodes, respectively,
wherein the memory is used for storing the radar data output by each data output node, an
And outputting the radar data stored in the memory through the data link port.
7. Transmission apparatus according to claim 1, wherein the radar transceiver comprises a phase locked loop unit for generating the swept frequency signal; and/or
The data transmitter includes a pre-emphasis unit for compensating data transmitted by the data transmitter.
8. The transmission apparatus according to any one of claims 1 to 7, wherein the waiting interval comprises at least one of a first sub-waiting interval and a second sub-waiting interval;
wherein the first sub-waiting interval comprises an interval in the swept frequency signal used for spacing adjacent frames, and the second sub-waiting interval comprises an interval in the swept frequency signal used for spacing adjacent chirp stages,
each frame of the frequency sweep signal comprises at least one chirp stage, and the frequency of the frequency sweep signal in the waiting interval is constant.
9. A radar system, comprising:
at least one radar terminal side device, each comprising a transmission apparatus according to any one of claims 1-8;
the external processor is connected with the data transmitters of the transmission devices and is used for post-processing the data transmitted by the data transmitters; and
and the execution terminal is connected with the external processor and used for executing terminal operation based on the post-processed data.
10. The radar system of claim 9, wherein the radar system is a system on a chip.
CN201920460240.8U 2019-04-04 2019-04-04 Radar data transmission device and radar system Active CN210199300U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109901115A (en) * 2019-04-04 2019-06-18 加特兰微电子科技(上海)有限公司 The transmitting device and radar system of radar data

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109901115A (en) * 2019-04-04 2019-06-18 加特兰微电子科技(上海)有限公司 The transmitting device and radar system of radar data
CN109901115B (en) * 2019-04-04 2023-12-08 加特兰微电子科技(上海)有限公司 Radar data transmission device and radar system

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