CN208985029U - Voltage conversion circuit, data operation unit, chip, force calculation board and calculation equipment - Google Patents
Voltage conversion circuit, data operation unit, chip, force calculation board and calculation equipment Download PDFInfo
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Abstract
The utility model provides a voltage conversion circuit and data arithmetic unit, chip, calculation power board and computational equipment. The voltage conversion circuit comprises an input end, a first voltage source and a second voltage source, wherein the input end is used for inputting a first level signal; the output end is used for outputting the second level signal; the differential input unit is used for inverting the first level signal of the input end and outputting a differential input signal; a conversion unit for converting a first level of the differential input signal into a second level signal; the output driving unit is used for outputting the second level signal to the output end; its characterized in that still including setting up the input with supplementary drop-down unit between the converting unit, supplementary drop-down unit receives output drive unit's feedback signal, in order to improve the converting unit discernment difference input signal's ability, thereby makes the utility model discloses a voltage conversion circuit can realize from the conversion of input low-voltage to output high-voltage.
Description
Technical field
The utility model relates to a kind of electric pressure converter (LVL, Level-Shifter), in particular to a kind of to set in calculating
The full swing voltage conversion circuit (Full Swing Level-Shifter) and the arithmetic element using it, core of standby middle application
Piece calculates power plate and calculates equipment.
Background technique
Multiple voltage domain (Multi-supply voltage domain) power supply technique is more and more widely used on piece core
Piece system (System-on-chip, SoC) and multiprocessor calculate in structure.In the chip for applying multiple voltage domain technology,
The chip usually contains multiple independent voltage domains or voltage island, and the module under each voltage domain is according to the requirement of its timing
Work is under appropriate supply voltage.Typically for the more crucial module of timing, it is usually operated under high supply voltage
(VDDH) under, to meet requirement of the chip to speed ability；And for non-key circuit module, it then works in low power supply
Under voltage (VDDL) even subthreshold value supply voltage, to reduce the power consumption consumption and energy consumption of chip.
Electric pressure converter is an essential circuit in multivoltage system, it is provided not for each different voltage domain
Same power supply supply, guarantees transmission of the signal between each voltage domain.Under normal circumstances, signal is transformed into low pressure from high pressure domain
Domain, common buffer (buffer) can be realized.But if signal is to be transformed into high pressure domain from low-pressure region, especially from
Subthreshold voltage domain is transformed into high pressure domain, then needs increasingly complex circuit.
CN104506183A discloses a kind of electric pressure converter, as shown in Figure 1, the PMOS tube that it is coupled by a pair of cross,
A pair of of pull-down NMOS pipe and the low pressure phase inverter for providing Differential Input are constituted.When input IN jumps to VDDL from " 0 ", M1 pipe
Node OUTB voltage is pulled down to " 0 ", then passing through cross-linked PMOS is high level VDDH to that will export OUT preliminary filling.Due to
The pull-down current that the NMOS tube of low-voltage area work provides, it is small more several than the pull-up current that the PMOS of high voltage region work is provided
The order of magnitude causes striving unexpectedly for pull-up network and pulldown network abnormal fierce, so that traditional electric pressure converter cannot achieve
The conversion of Low threshold signal, and that there are Power leakages is bigger, input voltage range is narrow and turns from low-voltage to high voltage
The delay time changed longer problem.
CN107707246A discloses a kind of subthreshold voltage converter, as shown in Fig. 2, the first regular threshold voltage PMOS
Transistor MP1, the second regular threshold voltage PMOS transistor MP2, the first high threshold voltage PMOS transistor MP3, described first
The source electrode of regular threshold voltage PMOS transistor MP1 and the second regular threshold voltage PMOS transistor MP2 connect high power supply electricity respectively
Pressure, the drain electrode of the first regular threshold voltage PMOS transistor MP1 meet the first high threshold voltage PMOS transistor MP3
Source electrode, further includes: the first low threshold voltage NMOS transistor MN1, the second low threshold voltage NMOS transistor MN2, described
The source electrode of one low threshold voltage NMOS transistor MN1 is grounded, and the drain electrode of the second regular threshold voltage PMOS transistor MP2 connects
The source electrode of the drain electrode of the second low threshold voltage NMOS transistor MN2, the second low threshold voltage NMOS transistor MN2 connects
Ground, the grid of the first regular threshold voltage PMOS transistor MP1 and the second regular threshold voltage PMOS transistor MP2
Pole connects the drain electrode of the first regular threshold voltage PMOS transistor MP1, the first high threshold voltage PMOS transistor MP3's
Grid connects the drain electrode of the second regular threshold voltage PMOS transistor MP2；Meanwhile by the first low threshold voltage NMOS
The grid of transistor MN1 connects one end of input buffer as the first input end of the current mirror, by second Low threshold
The other end of the grid of voltage NMOS transistor MN2 as the second input termination input buffer of the current mirror；It will be described
First output end of the drain electrode of first regular threshold voltage PMOS transistor MP1 as the current mirror is normal by described second
Second output terminal of the drain electrode of threshold voltage PMOS transistor MP2 as the current mirror.The level proposed in the present embodiment turns
The CMOS level shifting circuit of parallel operation is realized as shown in Fig. 2, and multi-threshold device (MTCMOS) technology can be preferably simultaneously used
Optimize propagation delay and reduce energy consumption, using the electric with the use of CMOS level conversion has been advanced optimized of multi-threshold device
The design on road.Although such subthreshold voltage converter is able to achieve the conversion of the voltage within the scope of low input, still, circuit
The transistor using a variety of threshold values is needed during designing and producing, and it is very big to design and produce difficulty.
Utility model content
The full swing voltage that the technical problem to be solved by the utility model is to provide a kind of for calculating equipment converts electricity
Road, foregoing circuit can be realized the conversion from input low-voltage to output HIGH voltage.
To achieve the goals above, the utility model provides a kind of voltage conversion circuit, comprising:
Input terminal, the input for the first level signal；
Output end, the output for second electrical level signal；
Differential Input unit, for the first level signal of input terminal described in reverse phase, and output difference input signal；
Converting unit, for by the first level conversion of the differential input signal at second electrical level signal；
Output driving unit, for exporting the second electrical level signal to the output end；
It wherein, further include the auxiliary drop-down unit being arranged between the input terminal and the converting unit, the auxiliary
Drop-down unit receives the feedback signal of the output driving unit.
Above-mentioned voltage conversion circuit, wherein the converting unit raising identifies that the ability of the differential input signal is
The auxiliary drop-down unit access realization to form the converting unit is connected by the auxiliary drop-down unit.
Above-mentioned voltage conversion circuit, wherein the auxiliary drop-down unit includes two or more transistors, institute
Two or more transistors are stated to be sequentially connected in series.
Above-mentioned voltage conversion circuit, wherein the auxiliary drop-down unit includes the first NMOS transistor and second
NMOS transistor, first NMOS transistor and second NMOS transistor are connected in series.
Above-mentioned voltage conversion circuit, wherein the grid of first NMOS transistor is connect with input signal, and described
The grid of bi-NMOS transistor is connect with the output driving unit.
Above-mentioned voltage conversion circuit, wherein the output driving unit includes the first phase inverter and the second phase inverter,
First phase inverter is connect with the second inverter series, and the output end of first phase inverter exports the feedback signal.
To achieve the goals above, the utility model also provides a kind of Data Computation Unit, the control including interconnection connection
Circuit, computing circuit, storage circuit and multiple voltage conversion circuits, wherein the multiple voltage conversion circuit is above-mentioned
Voltage conversion circuit described in one kind of anticipating.
To achieve the goals above, the utility model also provides a kind of chip, wherein the chip includes above-mentioned data fortune
Calculate unit.
To achieve the goals above, the utility model also provides a kind of for calculating the calculation power plate in equipment, wherein described
Calculating power plate includes multiple above-mentioned chips.
To achieve the goals above, the utility model also provides a kind of calculating equipment, including power panel, control panel, connection
Plate, radiator and multiple calculation power plates, the control panel are connect by the connecting plate with the calculation power plate, and the radiator is set
It sets around the calculation power plate, the power panel is used for the connecting plate, the control panel, the radiator and described
It calculates power plate and power supply is provided, wherein the calculation power plate is above-mentioned calculation power plate.
The beneficial functional of the utility model is: can be realized the conversion from input low voltage range to output HIGH voltage.
The utility model is described in detail below in conjunction with the drawings and specific embodiments, but not as to the utility model
Restriction.
Detailed description of the invention
Fig. 1 is existing voltage translator circuit schematic diagram；
Fig. 2 is existing subthreshold voltage converter circuit schematic diagram；
Fig. 3 is the utility model voltage conversion circuit schematic diagram；
Fig. 4 is the circuit diagram of the utility model voltage conversion circuit；
Fig. 5 is the utility model Data Computation Unit schematic diagram；
Fig. 6 is the utility model chip schematic diagram；
Fig. 7 is that the utility model calculates power plate schematic diagram；
Fig. 8 is that the utility model calculates equipment schematic diagram.
Wherein, appended drawing reference:
10- voltage conversion circuit 11- Differential Input unit
12- converting unit 13- assists drop-down unit
14- output driving unit 15- input terminal
16- output end 103- high-voltage power supply end
104- low voltage power supply end 105- phase inverter
106,107,111,113,115-PMOS transistor
108,109,110,112,114,116-NMOS transistor
118,119,120,121- node
122- high voltage ground terminal 123- low-voltage ground terminal
700- Data Computation Unit 701- control circuit
702- computing circuit 703- storage circuit
800- chip 801- control unit
900- calculates power plate 1000- and calculates equipment
1001- connecting plate 1002- control panel
1003- radiator 1004- power panel
Specific embodiment
Some vocabulary has been used in specification and subsequent claim to censure specific components.Have in fields
Usually intellectual is, it is to be appreciated that manufacturer may call the same component with different nouns.This specification and subsequent
Claim not by the difference of title as distinguish component in a manner of, but with the difference of component functionally as
The criterion of differentiation.
" comprising " and "comprising" mentioned in working as in specification in the whole text and subsequent claim are an open use
Language, therefore should be construed to " including but not limited to ".In addition, " connection " word is directly and indirectly electrically to connect comprising any herein
Take over section.Indirect means of electrical connection includes being attached by other devices.
The structural principle of the utility model and working principle are described in detail with reference to the accompanying drawing:
Fig. 3 is the schematic diagram of the utility model voltage conversion circuit.As shown in figure 3, voltage conversion circuit 10 includes difference
Input unit 11, converting unit 12, auxiliary drop-down unit 13, output driving unit 14, input terminal 15 and output end 16, this is defeated
Enter end 15 to pass through Differential Input unit 11, auxiliary drop-down unit 13 respectively or directly connect with converting unit 12, converting unit 12
Output driving unit 14 is connected, auxiliary drop-down unit 13 receives the feedback signal of output driving unit 14, output driving unit 14
Connect output end 16.
Embodiment one
Fig. 4 is the circuit diagram of voltage conversion circuit of the present invention.In example 1, in conjunction with shown in Fig. 3, Fig. 4, electricity
Voltage conversion circuit 10 includes input terminal 15, output end 16, high-voltage power supply end 103, low voltage power supply end 104, high voltage ground terminal
122 and low-voltage ground terminal 123.Wherein, high-voltage power supply end 103 connects high-voltage power supply VDDH, such as 0-1.8V, specifically
Can be for 1.2V, 1.8V etc., low voltage power supply end 104 connects low voltage power supply VDDL, such as 0-0.4V, concretely 0.3V,
0.4V etc., high voltage ground terminal 122 and low-voltage ground terminal 123 are grounded GND.
The Differential Input unit 11 of voltage conversion circuit 10 is phase inverter 105, and phase inverter 105 works in low supply voltage area
Domain, the power supply of phase inverter 105 are connected to low voltage power supply end 104, provide power supply by low-voltage source VDDL；Phase inverter 105 it is low
Voltage ground terminal 123 is directly grounded GND.The input terminal of phase inverter 105 is connect with the input terminal 15 of voltage conversion circuit 10, is inputted low
Level signal VIN, output end generate the low level signal NVIN, the low level signal VIN of input terminal 15 with 15 reverse phase of input terminal
And the low level signal NVIN of inverted 105 anti-phase output of device collectively forms differential input signal.
The converting unit 12 of voltage conversion circuit 10 include PMOS transistor 106,107,111 and NMOS transistor 108,
112.Wherein, PMOS transistor 106,111 constitute current-mirror structure, PMOS transistor 107 play the role of it is earth leakage protective,
NMOS transistor 108,112 is used as differential input transistor, receives the differential input signal that Differential Input unit 11 provides.PMOS
The source terminal of transistor 106,111 connects high-voltage power supply end 103, provides power supply by high-voltage power supply VDDH.PMOS transistor
106 drain electrode is connected to the source electrode of PMOS transistor 107, the drain electrode and the drain electrode of NMOS transistor 108 of PMOS transistor 107
Connection forms node 118.The source electrode of NMOS transistor 108 connects high voltage ground terminal 122.The drain electrode of PMOS transistor 111 and NMOS
The drain electrode of transistor 112 connects, and forms node 119, as the output end of converting unit 12, exports high level signal.NMOS is brilliant
The source electrode of body pipe 112 connects high voltage ground terminal 122.
The grid of PMOS transistor 106 and PMOS transistor 111 links together, and forms node 121, and be connected to PMOS
The drain electrode of transistor 106.The grid of PMOS transistor 107 is connected to node 119.The grid of NMOS transistor 108 connects voltage
The input terminal 15 of conversion circuit 10 receives input signal VIN.The output of the grid connection phase inverter 105 of NMOS transistor 112
End receives the signal NVIN with input signal reverse phase.
The output driving unit 14 of voltage conversion circuit 10 is by PMOS transistor 113, NMOS transistor 114 and PMOS
The two-stage phase inverter that transistor 115, NMOS transistor 116 are constituted cascades to be formed, and the input terminal of output driving unit 14 is connected to
The output end of converting unit 12, i.e. node 19.Node 120, the output end of output driving unit 14 are formed between two-stage phase inverter
It is connect with the output end 16 of voltage conversion circuit 10, the output as entire circuit.
The auxiliary drop-down unit 13 of voltage conversion circuit 10 is made of the NMOS transistor 109,110 being connected in series.NMOS
110 source electrode of transistor is connected to high voltage ground terminal 122, and drain electrode end is connect with the source electrode of NMOS transistor 109, NMOS transistor
109 drain electrode is connected to node 121.The grid of NMOS transistor 109 is connected to the input terminal 15 of voltage conversion circuit 10, connects
Receive input signal VIN.The grid of NMOS transistor 110 is connected to node 120.
The working principle of the present embodiment voltage conversion circuit 10 is as follows:
As shown in connection with fig. 4, the input terminal 15 of voltage conversion circuit 10 inputs VIN signal, and VIN can be " 0 ", indicates low electricity
It is flat, it is also possible to " 1 ", indicates high level.Phase inverter 105 will input VIN signal and carry out reverse phase, generate NVIN signal.Wherein,
The grid of VIN connection NMOS transistor 108, one of input as converting unit 12；NVIN connection NMOS transistor 112
Grid, as converting unit 12 another input.Due to being inversion signal between VIN, NVIN, when VIN is " 0 ",
NVIN is " 1 ", and when VIN is " 1 ", NVIN is " 0 ".Therefore, always have one among NMOS transistor 108 and NMOS transistor 112
It is a in the conductive state.
It should be noted that Differential Input unit 11 is phase inverter 105, phase inverter 105 works in low supply voltage region,
The power supply of phase inverter 105 is connected to low voltage power supply end 104.Therefore, when 15 input high level signal " 1 " of input terminal, actually refer to
VDDL level.The converting unit 12 of voltage conversion circuit 10 works in high power supply voltage region, is provided by high-voltage power supply VDDH
Power supply.At the VDDH of high power supply voltage region, the VDDL in low supply voltage region input can only NMOS crystal to Differential Input
Pipe 108 and NMOS transistor 112 realize the effect of " semi-open " or " weak unlatching ".
When VIN input is " 0 ", NVIN is " 1 ", and NMOS transistor 108 ends, and node 118 is in high level, state
It remains unchanged.NMOS transistor 112 is connected, and drop-down access is formed between node 119 and ground, and node 119 is low level " 0 ".
Existing voltage conversion circuit 10 does not include auxiliary drop-down unit 13.When VIN input becomes " 1 " from " 0 ", NVIN
Become " 0 " from " 1 ", NMOS transistor 108 becomes weak unlatching from cut-off, and NMOS transistor 112 ends, NMOS transistor 108 with
Current path is formed between ground, the voltage at node 118 is pulled down.Previous state at node 119 is low level " 0 ", due to
The effect of circuit delay, the level at node 119 is maintained as " 0 ", so that PMOS transistor 107 is in the open state, node
Voltage at 121 can form drop-down trend with the conducting of PMOS transistor 107, NMOS transistor 108.
However, forming diode connection type, node since the grid of PMOS transistor 106, drain electrode link together
The pull-up that voltage at 121 will receive PMOS transistor 106 influences.Since NMOS transistor 108 works in subthreshold conduction shape
Under state, drop-down effect can be seriously affected, in some instances it may even be possible to can pull up and be formed clamper by PMOS transistor 106, be unable to reach output
Overturning.
In addition, NMOS transistor 112 ends when VIN input is " 1 ", the level at node 119 is high level, and PMOS is brilliant
Body pipe 107 ends, thus the DC channel for blocking PMOS transistor 106 and NMOS transistor 108 while opening.And then it can drop
The power consumption of low voltage transition circuit 10.
Since the work of phase inverter 105 is at low voltage power supply VDDL, high level when VIN is " 1 " is namely
VDDL.When VDDL is too low, NMOS transistor 108 and NMOS transistor 112 work under sub-threshold status, at this time, it may be necessary to
Converting unit 12 is improved for the discrimination of the differential signal of two input terminals.
After introducing auxiliary drop-down unit 13, when VIN input becomes " 1 " from " 0 ", NVIN becomes " 0 " from " 1 ", due to
The effect of circuit delay, the level at node 120 are maintained as " 1 ", so that the NMOS transistor 110 in auxiliary drop-down unit 13
It opens, NMOS transistor 109 also synchronizes weak unlatching, generates two drop-down accesses to the voltage at node 121, is PMOS crystalline substance respectively
Two drop-down accesses that body pipe 107, NMOS transistor 108 and NMOS transistor 109, NMOS transistor 110 are formed.Work as section
After point 121 is pulled down, PMOS transistor 111 is connected, and NMOS transistor 112 ends, so that the voltage at node 119 is pulled up
It is final to realize output jump to VDDH.
After level at node 119 becomes " 1 ", PMOS transistor 107 end, close PMOS transistor 107,
The drop-down access that NMOS transistor 108 is formed；At this point, the level at node 120 becomes " 0 ", NMOS transistor 110 ends, and closes
The drop-down access for having closed NMOS transistor 109, NMOS transistor 110, has thereby turned off DC channel, has prevented direct current from ganging up.
Wherein, NMOS transistor 109,110 is low threshold voltage transistor, the quantity of NMOS transistor can also be it is multiple,
Multiple NMOS transistors are connected in series, and simultaneously turn on when input becomes " 1 " from " 0 ".
It can be seen that not only passing through NMOS transistor between node 121 and ground after introducing auxiliary drop-down unit 13
108 and PMOS transistor 107 form drop-down access, also pass through the NMOS transistor 109 in auxiliary drop-down unit 13,110 shapes
At drop-down access.To the level at node 119 is pulled up to rapidly " 1 ", the level at node 119 is then become from ground level
High-voltage power supply VDDH level.
Therefore, by the voltage conversion circuit of the utility model 10, when input terminal 15, which may be implemented, becomes " 1 " from " 0 ", i.e.,
When becoming low voltage power supply VDDL level from ground level, output end 16 becomes high-voltage power supply VDDH level from ground level, realizes
Conversion of the low-voltage VDDL to high voltage VDDH.
When VIN input becomes " 0 " from " 1 ", NVIN is become " 1 " from " 0 ", and the level at node 119 is under previous state
For " 1 ", PMOS transistor 107 is closed；Level at node 120 is " 0 " under previous state, and NMOS transistor 110 is closed；Section
Voltage at point 121 does not pull down access, and current potential is stable at the diode connection type of PMOS transistor 106, that is, compares VDDH
The threshold voltage of a low PMOS transistor 106, i.e. VDDH-Vth, and the Vds of PMOS transistor 111 is that 0, Vgs is at this time
Vth, PMOS transistor 111 are in off state, and the weak unlatching of NMOS transistor 112 enough pulls down the voltage at node 119
It is overturn to circuit output.
Embodiment two
Fig. 4 is the circuit diagram of voltage conversion circuit of the present invention.In example 2, in conjunction with shown in Fig. 3, Fig. 4, voltage
Conversion circuit 10 includes input terminal 15, output end 16, high-voltage power supply end 103, low voltage power supply end 104, high voltage ground terminal 122
And low-voltage ground terminal 123.Different from embodiment one is only in that low voltage power supply end 104 connects low voltage power supply VDDL,
Such as 0.4-0.8V, 0.8-1.2V, concretely 0.7V, 0.8V, 1.1V, 1.2V, low-voltage ground terminal 123 is with connecing low-voltage
VSSL, such as 0-0.4V, 0.4-0.8V, concretely 0.3V, 0.4V, 0.7V, 0.8V.Other circuit structures and connection are closed
System is the same as example 1, and details are not described herein.
The working principle of the present embodiment voltage conversion circuit 10 is as follows:
As shown in connection with fig. 4, the input terminal 15 of voltage conversion circuit 10 inputs VIN signal, and VIN can be " 0 ", indicates low electricity
Flat VSSL is also possible to " 1 ", indicates high level VDDL.Phase inverter 105 will input VIN signal and carry out reverse phase, generate NVIN letter
Number.
It is the same as example 1, when VIN input is that " 0 " is VSSL, NVIN is that " 1 " is VDDL, NMOS transistor
108 cut-offs, the state of node 118 remain unchanged；NMOS transistor 112 is connected, and drop-down access is formed between node 119 and ground,
Node 119 is " 0 ".
When VIN input, which becomes " 1 " from " 0 ", becomes VDDL from VSSL, NVIN becomes " 0 " i.e. from " 1 " to be become from VDDL
VSSL, the level at node 119 then become high-voltage power supply VDDH level from ground level GND.
Therefore, voltage conversion circuit 200 through this embodiment, input terminal 15 may be implemented to be become from low level VSSL
When high level VDDL, output end 16 becomes high-voltage power supply VDDH level from ground level GND, realize low-voltage VSSL-VDDL to
The conversion of high voltage GND-VDDH.
The utility model also provides a kind of Data Computation Unit, and Fig. 5 is the utility model Data Computation Unit schematic diagram.Such as
Shown in Fig. 5, Data Computation Unit 700 turns including control circuit 701, computing circuit 702, storage circuit 703 and multiple voltages
Change circuit 10.Control circuit 701 carries out voltage by voltage conversion circuit 10 to the data read from storage circuit 703 and turns
It changes, the data of 702 pairs of computing circuit readings carry out operation, then are exported operation result by control circuit 701.
The utility model also provides a kind of chip, and Fig. 6 is the utility model chip schematic diagram.As shown in fig. 6, chip 800
Including control unit 801, and one or more Data Computation Units 700.Control unit 801 is defeated to Data Computation Unit 700
Enter data and handles the data that Data Computation Unit 700 exports.
The utility model also provides a kind of calculation power plate, and Fig. 7 is that the utility model calculates power plate schematic diagram.As shown in Fig. 7, often
Include on one or more chips 800 on one calculation power plate 900, Hash operation is carried out to the operational data that mine pond issues.
The utility model also provides a kind of calculating equipment, and the equipment that calculates is preferred for excavating the fortune of virtual digit currency
It calculates, certain calculating equipment can be used for other any magnanimity operations, and Fig. 8 is that the utility model calculates equipment schematic diagram.
As shown in figure 8, each, which calculates equipment 1000, includes connecting plate 1001, control panel 1002, radiator 1003, power panel 1004,
And one or more calculation power plates 900.Control panel 1002 is connect by connecting plate 1001 with power plate 900 is calculated, and radiator 1003 is set
It sets and is calculating around power plate 900.Power panel 1004 be used for the connecting plate 1001, control panel 1002, radiator 1003 and
It calculates power plate 900 and power supply is provided.
It should be noted that in the description of the present invention, term " transverse direction ", " longitudinal direction ", "upper", "lower", " preceding ",
The orientation or positional relationship of the instructions such as " rear ", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outside" be based on
Orientation or positional relationship shown in the drawings, is merely for convenience of describing the present invention and simplifying the description, and is not instruction or dark
Show that signified device or element must have a particular orientation, be constructed and operated in a specific orientation, therefore should not be understood as pair
The limitation of the utility model.
It is not only in the description and the implementation although the embodiments of the present invention have been disclosed as above
Listed utilization, it can be applied to various fields suitable for the present invention completely, for those skilled in the art,
Other modifications may be easily implemented, therefore without departing from the general concept defined in the claims and the equivalent scope, this reality
It is not limited to specific details and legend shown and described herein with novel.
In other words, the utility model can also have other various embodiments, without departing substantially from the spirit of the present invention and its essence
In the case where, those skilled in the art work as can make various corresponding changes and modifications, but this according to the utility model
A little corresponding changes and modifications all should belong to the protection scope of the utility model the attached claims.
Claims (10)
1. a kind of voltage conversion circuit, comprising:
Input terminal, the input for the first level signal；
Output end, the output for second electrical level signal；
Differential Input unit, for the first level signal of input terminal described in reverse phase, and output difference input signal；
Converting unit, for by the first level conversion of the differential input signal at second electrical level signal；
Output driving unit, for exporting the second electrical level signal to the output end；
It is characterized in that, further include the auxiliary drop-down unit being arranged between the input terminal and the converting unit, it is described auxiliary
Drop-down unit is helped to receive the feedback signal of the output driving unit.
2. voltage conversion circuit as described in claim 1, it is characterised in that: the converting unit, which improves, identifies that the difference is defeated
The ability for entering signal is that the auxiliary drop-down access realization to form the converting unit is connected by the auxiliary drop-down unit.
3. voltage conversion circuit as claimed in claim 2, it is characterised in that: the auxiliary drop-down unit includes two or two
Above transistor, described two or more than two transistors are sequentially connected in series.
4. voltage conversion circuit as claimed in claim 3, it is characterised in that: the auxiliary drop-down unit includes the first NMOS brilliant
Body pipe and the second NMOS transistor, first NMOS transistor and second NMOS transistor are connected in series.
5. voltage conversion circuit as claimed in claim 4, it is characterised in that: the grid of first NMOS transistor with it is described
First level signal of input terminal connects, and the grid of second NMOS transistor is described with the output driving unit
Feedback signal connection.
6. voltage conversion circuit as claimed in claim 5, it is characterised in that: the output driving unit includes the first phase inverter
And second phase inverter, first phase inverter are connect with the second inverter series, the output end output of first phase inverter
The feedback signal.
7. a kind of Data Computation Unit, control circuit, computing circuit, storage circuit and multiple voltages including interconnection connection turn
Change circuit, it is characterised in that: the multiple voltage conversion circuit is that voltage described in any one in claim 1-6 converts electricity
Road.
8. a kind of chip, which is characterized in that including the Data Computation Unit described in claim 7.
9. a kind of for calculating the calculation power plate in equipment, which is characterized in that including chip described in multiple claims 8.
10. a kind of calculating equipment, including power panel, control panel, connecting plate, radiator and multiple calculation power plates, the control panel
It is connect by the connecting plate with the calculation power plate, the radiator is arranged in around the calculation power plate, and the power panel is used
In to the connecting plate, the control panel, the radiator and the calculation power plate provide power supply, it is characterised in that: the calculation
Power plate is calculation power plate described in claim 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821544959.1U CN208985029U (en) | 2018-09-20 | 2018-09-20 | Voltage conversion circuit, data operation unit, chip, force calculation board and calculation equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821544959.1U CN208985029U (en) | 2018-09-20 | 2018-09-20 | Voltage conversion circuit, data operation unit, chip, force calculation board and calculation equipment |
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| Publication Number | Publication Date |
|---|---|
| CN208985029U true CN208985029U (en) | 2019-06-14 |
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| CN201821544959.1U Active CN208985029U (en) | 2018-09-20 | 2018-09-20 | Voltage conversion circuit, data operation unit, chip, force calculation board and calculation equipment |
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| CN (1) | CN208985029U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020057138A1 (en) * | 2018-09-20 | 2020-03-26 | 北京嘉楠捷思信息技术有限公司 | Full swing voltage conversion circuit and operation unit, chip, hashboard, and computing device using same |
| CN111030664A (en) * | 2019-12-30 | 2020-04-17 | 思瑞浦微电子科技（苏州）股份有限公司 | Interface circuit for high-low level conversion |
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2018
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020057138A1 (en) * | 2018-09-20 | 2020-03-26 | 北京嘉楠捷思信息技术有限公司 | Full swing voltage conversion circuit and operation unit, chip, hashboard, and computing device using same |
| US11409314B2 (en) | 2018-09-20 | 2022-08-09 | Canaan Creative Co., Ltd. | Full swing voltage conversion circuit and operation unit, chip, hash board, and computing device using same |
| CN111030664A (en) * | 2019-12-30 | 2020-04-17 | 思瑞浦微电子科技（苏州）股份有限公司 | Interface circuit for high-low level conversion |
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