CN208969164U - Biradical quasi- mutually inspection electrical parameter detection circuit and the electric energy computation chip of sample circuit - Google Patents

Abstract

The utility model provides biradical quasi- mutually inspection electrical parameter detection circuit and the electric energy computation chip of sample circuit.The circuit includes: sample circuit, obtains sampled voltage using Differential input circuit；Analog-digital converter converts sampled voltage as digital voltage signal and is input to signal processor；Reference signal source accesses sample circuit, output voltage signal to frequency processing module；Frequency processing module converts voltage signal into the clock signal comprising frequency signal, is input to comparator after frequency reducing；Reference clock, input reference clock signal to comparator；Comparator, comparison clock down-scaled signals and reference clock signal, comparison result input signal processor；Signal processor handles digital voltage signal based on comparative result, realizes electrical energy measurement and fault detection.The utility model inhibits common mode interference to improve measuring accuracy and anti-interference ability with difference sample circuit；A reference source electric signal determines circuit parameter variations；Reference clock and reference signal source, which are mutually examined, increases system reliability.

Description

Biradical quasi- mutually inspection electrical parameter detection circuit and the electric energy computation chip of sample circuit

Technical field

The utility model relates to asic (Application Specific Integrated Circuit, integrated circuit sets System) technical field, and in particular to biradical quasi- mutually inspection electrical parameter detection circuit and the electric energy computation chip of sample circuit.

Background technique

In intelligent electric meter field, measuring accuracy and reliability are most important, and the shadow that this is directly detected by voltage and current It rings, the detection of voltage generally uses bleeder circuit, and current detecting generally uses copper-manganese, current transformer etc..

Inventors have found that in practical applications, by such environmental effects, such as temperature, high current, electromagnetic field etc., being easy So that the parameter of sample circuit is changed, especially in current sample circuit, to common mode interference substantially without rejection ability, causes There is error in voltage measurement, eventually leads to electrical energy measurement and error occurs.Moreover, because its on-line monitoring and calibrating principle are based on A reference source is invariable, if a reference source is deviated, will appear the calibration result of mistake, electric energy error count is caused to measure Existing error.

Inventor also found, in metering chip, the frequency of chip clock directly affects sampling, energy metering accuracy. Under normal circumstances, which is reliable and stable, but is not excluded under some cases, and clock frequency is changed, this The problem of equally also resulting in electric energy error count amount.Therefore the parameter for monitoring sample circuit in real time guarantees measuring accuracy in permission Model defines problem nowadays in the urgent need to address.

Utility model content

Biradical quasi- mutually inspection electrical parameter detection circuit and the electric energy for being designed to provide sample circuit of the utility model embodiment Metering chip, common mode interference, a reference source and the base in parameter on-line monitoring and self-calibration circuit to solve the problems, such as sample circuit The integrity problem of punctual clock, and thereby result in the problem of parameter measurement error occurs, eventually leads to electric energy metering error.

The utility model embodiment provides a kind of biradical quasi- mutually inspection electrical parameter detection circuit of sample circuit, comprising:

Sample circuit obtains sampled voltage using Differential input circuit；

Analog-digital converter converts the sampled voltage as digital voltage signal, the digital voltage signal is input to letter Number processor；

Reference signal source accesses the sample circuit, output voltage signal to frequency processing module；

The voltage signal is converted into the clock signal comprising frequency signal, then is dropped by the frequency processing module Frequency obtains clock down-scaled signals, inputs the clock down-scaled signals to comparator；

Reference clock measures the clock of the electrical parameter detection circuit, and reference clock signal is input to the comparator；Institute Stating clock includes OSC (oscillator, the crystal oscillator) clock or inside RC clock (RC oscillating circuit clock) that external crystal generates；

The clock down-scaled signals and the reference clock signal are compared by the comparator, and comparison result is defeated Enter the signal processor；

The signal processor realizes electric energy meter based on the comparison as a result, handling the digital voltage signal Amount and fault detection.

Further, the frequency processing module includes:

The voltage signal is converted into the clock signal comprising frequency signal, inputs the clock signal by voltage-frequency module To frequency divider；

Clock signal progress frequency reducing is obtained clock down-scaled signals, inputs the clock frequency reducing letter by the frequency divider Number arrive the comparator.

Further, the frequency of the reference signal source is greater than mains frequency and is not the integral multiple of the mains frequency.

Further, the sample circuit include 3rd resistor R0, first resistor R1, second resistance R2, first capacitor C1, Second capacitor C2.

Further, the reference signal source includes reference voltage source, wherein

It is in parallel with the first capacitor C1 after the first resistor R1, second resistance R2, the second capacitor C2 series connection, after in parallel Circuit connect with the 3rd resistor R0 acquisition power grid N line and L line between voltage；Reference voltage source one end connection first The tie point of resistance R1, second resistance R2, the other end are connected to power ground.

Further, the reference signal source includes reference current source, detection module, wherein

The 3rd resistor R0 is connected between power grid L line and power ground, and one end of the first resistor R1 is connected to institute The tie point of 3rd resistor R0 Yu L line are stated, one end of the second resistance R2 is connected to the 3rd resistor R0 connection electricity The one end on source ground, the first resistor R1, second resistance R2 the other end pass through the first capacitor C1, the second capacitor C2 respectively After connect the power ground；

The detection module is connected in parallel with the 3rd resistor R0, and the reference current source and the detection module connect It connects, through the detection module output voltage signal to frequency processing module.

Further, one end of the analog-digital converter is connected to the company of the first resistor R1, the first capacitor C1 Connect end；The other end of the analog-digital converter is connected to the connecting pin of the second resistance R2, the second capacitor C2.

The utility model embodiment also provides a kind of electric energy computation chip, comprising:

Analog-digital converter converts sampled voltage as digital voltage signal, the digital voltage signal is input at signal Manage device；

Reference signal source accesses sample circuit, output voltage signal to frequency processing module；

The voltage signal is converted into the clock signal comprising frequency signal, then is dropped by the frequency processing module Frequency obtains clock down-scaled signals, inputs the clock down-scaled signals to comparator；

Reference clock measures the clock of the electrical parameter detection circuit, and reference clock signal is input to the comparator；Institute Stating clock includes the OSC clock or inside RC clock that external crystal generates；

The clock down-scaled signals and the reference clock signal are compared by the comparator, and comparison result is defeated Enter the signal processor；

The signal processor realizes electric energy meter based on the comparison as a result, handling the digital voltage signal Amount and fault detection.

Further, the frequency processing module includes:

The voltage signal is converted into the clock signal comprising frequency signal, inputs the clock signal by voltage-frequency module To frequency divider；

Clock signal progress frequency reducing is obtained clock down-scaled signals, inputs the clock frequency reducing letter by the frequency divider Number arrive the comparator.

Further, the reference signal source includes reference voltage source or the group including reference current source and detection module It closes.

The technical solution of the utility model, sample circuit part use difference channel, can effectively inhibit common mode interference, mention High measuring accuracy and anti-interference ability；By the signal characteristics generated on detection sample circuit by a reference source, to determine sampling Whether the parameter of circuit is changed；Meanwhile mutually being examined using reference clock and reference voltage, current source, it increases and is The reliability of system.

Detailed description of the invention

It, below will be to required in embodiment description in order to illustrate more clearly of the technical scheme in the embodiment of the utility model Attached drawing to be used is briefly described, it should be apparent that, the accompanying drawings in the following description is only some realities of the utility model Example is applied, it for those of ordinary skill in the art, without creative efforts, can also be according to these attached drawings Obtain other attached drawings.

Fig. 1 is the biradical quasi- mutually inspection electrical parameter detection circuit composition signal for the sample circuit that an embodiment of the present invention provides Figure；

Fig. 2 is that the biradical quasi- mutually inspection electrical parameter detection circuit composition for the sample circuit that another embodiment of the utility model provides shows It is intended to；

Fig. 3 is the electric energy computation chip composition schematic diagram that an embodiment of the present invention provides；

Fig. 4 is the electric energy computation chip composition schematic diagram that another embodiment of the utility model provides.

Specific embodiment

To keep the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, below with reference to attached drawing and reality Example is applied, the specific embodiment progress of technical solutions of the utility model in further detail, is clearly illustrated.However, being described below Specific embodiment and embodiment be for illustrative purposes only, rather than limitations of the present invention.It only contains this Utility model a part of the embodiment, instead of all the embodiments, various changes of the those skilled in the art for the utility model Change the other embodiments obtained, fall within the protection scope of the utility model.

Fig. 1 is the biradical quasi- mutually inspection electrical parameter detection circuit composition signal for the sample circuit that an embodiment of the present invention provides Figure, the circuit includes sample circuit 11, analog-digital converter 12, reference voltage source 13, frequency processing module 14, reference clock 15, comparator 16, signal processor 17.

Sample circuit 11 obtains sampled voltage using Differential input circuit.Analog-digital converter 12 converts the sampled voltage Digital voltage signal is input to signal processor 17 by digital voltage signal.Reference voltage source 13 accesses sample circuit 11, output Voltage signal is to frequency processing module 14.Voltage signal is converted into the clock comprising frequency signal and believed by frequency processing module 14 Number, then carry out frequency reducing and obtain clock down-scaled signals, input clock down-scaled signals to comparator 16.Reference clock 15 measures the ginseng Reference clock signal is input to comparator 16, when the clock includes the OSC that external crystal generates by the clock of number detection circuit Clock or inside RC clock.Clock down-scaled signals and reference clock signal are compared by comparator 16, and comparison result is inputted and is believed Number processor 17.Signal processor 17 is based on comparative result handled digital voltage signal, realizes electrical energy measurement and failure Detection.

Frequency processing module 14 includes voltage-frequency module 141, frequency divider 142.

Voltage signal is converted into the clock signal comprising frequency signal, input clock signal to frequency dividing by voltage-frequency module 141 Device 142.Clock signal progress frequency reducing is obtained clock down-scaled signals, input clock down-scaled signals to comparator 16 by frequency divider 142.

Sample circuit 11 includes 3rd resistor R0, first resistor R1, second resistance R2, first capacitor C1, the second capacitor C2. Wherein, circuit parallel connection after and the in parallel with first capacitor C1 after first resistor R1, second resistance R2, the second capacitor C2 series connection Voltage between three resistance R0 series connection acquisition power grid N line and L line；One end connection first resistor R1, the second electricity of reference voltage source 13 The tie point of R2 is hindered, the other end is connected to power ground.One end of analog-digital converter 12 is connected to first resistor R1, first capacitor C1 Connecting pin；The other end of analog-digital converter 12 is connected to the connecting pin of second resistance R2, the second capacitor C2.

The voltage of first resistor R1, the both ends second resistance R2 are converted into digital signal and are input to signal by analog-digital converter 12 Among processor 17.The voltage signal for being able to reflect reference voltage size is drawn from reference voltage source 13, is input to voltage-frequency mould Block 141.The voltage signal is converted into the clock signal input comprising frequency signal according to known relationship and arrived by voltage-frequency module 141 The clock is carried out frequency reducing, is input among comparator 16 by frequency divider 142, frequency divider 142.Meanwhile comparator 16 also receives and From the clock signal of chip reference clock, the frequency of the two is compared and result is inputed into signal processor 17.

Reference voltage source 13 is generally AC signal, and frequency f1 is greater than mains frequency f0 and is not the integer of mains frequency f0 Times.The mode as shown in the figure of reference voltage source 13 connects among difference sample circuit 11.

As seen from the figure, for being monitored online, whether the parameter for detecting outer detecting circuit changes reference voltage source 13. Reference voltage and network voltage are superimposed upon jointly on sample circuit 11, and the voltage signal that signal processor 17 obtains both contained Mains voltage signal also contains reference voltage signal, and signal processor 17 mentions the semaphore that frequency in the voltage signal is f0 The voltage to determine power grid is taken out, the semaphore that frequency is f1 is extracted, is compared with preset standard signal, is come Determine whether the parameter of sample circuit 11 is changed.

Since reference clock and reference voltage source 13 are usually reliable and stable, a kind of a reference source is only had under normal circumstances Shifting causes metering error occur, and the probability that the two goes wrong simultaneously is minimum.So if comparator 16 is determining all just Often, all there is no offsets, then carrying out normal electrical energy measurement.If the relationship of both discoveries of comparator 16 is changed, Then it is judged to having a kind of a reference source to be deviated, is further processed for signal processor 17.

Fig. 2 is the biradical quasi- mutually inspection electrical parameter detection circuit composition signal for the sample circuit that an embodiment of the present invention provides Figure, the circuit includes sample circuit 21, analog-digital converter 22, reference current source 28, detection module 29, frequency processing module 24, reference clock 25, comparator 26, signal processor 27.

Sample circuit 21 obtains sampled voltage using Differential input circuit.Analog-digital converter 22 converts the sampled voltage Digital voltage signal is input to signal processor 27 by digital voltage signal.Detection module 29 accesses sample circuit 21, benchmark electricity Stream source 28 is connect with detection module 29, through 29 output voltage signal of detection module to frequency processing module 24.Frequency processing module Voltage signal is converted into the clock signal comprising frequency signal by 24, then is carried out frequency reducing and obtained clock down-scaled signals, input clock Down-scaled signals are to comparator 26.Reference clock 25 measures the clock of the electrical parameter detection circuit, and reference clock signal is input to Comparator 26, clock include the OSC clock or inside RC clock that external crystal generates.Comparator 26 is by clock down-scaled signals and base Clock signal is compared, by comparison result input signal processor 27.Signal processor 27 is based on comparative result to number Voltage signal is handled, and realizes electrical energy measurement and fault detection.

Frequency processing module 24 includes voltage-frequency module 241, frequency divider 242.

Voltage signal is converted into the clock signal comprising frequency signal, input clock signal to frequency dividing by voltage-frequency module 241 Device 242.Clock signal progress frequency reducing is obtained clock down-scaled signals, input clock down-scaled signals to comparator 26 by frequency divider 242.

Sample circuit 21 includes 3rd resistor R0, first resistor R1, second resistance R2, first capacitor C1, the second capacitor C2. Wherein, 3rd resistor R0 is connected between power grid L line and power ground, and one end of first resistor R1 is connected to 3rd resistor R0 and L The tie point of line, one end of second resistance R2 are connected to one end of 3rd resistor R0 connection power ground, first resistor R1, the second electricity The other end of resistance R2 connects power ground after first capacitor C1, the second capacitor C2 respectively.

One end of analog-digital converter 22 is connected to the connecting pin of first resistor R1, first capacitor C1；Analog-digital converter 22 The other end is connected to the connecting pin of second resistance R2, the second capacitor C2.

The voltage of first resistor R1, the both ends second resistance R2 are converted into digital signal and are input to signal by analog-digital converter 22 Among processor 27.Reference current source 28 generates reference current signal, and detection module 29 is by reference current signal according to MS System is converted into voltage signal and is input to voltage-frequency module 241.The voltage signal is converted by voltage-frequency module 241 according to known relationship For clock signal input comprising frequency signal to frequency divider 242, which is carried out frequency reducing by frequency divider 242, is input to comparator Among 26.Meanwhile comparator 26 also receives the clock signal from chip reference clock, and the frequency of the two is compared and is incited somebody to action As a result signal processor 27 is inputed to.

28 frequency f1 of reference current source is greater than mains frequency f0 and is not the integral multiple of mains frequency f0.

As shown in Fig. 2, reference current source 28 is for being monitored online, whether the parameter for detecting outer detecting circuit becomes Change.The electric current of reference current source 28 through detection module 29 be converted into voltage and network voltage be superimposed upon jointly sample circuit 21 it On, the current signal that signal processor 27 obtains both had contained mains voltage signal and has also contained reference voltage signal, at signal The semaphore that frequency in the voltage signal is f0 is extracted the voltage to determine power grid by reason device 27, the signal for being f1 by frequency Amount extracts, and is compared with preset standard signal, to determine whether the parameter of sample circuit 21 is changed.

Since reference clock and reference current source 28 are usually reliable and stable, a kind of a reference source is only had under normal circumstances Shifting causes metering error occur, and the probability that the two goes wrong simultaneously is minimum.So if comparator 26 is determining all just Often, all there is no offsets, then carrying out normal electrical energy measurement.If the relationship of both discoveries of comparator 26 is changed, Then it is judged to having a kind of a reference source to be deviated, is further processed for signal processor 27.

Fig. 3 is the electric energy computation chip composition schematic diagram that an embodiment of the present invention provides, the electric energy computation chip Including analog-digital converter 32, reference voltage source 33, frequency processing module 34, reference clock 35, comparator 36, signal processor 37。

Analog-digital converter 32 converts sampled voltage as digital voltage signal, and digital voltage signal is input to signal processor 37.Reference voltage source 33 accesses sample circuit, output voltage signal to frequency processing module 34.Frequency processing module 34 is by voltage Signal is converted into the clock signal comprising frequency signal, then carries out frequency reducing and obtain clock down-scaled signals, input clock down-scaled signals To comparator 36.Reference clock 35 measures the clock of the electrical parameter detection circuit, and reference clock signal is input to comparator 36, Clock includes the OSC clock or inside RC clock that external crystal generates.Comparator 36 believes clock down-scaled signals and reference clock It number is compared, by comparison result input signal processor 37.Signal processor 37 is based on comparative result to digital voltage signal It is handled, realizes electrical energy measurement and fault detection.

Frequency processing module 34 includes voltage-frequency module 341, frequency divider 342.Voltage signal is converted into wrapping by voltage-frequency module 341 Clock signal containing frequency signal, input clock signal to frequency divider 342.Frequency divider 342 obtains clock signal progress frequency reducing Clock down-scaled signals, input clock down-scaled signals to comparator 36.

One end of reference voltage source 33 connects the tie point of first resistor R1, second resistance R2, and the other end is connected to power supply Ground.One end of analog-digital converter 32 is connected to the connecting pin of first resistor R1, first capacitor C1；The other end of analog-digital converter 32 It is connected to the connecting pin of second resistance R2, the second capacitor C2.

Sample circuit includes 3rd resistor R0, first resistor R1, second resistance R2, first capacitor C1, the second capacitor C2.Mould Number converter 32 by the voltage of first resistor R1, the both ends second resistance R2 be converted into digital signal be input to signal processor 37 it In.The voltage signal for being able to reflect reference voltage size is drawn from reference voltage source 33, is input to voltage-frequency module 341.Voltage-frequency The voltage signal is converted into the clock signal input comprising frequency signal to frequency divider 342 according to known relationship by module 341, The clock is carried out frequency reducing by frequency divider 342, is input among comparator 36.Meanwhile comparator 36 is also received from chip reference The frequency of the two is compared and result is inputed to signal processor 37 by the clock signal of clock.

For being monitored online, whether the parameter for detecting outer detecting circuit changes reference voltage source 33.Reference voltage The signal in source 33 is generally AC signal, and frequency f1 is greater than mains frequency f0 and is not the integral multiple of mains frequency f0.Benchmark electricity The mode as shown in Figure 3 of potential source 33 connects among difference sample circuit.

From the figure 3, it may be seen that reference voltage and network voltage are superimposed upon on sample circuit jointly, what signal processor 37 obtained Voltage signal had both contained mains voltage signal and has also contained reference voltage signal, and signal processor 37 is by the voltage signal intermediate frequency Rate is that the semaphore of f0 extracts the voltage to determine power grid, the semaphore that frequency is f1 is extracted, with preset mark Calibration signal is compared, to determine whether the parameter of sample circuit is changed.

Since reference clock and reference voltage source 33 are usually reliable and stable, a kind of a reference source is only had under normal circumstances Shifting causes metering error occur, and the probability that the two goes wrong simultaneously is minimum.So if comparator 36 is determining all just Often, all there is no offsets, then carrying out normal electrical energy measurement.If the relationship of both discoveries of comparator 36 is changed, Then it is judged to having a kind of a reference source to be deviated, is further processed for signal processor 37.

Fig. 4 is the electric energy computation chip composition schematic diagram that another embodiment of the utility model provides.The electrical energy measurement core Piece includes analog-digital converter 42, reference current source 48, detection module 49, frequency processing module 44, reference clock 45, comparator 46, signal processor 47.

Analog-digital converter 42 converts sampled voltage as digital voltage signal, and digital voltage signal is input to signal processor 47.Detection module 49 accesses sample circuit, and reference current source 48 is connect with detection module 49, believes through 49 output voltage of detection module Number arrive frequency processing module 44.Voltage signal is converted into the clock signal comprising frequency signal by frequency processing module 44, then into Row frequency reducing obtains clock down-scaled signals, input clock down-scaled signals to comparator 46.Reference clock 45 measures the parameter detecting Reference clock signal is input to comparator 46 by the clock of circuit, and clock includes the OSC clock or inside RC that external crystal generates Clock.Clock down-scaled signals and reference clock signal are compared by comparator 46, by comparison result input signal processor 47. Signal processor 47 is based on comparative result handled digital voltage signal, realizes electrical energy measurement and fault detection.

Frequency processing module 44 includes voltage-frequency module 441, frequency divider 442.Voltage signal is converted into wrapping by voltage-frequency module 441 Clock signal containing frequency signal, input clock signal to frequency divider 442.Frequency divider 442 obtains clock signal progress frequency reducing Clock down-scaled signals, input clock down-scaled signals to comparator 46.

Sample circuit includes 3rd resistor R0, first resistor R1, second resistance R2, first capacitor C1, the second capacitor C2.The Three resistance R0 are connected between power grid L line and power ground, and one end of first resistor R1 is connected to the connection of 3rd resistor R0 Yu L line Point, one end of second resistance R2 are connected to one end of 3rd resistor R0 connection power ground, first resistor R1, second resistance R2 it is another One end connects power ground after first capacitor C1, the second capacitor C2 respectively.Detection module 29 is connected in parallel with 3rd resistor R0, Reference current source 28 is connect with detection module 29, through 29 output voltage signal of detection module to frequency processing module 24.Modulus turns The voltage of first resistor R1, the both ends second resistance R2 are converted into digital signal and are input among signal processor 47 by parallel operation 42.

Detection module 49 accesses sample circuit, and reference current source 48 generates reference current signal, through detection module 49 by base Quasi- current signal is converted into voltage signal according to known relation and is input to voltage-frequency module 441.Voltage-frequency module 441 is by the voltage signal Be converted into the clock signal input comprising frequency signal to frequency divider 442 according to known relationship, frequency divider 442 by the clock into Row frequency reducing is input among comparator 46.Meanwhile comparator 46 also receives the clock signal from chip reference clock, by two The frequency of person is compared and result is inputed to signal processor 47.

48 frequency f1 of reference current source is greater than mains frequency f0 and is not the integral multiple of mains frequency f0.

As shown in figure 4, reference current source 48 is for being monitored online, whether the parameter for detecting outer detecting circuit becomes Change.The electric current of reference current source 48 is converted into voltage and network voltage through detection module 49 and is superimposed upon on sample circuit jointly, The voltage signal that signal processor 47 obtains both had contained mains voltage signal and has also contained reference voltage signal, signal processor The semaphore that frequency in the voltage signal is f0 is extracted the voltage to determine power grid by 47, and the semaphore that frequency is f1 is mentioned It takes out, is compared with preset standard signal, to determine whether the parameter of sample circuit is changed.

Since reference clock and reference current source 48 are usually reliable and stable, a kind of a reference source is only had under normal circumstances Shifting causes metering error occur, and the probability that the two goes wrong simultaneously is minimum.So if comparator 46 is determining all just Often, all there is no offsets, then carrying out normal electrical energy measurement.If the relationship of both discoveries of comparator 46 is changed, Then it is judged to having a kind of a reference source to be deviated, is further processed for signal processor 47.

It should be noted that each embodiment above by reference to described in attached drawing is only to illustrate the utility model rather than limits The scope of the utility model processed, those skilled in the art should understand that, in the spirit and model for not departing from the utility model The modification or equivalent replacement carried out under the premise of enclosing to the utility model, should all cover within the scope of the utility model. In addition, signified outer unless the context, the word occurred in the singular includes plural form, and vice versa.In addition, except non-specifically Illustrate, then any embodiment all or part of in combination with any other embodiment all or part of come using.

Claims (10)

1. a kind of biradical quasi- mutually inspection electrical parameter detection circuit of sample circuit, comprising:

Sample circuit obtains sampled voltage using Differential input circuit；

Analog-digital converter converts the sampled voltage as digital voltage signal, the digital voltage signal is input at signal Manage device；

Reference signal source accesses the sample circuit, output voltage signal to frequency processing module；

The voltage signal is converted into the clock signal comprising frequency signal, then carries out frequency reducing and obtain by the frequency processing module To clock down-scaled signals, the clock down-scaled signals are inputted to comparator；

Reference clock measures the clock of the electrical parameter detection circuit, and reference clock signal is input to the comparator；When described Clock includes the OSC clock or inside RC clock that external crystal generates；

The comparator, the clock down-scaled signals and the reference clock signal are compared, and comparison result is inputted institute State signal processor；

The signal processor, result handles the digital voltage signal based on the comparison, realize electrical energy measurement and Fault detection.

2. circuit according to claim 1, wherein the frequency processing module includes:

The voltage signal is converted into the clock signal comprising frequency signal by voltage-frequency module, input the clock signal to point Frequency device；

Clock signal progress frequency reducing is obtained clock down-scaled signals, inputs the clock down-scaled signals and arrive by the frequency divider The comparator.

3. circuit according to claim 1, which is characterized in that the frequency of the reference signal source is greater than mains frequency and not It is the integral multiple of the mains frequency.

4. circuit according to claim 1, which is characterized in that the sample circuit includes 3rd resistor R0, first resistor R1, second resistance R2, first capacitor C1, the second capacitor C2.

5. circuit according to claim 4, wherein the reference signal source includes reference voltage source, wherein

, electricity parallel connection after in parallel with the first capacitor C1 after the first resistor R1, second resistance R2, the second capacitor C2 series connection Road is connected with the 3rd resistor R0 acquires voltage between power grid N line and L line；

The tie point of reference voltage source one end connection first resistor R1, second resistance R2, the other end are connected to power ground.

6. circuit according to claim 4, wherein the reference signal source includes reference current source, detection module, In,

The 3rd resistor R0 is connected between power grid L line and power ground, and one end of the first resistor R1 is connected to described The tie point of three resistance R0 and L line, one end of the second resistance R2 are connected to the 3rd resistor R0 connection power ground One end, the first resistor R1, second resistance R2 the other end connect after the first capacitor C1, the second capacitor C2 respectively Connect the power ground；

The detection module is connected in parallel with the 3rd resistor R0, and the reference current source is connect with the detection module, warp The detection module output voltage signal is to frequency processing module.

7. circuit according to claim 5 or 6, wherein one end of the analog-digital converter is connected to the first resistor The connecting pin of R1, the first capacitor C1；The other end of the analog-digital converter is connected to the second resistance R2, described second The connecting pin of capacitor C2.

8. a kind of electric energy computation chip, comprising:

Analog-digital converter converts sampled voltage as digital voltage signal, the digital voltage signal is input to signal processor；

Reference signal source accesses sample circuit, output voltage signal to frequency processing module；

The voltage signal is converted into the clock signal comprising frequency signal, then carries out frequency reducing and obtain by the frequency processing module To clock down-scaled signals, the clock down-scaled signals are inputted to comparator；

Reference clock signal is input to the comparator by reference clock, the clock of measuring parameter detection circuit；The clock packet Include the OSC clock or inside RC clock of external crystal generation；

The comparator, the clock down-scaled signals and the reference clock signal are compared, and comparison result is inputted institute State signal processor；

The signal processor, based on the comparison as a result, handling the digital voltage signal, realize electrical energy measurement and Fault detection.

9. electric energy computation chip according to claim 8, which is characterized in that the frequency processing module includes:

The voltage signal is converted into the clock signal comprising frequency signal by voltage-frequency module, input the clock signal to point Frequency device；

Clock signal progress frequency reducing is obtained clock down-scaled signals, inputs the clock down-scaled signals and arrive by the frequency divider The comparator.

10. electric energy computation chip according to claim 8, which is characterized in that the reference signal source includes reference voltage Source or combination including reference current source and detection module.