CN205921705U - Decoder - Google Patents
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- CN205921705U CN205921705U CN201620855643.9U CN201620855643U CN205921705U CN 205921705 U CN205921705 U CN 205921705U CN 201620855643 U CN201620855643 U CN 201620855643U CN 205921705 U CN205921705 U CN 205921705U
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Abstract
The embodiment of the utility model discloses decoder, include: central authorities handle chip, at least one DSP decoder chips, interface chips, data interchange chip and first ethernet interface are exported to at least one, still include: receive the circuit, receive circuit and first ethernet interface, central authorities to handle chip, at least one DSP decoder chips, data interchange chip and at least one output interface chips and link to each other respectively for obtain the power through first ethernet interface from the ethernet and handle chip, at least one DSP decoder chips, data interchange chip and at least one output interface chips power supply for central authorities. Decoder adoption ethernet power supply in this scheme central authorities' processing chip obtains audio/video data stream from the ethernet when, receives the circuit to follow the ethernet and obtains the power, for the decoder power supply, does not need power adapter, and the convenience is on -the -spot to connect up, reduces installation cost simultaneously.
Description
Technical field
This utility model is related to the processing equipment of audio-video signal, particularly to a kind of decoder.
Background technology
Decoder is a kind of equipment that digital audio-video data stream decoded back can become analog audio-video signal, and application is non-
Often extensive.Existing decoder is supported from the original audio-video code stream of Network Capture or coding audio-visual code stream, i.e. audio and video data streams.
As shown in figure 1, existing decoder generally comprises central processing element 101, at least one Digital Signal Processing dsp
(digital signal processing) decoding chip 102, at least one output interface chip 103, data exchange chip
104th, Ethernet interface 105 and power supply adaptor 106.Wherein, central processing element 101 is used for connecing by Ethernet interface 105
Radio reception video data stream, and passed through data exchange chip 104 and be transferred to dsp decoding chip 102, dsp decoding chip 102 is right
This audio and video data streams is decoded processing, and after being reduced to analog audio-video signal, is transmitted by data exchange chip 104
To corresponding output interface chip 103, and then export external equipment, power supply adaptor 106 is then used for carrying for decoder functions
Power supply source.
Power because existing decoder is required to external power supply, not only increased trouble to field wiring, also add electricity
Source adapter and the installation cost of electric lines of force laying.
Utility model content
The purpose of this utility model embodiment is to provide a kind of decoder, to facilitate field wiring, reduces installation cost.
Technical scheme is as follows:
A kind of decoder, comprising: central processing element, at least one dsp decoding chip, at least one output interface core
Piece, data exchange chip and the first Ethernet interface；Also include: parasite power supplier,
Described parasite power supplier and described first Ethernet interface, central processing element, at least one dsp decoding chip, number
It is respectively connected with according to exchange chip and at least one output interface chip, for being obtained from Ethernet by described first Ethernet interface
Power taking source is that central processing element, at least one dsp decoding chip, data exchange chip and at least one output interface chip supply
Electricity.
Optionally, described parasite power supplier includes: by electrical chip and power conversion chipset；
Described it is respectively connected with described first Ethernet interface and power conversion chipset by electrical chip, by described first
Ethernet interface obtains power delivery to power conversion chipset from Ethernet；
Described power conversion chipset respectively with described central processing element, described dsp decoding chip, described data exchange
Chip and described output interface chip are connected, and are described central processing element, described dsp decoding chip, described data exchange core
Piece and described output interface chip are powered.
Optionally, described power conversion chipset includes primary power source conversion chip and multiple secondary power supply conversion chip；
Described primary power source conversion chip is respectively connected with by electrical chip and multiple secondary power supply conversion chip with described, each
Secondary power supply conversion chip respectively with described central processing element, described dsp decoding chip, described data exchange chip and described
Output interface chip is connected；
Described primary power source conversion chip carries out transmission after one-stage transfor-mation by described from the described power supply being obtained by electrical chip
Convert chip to each secondary power supply described, described each secondary power supply conversion chip will obtain from described primary power source conversion chip
The power supply taking carries out two-dimensional transform respectively, is transformed to described central processing element, described dsp decoding chip, described data exchange
Chip and the power supply of described output interface chip needs.
Optionally, described decoder also includes:
Power supply circuits, described power supply circuits are connected by electrical chip with described, and described power supply circuits include at least one power supply
Interface.
Optionally, described power supply circuits also include:
Power supply chip, described power supply interface be the second Ethernet interface, described power supply chip respectively with described by battery core
Piece, described central processing element and at least one second Ethernet interface described are connected.
Optionally, described central processing element pass through i2c bus respectively with described by electrical chip and described power supply chip phase
Even.
Optionally, described first Ethernet interface and the second Ethernet interface are rj45 network interface.
Optionally, described central processing element is connected by data/address bus with described data exchange chip, and described data is handed over
Change chip to be connected by data/address bus with least one dsp decoding chip described.
Optionally, described decoder also includes:
Usb interface, described usb interface is connected with described central processing element and described power conversion chipset respectively, by
Described power conversion chipset is powered.
Optionally, described decoder also includes:
Wifi process chip, described wifi process chip respectively with described central processing element and described power conversion chip
Group is connected, and is powered by described power conversion chipset.
Optionally, described decoder also includes:
Warning input interface circuit and warning output interface circuit, described warning input interface circuit and warning output interface
Circuit is connected with described power conversion chipset respectively, is powered by described power conversion chipset；
Described warning input interface circuit is connected with the warning input interface of described central processing element, described warning output
Interface circuit is connected with the warning output interface of described central processing element.
Optionally, described decoder also includes:
Speed signal processing circuit, phonetic entry external interface and voice external output interface, described Speech processing
Circuit, phonetic entry external interface and voice external output interface are connected with described power conversion chipset respectively, by described electricity
Source conversion chipset is powered；
Described phonetic entry external interface is connected with the speech input interface of at least one dsp decoding chip described, described
Voice output external interface is connect by the voice output of described speed signal processing circuit and at least one dsp decoding chip described
Mouth is connected.
This utility model embodiment provides a kind of decoder, comprising: central processing element, at least one dsp decoding core
Piece, at least one output interface chip, data exchange chip and the first Ethernet interface, also include: parasite power supplier, should be by electricity electricity
Road and the first Ethernet interface, central processing element, at least one dsp decoding chip, data exchange chip and at least one is defeated
Outgoing interface chip is respectively connected with, and is central processing element, at least for obtaining power supply by the first Ethernet interface from Ethernet
One dsp decoding chip, data exchange chip and at least one output interface chip are powered.It can be seen that, in this programme, decoder is adopted
With POE, while central processing element obtains audio and video data streams from Ethernet, parasite power supplier obtains from Ethernet
Power taking source, is that decoder is powered it is not necessary to power supply adaptor, facilitates field wiring, reduce installation cost simultaneously.
Brief description
In order to be illustrated more clearly that this utility model embodiment or technical scheme of the prior art, below will be to embodiment
Or in description of the prior art the accompanying drawing of required use be briefly described it should be apparent that, drawings in the following description are only
It is some embodiments of the present utility model, for those of ordinary skill in the art, in the premise not paying creative work
Under, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is the structural representation of existing decoder；
A kind of structural representation of decoder that Fig. 2 provides for this utility model embodiment；
A kind of structural representation of power conversion chipset that Fig. 3 provides for this utility model embodiment.
Specific embodiment
POE poe (power over ethernet), refers to connect up architecture in existing Ethernet
Under, moreover it is possible to provide direct current supply for such terminal unit while for some terminal unit transmission data signals based on ip
Technology.POE is using existing standard Ethernet transmission cable, transmits the standard criterion of data and electrical power simultaneously,
And maintain the compatibility with existing Ethernet system and user.Developing rapidly with network technology, poe technology also gradually from
Original only support small-power is powered, and updates support 60w, or even the power supply of the powerful device of more than 90w.This utility model
Embodiment is based on power over Ethernet, there is provided a kind of decoder.
Below in conjunction with the accompanying drawing in this utility model embodiment, the technical scheme in this utility model embodiment is carried out
Clearly and completely description is it is clear that described embodiment is only a part of embodiment of this utility model rather than whole
Embodiment.Based on the embodiment in this utility model, those of ordinary skill in the art are not under the premise of making creative work
The every other embodiment being obtained, broadly falls into the scope of this utility model protection.
This utility model provides a kind of decoder, as shown in Fig. 2 this decoder includes: central processing element 201, extremely
A few dsp decoding chip 202, at least one output interface chip 203, data exchange chip 204 and the first Ethernet interface
205；Also include: parasite power supplier 206.
Specifically, parasite power supplier 206 and the first Ethernet interface 205, central processing element 201, at least one dsp decoding
Chip 202, data exchange chip 204 and at least one output interface chip 203 are respectively connected with, for being connect by the first Ethernet
It is central processing element 201, at least one dsp decoding chip 202, data exchange chip 204 that mouth 205 obtains power supply from Ethernet
And at least one output interface chip 203 powers.
During this decoder functions, parasite power supplier 206 passes through the first Ethernet interface 205 and obtains power supply from Ethernet, for solution
The central processing element 201 of code device, at least one dsp decoding chip 202, data exchange chip 204 and at least one output connect
Mouth chip 203 is powered.Central processing element 201 obtains audio, video data again by the first Ethernet interface 205 from Ethernet
Flow, and passed through data exchange chip 204 and send at least one dsp decoding chip 202, dsp decoding chip 202 is to this sound
After video data stream decoding is processed, send to coupled output interface chip 203, and then export external equipment, for example
The equipment such as audio player, video player.
Wherein, central processing element 201 is connected by data/address bus with data exchange chip 204, data exchange chip 204
It is connected also by data/address bus with least one dsp decoding chip 202, to carry out the transmission of audio and video data streams.This data is total
Line can be that pcie bus etc. is existing can be with the data/address bus of transmission data.
It should be noted that central processing element 201 used in this utility model, dsp decoding chip 202, output connect
Mouth chip 203 and data exchange chip 204 all can adopt existing chip, it is possible to achieve corresponding function.For example, in
Centre process chip 201 can adopt central processing element of model mv78460 etc., and dsp decoding chip 202 can adopt model
Dsp decoding chip for hi3536 etc., output interface chip 203 can adopt output interface chip of model sil9024 etc..
Data exchange chip 204 can realize the chip of data exchanging function using pcie bridge chip, network chip etc., for example,
Pcie bridge chip of model pex8725 etc. can be adopted, here is not specifically limited.
Because the central processing element 201 in decoder, dsp decoding chip 202, output interface chip 203 and data are handed over
The supply voltage changing needed for chip 204 may be different.For ensureing each chip normal work, parasite power supplier 206 can be included by electricity
Chip 2061 and power conversion chipset 2062.
Wherein, it is respectively connected with the first Ethernet interface 205 and power conversion chipset 2062 by electrical chip 2061, by electricity
Chip 2061 passes through the first Ethernet interface 205 and obtains power supply from Ethernet, and transmits to power conversion chipset 2062.
Specifically, referring to Fig. 3, power conversion chipset 2062 can include primary power source conversion chip and multiple two grades of electricity
Source converts chip, and primary power source conversion chip is respectively connected with multiple secondary power supplies conversion chip.
Primary power source conversion chip is connected with by electrical chip 2601, and each secondary power supply conversion chip is processed with central authorities respectively
Chip 201, dsp decoding chip 202, data exchange chip 204 and output interface chip 203 are connected, and primary power source converts chip
Convert chip by carrying out transmitting after one-stage transfor-mation from the described acquisition power supply being obtained by electrical chip to each secondary power supply, each two
Level power supply converts chip and more further the power supply converting chip acquisition from primary power source is carried out two-dimensional transform, is transformed to centre
The power supply that reason chip 201, dsp decoding chip 202, data exchange chip 204 and output interface chip 203 need, and then be it
Power supply.
It should be noted that can be using existing model tps2378 by electrical chip, from ether by electrical chip 2061
Net obtains 53v power supply, and then the primary power source conversion chip transmitting to power conversion chipset 2062, and this primary power source converts
Chip and secondary power supply conversion chip can also adopt existing power conversion chip, and for example, the power supply of model lm5020 becomes
Change chip, can obtain 53v power conversion from Ethernet is 12v.
Need further exist for illustrating, the number that the secondary power supply in power conversion chipset 2062 converts chip can root
According to central processing element 201, at least one dsp decoding chip 202, data exchange chip 204 and at least one output interface core
Supply voltage needed for piece 203 determines.The 53v power supply obtaining from Ethernet is carried out one-level change by primary power source conversion chip,
After being transformed to 12v, chip can be converted by secondary power supply and further the power supply of 12v be carried out two-dimensional transform, be transformed to voltage
Lower power supply, such as 5v, 3.3v, 0.9v etc. are the chip power supplies such as central processing element 201, dsp decoding chip 202 it is ensured that
There is provided suitable running voltage for different chips.
It is understood that different supply voltages needs to convert by different power conversion chips to obtain, so
The different chip of required supply voltage or some chip needing multiple different power voltage, require connect to different electricity
Source converts chip.And required supply voltage identical chip, then may be coupled to same power conversion chip.
For example, the central processing element 201 of model mv78460 needs five different supply voltages, respectively
3.3v, 1.8v, 1.5v, 1.05v and 0.9v, then this central processing element 201 be accomplished by with power conversion chipset 2062 in
Five secondary power supplies conversion chips be respectively connected with, this five secondary power supplies conversion chips are respectively central processing elements 201 and carry
Power supply for 3.3v, 1.8v, 1.5v, 1.05v and 0.9v.The dsp decoding chip 202 of model hi3536 need three different
Supply voltage, respectively 3.3v, 1.5v and 0.9v, then the secondary power supply of 3.3v supply voltage can be provided to convert chip just same
When be connected to this dsp decoding chip 202 and this central processing element 201, in the same manner it is provided that 1.5v and 0.9v supply voltage
Secondary power supply conversion chip can also be simultaneously connected to this dsp decoding chip 202 and this central processing element 201, so permissible
Simplify the connection of circuit, be easy to operate.
In a kind of embodiment of the present utility model, this decoder can also include power supply circuits 207, for for external
Equipment is powered.Power supply circuits 207 may include that power supply chip 2071 and at least one second Ethernet as power supply interface connect
Mouthfuls 2072, power supply chip 2071 respectively with by electrical chip 2061, central processing element 201 and at least one the second Ethernet interface
2072 are connected.
Specifically, power supply chip 2071 is connected with by electrical chip 2061, is passed through the first ether to obtain by electrical chip 2061
The power supply that network interface 205 obtains from Ethernet, and then electric work is supplied to having poe by least one second Ethernet interface 2072
External equipment (such as ip video camera, the ip phone etc.) power supply of energy.To this external equipment power while, decoder can also lead to
Cross the second Ethernet interface 2702 and receive the data that this external equipment sends.For example, when the second Ethernet interface 2072 is taken the photograph with ip
When camera connects, decoder is powered for ip video camera by the second Ethernet interface 2072, meanwhile, ip camera acquisition audio frequency and video
Information, carries out process to it and obtains after audio and video data streams, can be by the second Ethernet interface 2072 by this audio, video data
After stream sends to the central processing element 201 of decoder, and then decoder can be decoded to this audio and video data streams processing,
Export to external equipments such as video players, to realize the function of the audio/video information synchronism output of ip camera acquisition.
Central processing element 201 can be connected with by electrical chip 2061 and power supply chip 2071 respectively by i2c bus, to control
System and monitoring, by the working condition of electrical chip 2061 and power supply chip 2071, specifically can pass through i2c bus, and central authorities are processed core
The i2c interface of piece 201 is connected with the i2c interface by electrical chip 2061 and power supply chip 2071 respectively.
External equipment due to being connected with least one second Ethernet interface 2072 may have multiple, power supply chip 2071
The information such as the type of these external equipments and required output power can be detected, send to central processing element 201, centre
Reason chip 201 just can send a control signal to power supply chip 2071 by i2c bus, to control power supply according to these information
Chip 2071 is preferentially powered to some or certain external equipment, so just can realize the dynamic resource management of power supply and preferential confession
The functions such as electricity.
Need explanation, above-mentioned first Ethernet interface 205 and the second Ethernet interface 2072 can be all existing ether
Rj45 network interface in net, is this decoder and external equipment is powered to facilitate using existing power over Ethernet.
In a kind of embodiment of the present utility model, this decoder can also include usb interface 208.Usb interface 208
Can be connected with central processing element 201 and power conversion chipset 2062 respectively, be powered by power conversion chipset 2062.
Usb interface 208 is used for connecting other equipment, and central processing element 201 passes through usb interface 208 and receives and usb interface
The data that the other equipment of 208 connections sends, and then this data is processed.For example, central processing element 201 passes through usb
Interface 208 receives video data stream, and video data stream to dsp decoding chip 202 is decoded processing, and then by exporting
Interface chip 203 exports.Usb interface 208 provides another kind of audio frequency and video number in addition to the first Ethernet interface 205 for this decoder
According to stream Acquisition channel, user-friendly.
In a kind of embodiment of the present utility model, this decoder can also include wifi process chip 209.At wifi
Reason chip 209 is connected with central processing element 210 and power conversion chipset 2062 respectively, is supplied by power conversion chipset 2062
Electricity.Wifi process chip 209 provides, for decoder, the function of connecting wireless network, has expanded decoder further and has obtained audio frequency and video
The mode of data flow, simultaneously can also by the audio and video data streams receiving by wireless network be forwarded to other decoding devices or
It is uploaded to network, the transmission of audio and video data streams can be facilitated.May naturally be used for the audio, video data after decoding process
Sent to other equipment by wifi process chip 209 or be uploaded to network.
Need explanation, wifi process chip 209 can adopt existing wifi process chip, it is for instance possible to use type
Wifi process chip number for 8188eus, here is not specifically limited.
In a kind of embodiment of the present utility model, this decoder can also include warning input interface circuit 210 He
Warning output interface circuit 211.Warning input interface circuit 210 and warning output interface circuit 211 respectively with power conversion core
Piece group 2062 is connected, and is powered by power conversion chipset 2062.
Specifically, warning input interface circuit 210 and warning output interface circuit 211 can be connecing that discrete device is built
Mouth circuit, commonly required supply voltage is 5v.Warning input interface circuit 210 can be with the warning of central processing element 201
Input interface is connected, and warning output interface circuit 211 can be connected with the warning output interface of central processing element 201.Central authorities
Process chip 201 is passed through warning input interface circuit 210 and is received the warning being connected external equipment with warning input interface circuit 210
The excessively high information of information, such as device temperature, and then control and be connected warning device with warning output interface circuit 211 and reported
Alert, this warning device can be the existing warning device such as buzzer, alarm lamp.
Warning output interface circuit 211 can be used for the output of decoder itself alarm signal.Central processing element 201
The working condition of decoder all parts can be monitored, can also detect whether the audio and video data streams of acquisition safely may be used simultaneously
Lean on.When the working condition of decoder all parts abnormal, central processing element 201 can control and warning output interface
Circuit 211 connects warning device and is reported to the police, to ensure the safe and stable operation of decoder.
In a kind of embodiment of the present utility model, this decoder can also include: speed signal processing circuit 212,
Phonetic entry external interface 213 and voice external output interface 214, with process voice messaging.Speed signal processing circuit
212nd, phonetic entry external interface 213 and voice external output interface 214 are connected with power conversion chipset 2602, respectively by electricity
Source conversion chipset 2602 is powered.
Phonetic entry external interface 213 is connected with the speech input interface of at least one dsp decoding chip 202, and voice is defeated
Go out the voice output interface phase that external interface 214 passes through speed signal processing circuit 212 and at least one dsp decoding chip 202
Even.
Specifically, phonetic entry external interface 213 can connect the equipment such as microphone, for transmitting to dsp decoding chip 202
Voice messaging, after dsp decoding chip 202 is processed to it after receiving this voice messaging, by dsp decoding chip 202
Voice output interface by process after transmitting voice signal to speed signal processing circuit 212, by speed signal processing circuit 212
It is further processed, is then forwarded to the equipment being connected with voice output external interface 214, this equipment can be speaker
Or the equipment such as speech player.
It should be noted that speed signal processing circuit 212 such as can be used for voice signal is amplified, integrate at the routine
Process, existing speed signal processing circuit, process circuit of such as model sgm8903 etc. can be adopted, here is not done to be had
Body limits.
Need further exist for illustrating, in fig. 2, in order to clearly show that the annexation of each part in decoder, do not have
The connecting line faithful representation of part that with other, power conversion chipset 2602 is needed its power supply is had to go out, power conversion chipset
2602 are connected with dotted line frame, represent that all parts that power conversion chipset 2602 is dotted line inframe are powered.
It can be seen that, this utility model embodiment provides a kind of decoder, comprising: central processing element, at least one dsp solution
Code chip, at least one output interface chip, data exchange chip and the first Ethernet interface, also include: parasite power supplier, this is subject to
Circuit and the first Ethernet interface, central processing element, at least one dsp decoding chip, data exchange chip and at least
Individual output interface chip is respectively connected with, for by the first Ethernet interface from Ethernet obtain power supply be central processing element,
At least one dsp decoding chip, data exchange chip and at least one output interface chip are powered.This decoder adopts Ethernet
Power supply, while central processing element obtains audio and video data streams from Ethernet, parasite power supplier obtains power supply from Ethernet, is
Decoder is powered it is not necessary to power supply adaptor, facilitates field wiring, reduces installation cost simultaneously.
It should be noted that herein, such as first and second or the like relational terms are used merely to a reality
Body or operation are made a distinction with another entity or operation, and not necessarily require or imply these entities or deposit between operating
In any this actual relation or order.And, term " inclusion ", "comprising" or its any other variant are intended to
Comprising of nonexcludability, wants so that including a series of process of key elements, method, article or equipment and not only including those
Element, but also include other key elements being not expressly set out, or also include for this process, method, article or equipment
Intrinsic key element.In the absence of more restrictions, the key element that limited by sentence "including a ..." it is not excluded that
Also there is other identical element including in the process of described key element, method, article or equipment.
Each embodiment in this specification is all described by the way of related, identical similar portion between each embodiment
Divide mutually referring to what each embodiment stressed is the difference with other embodiment.
The foregoing is only preferred embodiment of the present utility model, be not intended to limit protection model of the present utility model
Enclose.All any modification, equivalent substitution and improvement made within spirit of the present utility model and principle etc., are all contained in this reality
With in new protection domain.
Claims (12)
1. a kind of decoder, comprising: central processing element, at least one dsp decoding chip, at least one output interface chip,
Data exchange chip and the first Ethernet interface；It is characterized in that, also include: parasite power supplier,
Described parasite power supplier is handed over described first Ethernet interface, central processing element, at least one dsp decoding chip, data
Change chip and at least one output interface chip is respectively connected with, for electricity is obtained from Ethernet by described first Ethernet interface
Source is that central processing element, at least one dsp decoding chip, data exchange chip and at least one output interface chip are powered.
2. decoder as claimed in claim 1 is it is characterised in that described parasite power supplier includes: by electrical chip and power conversion
Chipset；
Described it is respectively connected with described first Ethernet interface and power conversion chipset by electrical chip, by described first ether
Network interface obtains power delivery to described power conversion chipset from Ethernet；
Described power conversion chipset respectively with described central processing element, described dsp decoding chip, described data exchange chip
And described output interface chip is connected, be described central processing element, described dsp decoding chip, described data exchange chip and
Described output interface chip is powered.
3. decoder as claimed in claim 2 is it is characterised in that described power conversion chipset includes primary power source conversion core
Piece and multiple secondary power supply conversion chip；
Described primary power source conversion chip is respectively connected with by electrical chip and multiple secondary power supply conversion chip with described, each two grades
Power conversion chip respectively with described central processing element, described dsp decoding chip, described data exchange chip and described output
Interface chip is connected；
Described primary power source conversion chip will be carried out transmitting after one-stage transfor-mation to described each from the described power supply being obtained by electrical chip
Individual secondary power supply converts chip, and each secondary power supply described converts chip and will convert, from described primary power source, the power supply that chip obtains
Carry out two-dimensional transform respectively, be transformed to described central processing element, described dsp decoding chip, described data exchange chip and institute
State the power supply of output interface chip needs.
4. decoder as claimed in claim 3 is it is characterised in that described decoder also includes:
Power supply circuits, described power supply circuits are connected by electrical chip with described, and described power supply circuits include at least one power supply interface.
5. decoder as claimed in claim 4 is it is characterised in that described power supply circuits also include:
Power supply chip, described power supply interface be the second Ethernet interface, described power supply chip respectively with described by electrical chip, described
Central processing element and described second Ethernet interface are connected.
6. decoder as claimed in claim 5 it is characterised in that described central processing element pass through i2c bus respectively with institute
State and be connected by electrical chip and described power supply chip.
7. decoder as claimed in claim 6 is it is characterised in that described first Ethernet interface and the second Ethernet interface are equal
For rj45 network interface.
8. decoder as claimed in claim 7 is it is characterised in that described central processing element is led to described data exchange chip
Cross data/address bus to be connected, described data exchange chip is connected by data/address bus with described dsp decoding chip.
9. decoder as claimed in claim 8 is it is characterised in that described decoder also includes:
Usb interface, described usb interface is connected with described central processing element and described power conversion chipset respectively, by described
Power conversion chipset is powered.
10. decoder as claimed in claim 9 is it is characterised in that described decoder also includes:
Wifi process chip, described wifi process chip respectively with described central processing element and described power conversion chipset phase
Even, powered by described power conversion chipset.
11. decoders as claimed in claim 10 are it is characterised in that described decoder also includes:
Warning input interface circuit and warning output interface circuit, described warning input interface circuit and warning output interface circuit
It is connected with described power conversion chipset respectively, powered by described power conversion chipset；
Described warning input interface circuit is connected with the warning input interface of described central processing element, described warning output interface
Circuit is connected with the warning output interface of described central processing element.
12. decoders as claimed in claim 11 are it is characterised in that described decoder also includes:
Speed signal processing circuit, phonetic entry external interface and voice external output interface, described speed signal processing circuit,
Phonetic entry external interface and voice external output interface are connected with described power conversion chipset, respectively by described power conversion
Chipset is powered；
Described phonetic entry external interface is connected with the speech input interface of described dsp decoding chip, outside described voice output
Interface is connected with the voice output interface of described dsp decoding chip by described speed signal processing circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620855643.9U CN205921705U (en) | 2016-08-08 | 2016-08-08 | Decoder |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620855643.9U CN205921705U (en) | 2016-08-08 | 2016-08-08 | Decoder |
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| CN205921705U true CN205921705U (en) | 2017-02-01 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018214590A1 (en) * | 2017-05-26 | 2018-11-29 | 华为技术有限公司 | Power sourcing management method, device and system |
-
2016
- 2016-08-08 CN CN201620855643.9U patent/CN205921705U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018214590A1 (en) * | 2017-05-26 | 2018-11-29 | 华为技术有限公司 | Power sourcing management method, device and system |
| US11265179B2 (en) | 2017-05-26 | 2022-03-01 | Huawei Technologies Co., Ltd. | Power supply management method, device, and system |
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