CN205071166U - Novel mixed switch of video - Google Patents
Novel mixed switch of video Download PDFInfo
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- CN205071166U CN205071166U CN201520829153.7U CN201520829153U CN205071166U CN 205071166 U CN205071166 U CN 205071166U CN 201520829153 U CN201520829153 U CN 201520829153U CN 205071166 U CN205071166 U CN 205071166U
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Abstract
The utility model provides a novel mixed switch of video, switch module, video receiving circuit, upper and lower transfer circuit and video output circuit including the preliminary treatment of FPGA video, video receiving circuit connects the input of module is switched in the preliminary treatment of FPGA video, upper and lower transfer circuit and video output circuit connection the output of module is switched in the preliminary treatment of FPGA video. The utility model discloses the various types of video signal that insert unify to handle, alternate the format of the signal into suitable user display device and subsequent processing equipment, have solved that other equipment throughput is single, the price is high, shortcoming and defect such as convenient to use not.
Description
Technical field
The utility model relates to Video Supervision Technique, particularly, relates to a kind of Novel video mixing switch.
Background technology
In security monitoring market, video monitoring due to directly perceived, comprehensively, the feature such as to contain much information and occupy very large share.Along with the continuous progress of the technology such as video acquisition, transmission, display, storage, the mixed phenomenon of a large amount of original standard definition video equipment of current video monitoring market ubiquity and newly-built high definition video equipment.Meanwhile, due to the price advantage of SD equipment, a period of time still can be adopted as low side or ancillary equipment by user from now on.But, the application feature that this high standard definition coexists, cause user often to need high definition and SD two to overlap to switch and display device, construction cost is high, use is inconvenient, thus need a kind ofly can conveniently switch various signal and the equipment carrying out that fast and high quality high standard definition converts mutually, preferably high standard definition video network and Resource Fusion display with use.
On Vehicles Collected from Market this high standard definition switch and fusion device less, only equipment are also be mainly the application such as television broadcasting, program making and develop, and interface type is few, expensive, not network enabled management, video switch keyboard can not be used to control.
Utility model content
For defect of the prior art, the purpose of this utility model is to provide a kind of Novel video mixing switch, with the fusion switching problem solving high-definition video monitoring system, SD video monitoring system, digital video monitor system and analog video supervisory control system.The various types of vision signals of the utility model to access unify process, are transformed to the signal format of applicable user's display device and subsequent processing device, and control to carry out video switch easily and quickly by square key dish.
According to the Novel video mixing switch that the utility model provides, comprise FPGA video pre-filtering handover module, video reception circuit, upper down conversion circuit and video output circuit;
Described video reception circuit connects the input of described FPGA video pre-filtering handover module, and described upper down conversion circuit is connected the output of described FPGA video pre-filtering handover module with video output circuit.
Preferably, described video reception circuit comprises SD analog video decoder device, SDI equalizer, SDI deserializer and HDMI equalizer;
Described SD analog video decoder device is connected the input of FPGA video pre-filtering handover module with described HDMI equalizer; Described SDI equalizer connects FPGA video pre-filtering handover module by described SDI deserializer;
Described SD analog video decoder device is provided with CVBS video input interface; Described SDI equalizer is provided with SDI high definition serial digital input interface; Described HDMI equalizer is provided with HDMI high-definition multimedia input interface.
Preferably, described video output circuit comprises SDI serializer; The output of FPGA video pre-filtering handover module connects described SDI serializer;
Described upper down conversion circuit adopts upper down conversion chip, and described upper down conversion chip is provided with CVBS outputting video signal interface and HDMI outputting video signal interface; Described SDI serializer is provided with SDI outputting video signal interface.
Preferably, MCU and RS485 driver is also comprised;
Wherein, described MCU mono-aspect connects described FPGA video pre-filtering handover module, upper down conversion chip, SD analog video decoder device, SDI deserializer, HDMI equalizer and SDI serializer, connects described RS485 driver on the other hand.
Preferably, audio D/A conversion chip is also comprised;
Wherein, described FPGA video pre-filtering handover module connects described audio D/A conversion chip by I2S bus.
Preferably, also power transfer module is comprised;
Wherein, the input of described power transfer module connects external power source; Output connects described FPGA video pre-filtering handover module, described video reception circuit, described upper down conversion circuit and described video output circuit respectively.
Preferably, described MCU is by RS485 driver described in UART interface downlink connection;
Described RS485 driver connects corresponding core bus or external control keyboard.
Preferably, described SDI equalizer comprises a SDI equalizer and the 2nd SDI equalizer;
Wherein, a described SDI equalizer is all connected described SDI deserializer with described 2nd SDI equalizer.
Compared with prior art, the utility model has following beneficial effect:
1, various types of vision signals of the utility model access carry out unifying process, are transformed to the signal format of applicable user's display device and subsequent processing device, solve that miscellaneous equipment disposal ability is single, price is high, be not easy to the shortcoming and defect such as use;
2, the utility model realizes various video input interface by SD analog video decoder device, SDI equalizer, SDI deserializer and HDMI equalizer, achieve unified access and the mixing handoff functionality of analog video, high definition serial digital video and HDMI video, the unified display of various video signal can be merged, quick switching and management;
3, adopt FPGA video pre-filtering handover module as processor in the utility model, so have very large flexibility, can expand or cutting function according to the real needs of user, reach best cost performance and applicability;
4, the utility model is particularly suitable for the various signal of high standard definition and exists simultaneously, to switch speed and the very high monitoring place of requirement of real-time, meets the demand of user well, substantially increase the operating efficiency of watch-dog user of service.
Accompanying drawing explanation
By reading the detailed description done non-limiting example with reference to the following drawings, other features, objects and advantages of the present utility model will become more obvious:
Fig. 1 is structural representation of the present utility model;
Fig. 2 is the switching principle figure of FPGA video pre-filtering handover module in the utility model;
Fig. 3 is application schematic diagram of the present utility model.
Embodiment
Below in conjunction with specific embodiment, the utility model is described in detail.Following examples will contribute to those skilled in the art and understand the utility model further, but not limit the utility model in any form.It should be pointed out that to those skilled in the art, without departing from the concept of the premise utility, some distortion and improvement can also be made.These all belong to protection range of the present utility model.
In the present embodiment, the Novel video mixing switch that the utility model provides, comprises FPGA video pre-filtering handover module, video reception circuit, upper down conversion circuit and video output circuit; Described video reception circuit connects the input of described FPGA video pre-filtering handover module, and described upper down conversion circuit is connected the output of described FPGA video pre-filtering handover module with video output circuit.
Described video reception circuit comprises SD analog video decoder device, SDI (SerialDigitalInterface) equalizer, SDI deserializer and HDMI (HighDefinitionMultimediaInterface) equalizer; Described SD analog video decoder device is connected the input of FPGA video pre-filtering handover module with described HDMI equalizer; Described SDI equalizer connects described FPGA video pre-filtering handover module by described SDI deserializer.Described SD analog video decoder device is provided with CVBS (CompositeVideoBroadcastSignal) video input interface; Described SDI equalizer is provided with SDI high definition serial digital input interface; Described HDMI equalizer is provided with HDMI high-definition multimedia input interface.
Compatible PAL, NTSC, the SECAM tri-kinds of CVBS video input interface simulates SD video standard, SDI high definition serial digital input interface supports 720p, 1080i, the various high definition such as 1080p and 3GSDI video format, HDMI outputting video signal interface compatibility is from SD numeral to a series of video formats of high-definition digital video.For the audio signal be embedded in high definition serial digital interface signal, carry out de-embedding by FPGA video pre-filtering handover module in the utility model and in the HDMI (High Definition Multimedia Interface) signal exported to external audio playback equipment or be embedded into output again and high definition serial digital interface signal.
Described video output circuit comprises SDI serializer; The output of FPGA video pre-filtering handover module connects described SDI serializer; Described upper down conversion circuit adopts upper down conversion chip, and described upper down conversion chip is provided with CVBS outputting video signal interface and HDMI outputting video signal interface; Described SDI serializer is provided with SDI outputting video signal interface.
Described SD analog video decoder device (Decoder), for completing decoding and the digitlization of CVBS vision signal, is connected with FPGA by BT.656 digital parallel video interface; Described SDI equalizer (SDI-EQualizer), for realizing the cable equalization inputting SDI vision signal.Because the bandwidth of SDI vision signal is very wide, reach 1.5Gbps to 3Gbps, high fdrequency component wherein has larger decay after co-axial cables transport, causes waveform to be deteriorated.The effect of SDI equalizer recovers original waveform, exports to SDI deserializer below, described SDI deserializer (Deserializer), for being the wide LVDS signal of parallel 5-bit the SDI video signal conversion of serial input, extracting simultaneously and exporting corresponding clock signal, being connected to FPGA video pre-filtering handover module, described HDMI equalizer (HDMI-EQualizer), for compensating the high frequency attenuation of HDMI cable, wave shape equalization and recovery are carried out to the HDMI video signal of input, then the HDMI video signal after equilibrium is flowed to FPGA video pre-filtering handover module, described FPGA video pre-filtering handover module, for detecting CVBS vision signal state and the form of input, detect SDI vision signal state and form, detect HDMI video signal condition and form, HDMI video signal is converted to parallel signal, identify synchronizing information, CVBS, SDI, HDMI video signal is transformed to unified digital parallel form, so that downconverter in follow-up connection, the selection realizing various signal according to webmaster order exports, detect and extract the audio signal embedded in SDI vision signal, and be converted to audio frequency I2S form, the audio signal of the vision signal after the conversion that upper down conversion chip (Scaler) returns and de-embedding, be encapsulated as SDI parallel signal together, the vision signal that described FPGA video pre-filtering handover module exports delivers to upper down conversion chip by the BT.1120 STD bus of 20-bit, simultaneously in order to embedded audio signal in the final HDMI video signal exported, give upper down conversion chip de-embedding audio signal out by I2S bus, FPGA video pre-filtering handover module gives audio D/A conversion chip (AudioDAC) the audio signal of de-embedding by I2S bus, FPGA video pre-filtering handover module gives SDI serializer (Serializer) SDI parallel output signal, the output signal of FPGA video pre-filtering handover module, to the LED on device panel, shows the state of each signal and current selected video.
The Novel video mixing switch that the utility model provides, also comprises MCU and RS485 driver; Wherein, described MCU mono-aspect connects described FPGA video pre-filtering handover module, upper down conversion chip, SD analog video decoder device, SDI deserializer, HDMI equalizer and SDI serializer, connects described RS485 driver on the other hand., connect described RS485 driver on the other hand.The Novel video mixing switch that the utility model provides, also comprises audio D/A conversion chip; Wherein, described FPGA video pre-filtering handover module connects described audio D/A conversion chip by I2S bus.
The Novel video mixing switch that the utility model provides, also comprises power transfer module; Wherein, the input of described power transfer module connects external power source; Output connects described FPGA video pre-filtering handover module, described video reception circuit, described upper down conversion circuit and described video output circuit respectively.
Described MCU is by RS485 driver described in UART interface downlink connection; Described RS485 driver connects corresponding core bus or external control keyboard.Described SDI equalizer comprises a SDI equalizer and the 2nd SDI equalizer; Wherein, a described SDI equalizer is all connected described SDI deserializer with described 2nd SDI equalizer.
In the Novel video mixing switch that the utility model provides, also comprise power input interface and network management interface.Power transfer module (PowerConverter), backboard or the outside 5 ~ 12V DC power supply inputted, is converted to the various voltage such as 5V, 3.3V, 2.5V, 1.2V that device interior needs, uses to corresponding circuit module; MCU is by GPIO interface and FPGA video pre-filtering handover module, upper down conversion chip, SD analog video decoder device, SDI deserializer, HDMI equalizer and SDI serializer, the register of FPGA video pre-filtering handover module, upper down conversion chip, SD analog video decoder device, SDI deserializer, HDMI equalizer and SDI serializer can be read and write, thus complete monitoring to each chip, management and configuration.
The course of work of the Novel video mixing switch that the utility model provides is:
After system electrification, the program of FPGA video pre-filtering handover module and MCU automatically loads and runs.First MCU carries out initialization, configuration effort pattern to PGA video pre-filtering handover module, upper down conversion chip, SD analog video decoder device, SDI deserializer, HDMI equalizer and SDI serializer.SD analog video decoder device constantly detects the analog video signal whether having input, if had, decodes, and extract clock, digital sample and quantification, be converted to BT.656 signal and give FPGA video pre-filtering handover module.SDI equalizer and SDI deserializer constantly detect the high definition serial digital signal whether having input, if had, carry out equilibrium and unstring, and extracting clock, are converted to 5 bit LVDS signals and give FPGA video pre-filtering handover module.
After the HDMI video signal of HDMI equalizer to input carries out equilibrium, the serial data of clock and three passages is carried a FPGA video pre-filtering handover module.FPGA video pre-filtering handover module internal logic processes CVBS vision signal, HDMI video signal, SDI vision signal respectively, comprises the detection of various state and form, translation data width, extracts synchronizing information.
FPGA video pre-filtering handover module is inner delivers to multiselect one handover module each vision signal after process and corresponding clock signal.Described multiselect one module passes the instruction of coming according to MCU and selects corresponding vision signal, and is converted to BT.1120 interface and outputs to down conversion chip.FPGA video pre-filtering handover module exports to upper down conversion chip the audio signal of de-embedding by I2S bus simultaneously.
The video format information that MCU detects according to FPGA video pre-filtering handover module, carries out pattern configurations to upper down conversion chip, comprises the setting of filter parameter, color space parameters, input and output video format parameter etc.
Upper down conversion chip carries out upper down conversion according to the parameter arranged to video and exports HDMI video signal and CVBS vision signal.Upper down conversion chip exports the vision signal after a road conversion by the loopback of BT.1120 interface in addition to FPGA video pre-filtering handover module.The video of FPGAFPGA video pre-filtering handover module to loopback embeds the audio signal of original de-embedding, and then is transformed to 5 bit LVDS signals and exports to SDI serializer.SDI serializer carries out serialization 5 bit LVDS vision signals, exports to external interface through SDI cable driver.The audio frequency of FPGA video pre-filtering handover module de-embedding exports to the digital to analog conversion chip of audio frequency simultaneously, and the left and right acoustic channels stereo audio being converted to simulation exports.
In the present embodiment, in the Novel video mixing switch that the utility model provides, SD analog video decoder device adopts the ADV7180 chip of ADI company, can complete the conversion of CVBS vision signal to BT.656 signal; SDI equalizer adopts the DS30EA101 chip of TI company, and DS30EA101 chip is 0.15Gbps to the 3.125Gbps self adaptation cable equalizer of TI company, and the ability of equalization is effective by force, is applicable to SDI vision signal; SDI serializer adopts model to be the chip of DS32ELX0124, and the Clock Extraction that can complete SDI vision signal conciliates string manipulation; HDMI equalizer adopts model to be the chip of TMDS141, and TMDS141 chip has the portfolio effect of 8dB to HDMI video signal, can supplement 5 meters or longer cable attenuation; FPGA video pre-filtering handover module model is adopted to be the chip of XC6SLX9, XC6SLX9 chip is one of Spartan-6 Series FPGA of Xilinx, there is jumbo logical resource, embedded PLL and DCM clock module, I/O pin can process high frequency TMDS signal, there is very high cost performance and flexibility; Power supply changeover device adopts model to be that XRP7664 and AZ1117 chip completes supply voltage conversion; Upper down conversion chip adopts MDIN-380 chip to complete the upper down conversion of vision signal, and supports that HDMI exports, CVBS exports and BT.1120 exports simultaneously.SDI serializer adopts model to be serialization and the cable drive that the chip of DS32EL0421 completes SDI vision signal.Audio D/A conversion chip adopts model to be a low cost of the CirrusLogic of CS4344, the audio D/A conversion chip of wide dynamic range.MUC adopts STC11L60XE to be domestic single-chip microcomputer, low price, is easy to use, and is widely used both at home and abroad.RS485 driver adopts SP485 chip, and SP485 chip completes driving between UART and RS-485 signal and reception, can connect external keyboard or controller.
When the Novel video mixing switch using the utility model to provide can rack be installed, video switch keyboard is connected with the utility model by switch controller, the video switch of the different-format that just various video signal equipment can be exported shows to display screen, facilitates each video image of user's real time inspection.Each switch has CVBS video input signals, and SDI video input signals and the input of HDMI video input signal, perform corresponding switching according to the switching command of outside input, output to 1 HDMI to display.CVBS video input signals derives from front end analogue camera through the switching of analog matrix and exports, and SDI video input signals comes from the output of front end HD-SDI camera through SDI Inverse problem, and HDMI video input signal comes from digital decoder matrix.By the unified cooperation control of switch controller, reach the effect that every block display screen can show any video source image.
In order to realize the effect taken over seamlessly, the utility model inside must show various input source unification to a kind of video format, and the video synchronization signal that HDMI exports in handoff procedure simultaneously can not have interruption.Otherwise monitor meeting re-synchronization video source, will cause the blank screen a bit of time, and make handover operation to the slack sensation of people.
Above specific embodiment of the utility model is described.It is to be appreciated that the utility model is not limited to above-mentioned particular implementation, those skilled in the art can make various distortion or amendment within the scope of the claims, and this does not affect flesh and blood of the present utility model.
Claims (8)
1. a Novel video mixing switch, is characterized in that, comprises FPGA video pre-filtering handover module, video reception circuit, upper down conversion circuit and video output circuit;
Described video reception circuit connects the input of described FPGA video pre-filtering handover module, and described upper down conversion circuit is connected the output of described FPGA video pre-filtering handover module with video output circuit.
2. Novel video mixing switch according to claim 1, is characterized in that, described video reception circuit comprises SD analog video decoder device, SDI equalizer, SDI deserializer and HDMI equalizer;
Described SD analog video decoder device is connected the input of FPGA video pre-filtering handover module with described HDMI equalizer; Described SDI equalizer connects FPGA video pre-filtering handover module by described SDI deserializer;
Described SD analog video decoder device is provided with CVBS video input interface; Described SDI equalizer is provided with SDI high definition serial digital input interface; Described HDMI equalizer is provided with HDMI high-definition multimedia input interface.
3. Novel video mixing switch according to claim 2, it is characterized in that, described video output circuit comprises SDI serializer; The output of FPGA video pre-filtering handover module connects described SDI serializer;
Described upper down conversion circuit adopts upper down conversion chip, and described upper down conversion chip is provided with CVBS outputting video signal interface and HDMI outputting video signal interface; Described SDI serializer is provided with SDI outputting video signal interface.
4. Novel video mixing switch according to claim 3, is characterized in that, also comprise MCU and RS485 driver;
Wherein, described MCU mono-aspect connects described FPGA video pre-filtering handover module, upper down conversion chip, SD analog video decoder device, SDI deserializer, HDMI equalizer and SDI serializer, connects described RS485 driver on the other hand.
5. Novel video mixing switch according to claim 1, is characterized in that, also comprise audio D/A conversion chip;
Wherein, described FPGA video pre-filtering handover module connects described audio D/A conversion chip by I2S bus.
6. Novel video mixing switch according to claim 1, is characterized in that, also comprise power transfer module;
Wherein, the input of described power transfer module connects external power source; Output connects described FPGA video pre-filtering handover module, described video reception circuit, described upper down conversion circuit and described video output circuit respectively.
7. Novel video mixing switch according to claim 4, is characterized in that, described MCU is by RS485 driver described in UART interface downlink connection;
Described RS485 driver connects corresponding core bus or external control keyboard.
8. Novel video mixing switch according to claim 2, is characterized in that, described SDI equalizer comprises a SDI equalizer and the 2nd SDI equalizer;
Wherein, a described SDI equalizer is all connected described SDI deserializer with described 2nd SDI equalizer.
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106454183A (en) * | 2016-08-31 | 2017-02-22 | 北京竞业达数码科技有限公司 | Configurable multi-way video switching device with various control interfaces |
| CN109451201A (en) * | 2018-12-10 | 2019-03-08 | 厦门视诚科技有限公司 | A kind of SDI high image quality synchronization de interlacing system and method |
| CN110430382A (en) * | 2019-08-23 | 2019-11-08 | 中国航空无线电电子研究所 | Video recording apparatus with SD video depth detection function |
| CN111083412A (en) * | 2019-12-05 | 2020-04-28 | 视联动力信息技术股份有限公司 | Video switching method, video switching device, electronic equipment and storage medium |
| CN112511753A (en) * | 2020-12-25 | 2021-03-16 | 北京轩宇空间科技有限公司 | Universal video tracker and data stream processing method |
| CN113965702A (en) * | 2021-09-29 | 2022-01-21 | 天津七所精密机电技术有限公司 | Multi-channel video seamless switching circuit and method based on domestic platform |
| CN114567712A (en) * | 2022-04-27 | 2022-05-31 | 成都卓元科技有限公司 | Multi-node net signal scheduling method based on SDI video and audio signals |
| CN115834797A (en) * | 2023-01-28 | 2023-03-21 | 龙迅半导体（合肥）股份有限公司 | Deserializer |
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2015
- 2015-10-23 CN CN201520829153.7U patent/CN205071166U/en active Active
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106454183A (en) * | 2016-08-31 | 2017-02-22 | 北京竞业达数码科技有限公司 | Configurable multi-way video switching device with various control interfaces |
| CN109451201A (en) * | 2018-12-10 | 2019-03-08 | 厦门视诚科技有限公司 | A kind of SDI high image quality synchronization de interlacing system and method |
| CN109451201B (en) * | 2018-12-10 | 2023-01-06 | 厦门视诚科技有限公司 | SDI high-definition synchronous de-interlacing system and method |
| CN110430382B (en) * | 2019-08-23 | 2021-10-26 | 中国航空无线电电子研究所 | Video recording equipment with standard definition video depth detection function |
| CN110430382A (en) * | 2019-08-23 | 2019-11-08 | 中国航空无线电电子研究所 | Video recording apparatus with SD video depth detection function |
| CN111083412B (en) * | 2019-12-05 | 2022-11-08 | 视联动力信息技术股份有限公司 | Video switching method, video switching device, electronic equipment and storage medium |
| CN111083412A (en) * | 2019-12-05 | 2020-04-28 | 视联动力信息技术股份有限公司 | Video switching method, video switching device, electronic equipment and storage medium |
| CN112511753A (en) * | 2020-12-25 | 2021-03-16 | 北京轩宇空间科技有限公司 | Universal video tracker and data stream processing method |
| CN113965702A (en) * | 2021-09-29 | 2022-01-21 | 天津七所精密机电技术有限公司 | Multi-channel video seamless switching circuit and method based on domestic platform |
| CN113965702B (en) * | 2021-09-29 | 2023-08-01 | 天津七所精密机电技术有限公司 | Multi-channel video seamless switching circuit and method based on domestic platform |
| CN114567712A (en) * | 2022-04-27 | 2022-05-31 | 成都卓元科技有限公司 | Multi-node net signal scheduling method based on SDI video and audio signals |
| CN114567712B (en) * | 2022-04-27 | 2022-07-26 | 成都卓元科技有限公司 | Multi-node net signal scheduling method based on SDI video and audio signals |
| CN115834797A (en) * | 2023-01-28 | 2023-03-21 | 龙迅半导体（合肥）股份有限公司 | Deserializer |
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