CN205015411U - Series fault arc detection circuit - Google Patents
Series fault arc detection circuit Download PDFInfo
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- CN205015411U CN205015411U CN201520629091.5U CN201520629091U CN205015411U CN 205015411 U CN205015411 U CN 205015411U CN 201520629091 U CN201520629091 U CN 201520629091U CN 205015411 U CN205015411 U CN 205015411U
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Abstract
The utility model discloses a series fault arc detection circuit. This series fault arc detection circuit includes: signal sampling circuit (1) for sample to the live wire electric current, and output the first signal, accurate full wave rectifier circuit (2) is connected to the output of signal sampling circuit (1), carries out the rectification to the the first signal of signal sampling circuit (1) output and enlargies to the output second signal, comparison circuit (3) are connected to the output of accurate full wave rectifier circuit (2), carry out the comparison with the signal of accurate full wave rectifier circuit (2) output to the output compare result. According to the utility model discloses a series fault arc detection circuit can reduce series fault arc detection circuit's complexity, makes the small signal all -wave pass through rectifier circuit, reduces the realization cost of circuit.
Description
Technical field
The utility model relates to Electrical Safety resist technology field, in particular to a kind of series fault arc testing circuit.
Background technology
Series fault arc testing circuit is generally as follows for the processing procedure of signal:
When detection failure electric arc, the induction of Current Transformer Secondary side exports corresponding current, gives signal processing circuit, or raise current signal output signal and give AD conversion module process by half-wave or bridge rectifier.
The shortcoming of existing circuit is as follows:
According to half-wave rectification, the only signal of sampling half period, useful signal reduces by half, thus causes guard time long and easily misoperation.When the arc fault of power termination or purely resistive load, high-frequency signal amplitude is lower, due to the impact of diode drop, part signal not by, add the requirement to mutual inductor, low-power load or purely resistive load arcing can be caused simultaneously to can't detect.
According to bridge rectifier, now signal circuit has the pressure drop of two diodes, when the arc fault of low-power load or purely resistive load, high-frequency signal amplitude is lower, part signal cannot pass through rectifier bridge, thus the requirement added mutual inductor, the fault electric arc of this type of load can be caused to can't detect simultaneously.
According to the treatment circuit raising signal, the signal after raising must deliver to AD conversion module.Because signal frequency is higher, higher to the requirement of AD conversion module and control chip, cost is relatively high.
Therefore, existing series fault arc testing circuit, the requirement for components and parts is higher, and feeble signal is difficult to all-wave and passes through, and circuit complexity is high, and cost is also higher.
Utility model content
A kind of series fault arc testing circuit is provided in the utility model embodiment, the complexity of series fault arc testing circuit can be reduced, make feeble signal can all-wave by rectification circuit, reduce circuit realize cost.
For achieving the above object, the utility model embodiment provides a kind of series fault arc testing circuit, comprising: signal sample circuit, for sampling to live wire electric current, and exports the first signal; Accurate full-wave rectifying circuit, is connected to the output terminal of signal sample circuit, carries out rectification amplification, and export secondary signal to the first signal that signal sample circuit exports; Comparator circuit, is connected to the output terminal of accurate full-wave rectifying circuit, and the signal exported with accurate full-wave rectifying circuit compares, and exports comparative result.
As preferably, signal sample circuit comprises: current transformer, samples to live wire electric current; First resistance, is arranged on the secondary side of current transformer, and the secondary side output current of current transformer is converted to voltage signal; High pass circuit, is connected to the output terminal of the first resistance, exports high-frequency signal after carrying out filtering to voltage signal.
As preferably, high pass circuit comprises the first electric capacity and the second resistance, and the second resistance and the first resistor coupled in parallel, the first capacitances in series is between the first resistance and the second resistance.
As preferably, the first end that the second resistance is connected with the first electric capacity is connected with the first diode, and the output terminal of the first diode is connected to the first voltage, the second end ground connection of the second resistance.
As preferably, current transformer is power current mutual inductor or HF current transformer.
As preferably, accurate full-wave rectifying circuit comprises the first integrated operatinoal amplifier and the second integrated operatinoal amplifier, the negative pole of the first integrated operatinoal amplifier is connected to the output terminal of signal sample circuit, the output terminal of the first integrated operatinoal amplifier is connected to the negative pole of the second integrated operatinoal amplifier, the plus earth of the first integrated operatinoal amplifier and the second integrated operatinoal amplifier, circuit between the output terminal of signal sample circuit and the negative pole of the first integrated operatinoal amplifier is provided with the 3rd resistance, circuit between the output terminal of signal sample circuit and the negative pole of the second integrated operatinoal amplifier is provided with the 5th resistance, circuit between the output terminal of the first integrated operatinoal amplifier and the negative pole of the second integrated operatinoal amplifier is provided with the 6th resistance, circuit between 3rd resistance and the 6th resistance is provided with the 4th resistance, circuit between the negative pole of the second integrated operatinoal amplifier and the output terminal of the second integrated operatinoal amplifier is provided with the 7th resistance, the 3rd diode is provided with between 6th resistance and the output terminal of the first integrated operatinoal amplifier, the output terminal of the 3rd diode is connected to the output terminal of the first integrated operatinoal amplifier, circuit between the output terminal of the 3rd diode and the negative pole of the first integrated operatinoal amplifier is provided with the second diode, the output terminal of the second diode is connected to the negative pole of the first integrated operatinoal amplifier.
As preferably, the 3rd resistance is R3, and the 4th resistance is R4, and the 5th resistance is R5, and the 6th resistance is R6, wherein R3=R4=R6, R5=2R6.
As preferably, the output terminal of the second integrated operatinoal amplifier is by the second capacity earth.
As preferably, comparator circuit comprises comparer, and the in-phase input end of comparer is connected to the output terminal of accurate full-wave rectifying circuit, and the inverting input of comparer is connected to comparative voltage.
As preferably, comparative voltage is adjustable.
As preferably, comparative voltage comprises regulating resistance, and the first end of regulating resistance is connected to the second voltage, and the second end ground connection of regulating resistance, the reverse incoming end of comparer is connected to the adjusting portion of regulating resistance.
As preferably, comparator circuit also comprises and is arranged on driving voltage on comparer and pull-up resistor.
Application the technical solution of the utility model, series fault arc testing circuit comprises: signal sample circuit, for sampling to live wire electric current, and exports the first signal; Accurate full-wave rectifying circuit, is connected to the output terminal of signal sample circuit, carries out rectification amplification, and export secondary signal to the first signal that signal sample circuit exports; Comparator circuit, is connected to the output terminal of accurate full-wave rectifying circuit, and the signal exported with accurate full-wave rectifying circuit compares, and exports comparative result.The utility model is by sampling to live wire electric current, and by accurate for sampled signal output valve full-wave rectifying circuit, rectification is carried out by accurate full-wave rectifying circuit, can amplifying circuit, make faint fault electric arc signal also intactly by rectification circuit, the integrality of sampled signal can be ensured, the complexity of series fault arc testing circuit can be reduced simultaneously, reduce the requirement to current transformer, reduce realizing cost and realizing difficulty of circuit.
Accompanying drawing explanation
Fig. 1 is the structural drawing of the series fault arc testing circuit of the utility model embodiment.
Description of reference numerals: 1, signal sample circuit; 2, accurate full-wave rectifying circuit; 3, comparator circuit.
Embodiment
Below in conjunction with the drawings and specific embodiments, the utility model is described in further detail, but not as to restriction of the present utility model.
Shown in Figure 1, according to embodiment of the present utility model, series fault arc testing circuit comprises signal sample circuit 1, accurate full-wave rectifying circuit 2 and comparator circuit 3, and signal sample circuit 1 for sampling to live wire electric current, and exports the first signal; Accurate full-wave rectifying circuit 2, is connected to the output terminal of signal sample circuit 1, carries out rectification amplification, and export secondary signal to the first signal that signal sample circuit 1 exports; Comparator circuit 3, is connected to the output terminal of accurate full-wave rectifying circuit 2, and the signal exported with accurate full-wave rectifying circuit 2 compares, and exports comparative result.
The first signal is herein such as high-frequency signal.
The utility model is by sampling to live wire electric current, and by accurate for sampled signal output valve full-wave rectifying circuit, rectification is carried out by accurate full-wave rectifying circuit, can amplifying circuit, make faint fault electric arc signal also intactly by rectification circuit, the integrality of sampled signal can be ensured, the complexity of series fault arc testing circuit can be reduced simultaneously, reduce the requirement to current transformer, reduce realizing cost and realizing difficulty of circuit.
Owing to adopting accurate full-wave rectifying circuit in the utility model, rectification amplification is carried out to the signal that signal sample circuit 1 exports, feeble signal can all-wave can be passed through after rectification is amplified by accurate full-wave rectifying circuit, the problem that the signal avoiding in prior art low amplitude value after adopting half-wave or bridge rectifier cannot pass through, reduce the requirement to mutual inductor, also ensure that the integrality of rectified signal, improve the serviceability of series fault arc testing circuit.
Signal sample circuit 1 comprises current transformer, the first resistance R1 and high pass circuit, and current transformer and live wire electric current form mutual inductance, thus sample to live wire electric current, and exports sample rate current to the first resistance R1; First resistance R1 is arranged on the secondary side of current transformer, and the secondary side output current of current transformer is converted to voltage signal, and this first resistance R1 is the resistance matched with current transformer.High pass circuit is connected to the output terminal of the first resistance R1, exports high-frequency signal after carrying out filtering to voltage signal.High pass circuit can carry out High frequency filter to the voltage signal that the first resistance R1 exports, and avoids the humorous wave interference in signal, improves the degree of purity that voltage signal exports.
In the present embodiment, high pass circuit comprises the first electric capacity C1 and the second resistance R2, and the second resistance R2 and the first resistance R1 is in parallel, and the first electric capacity C1 is connected between the first resistance R1 and the second resistance R2.First electric capacity C1 and the second resistance R2 cooperatively interacts, and carries out filtering, the high-frequency voltage signal then after output filtering to the voltage signal that the first resistance R1 exports.By the high pass circuit adopting the first electric capacity C1 and the second resistance R2 to form, structure is simple, and cost is lower, and it is convenient to realize.Certainly, the high pass circuit combined by other components and parts, as long as can carry out High frequency filter to the voltage signal that the first resistance R1 exports, is all fine.
Preferably, the first end that the second resistance R2 is connected with the first electric capacity C1 is connected with the first diode D1, and the output terminal of the first diode D1 is connected to the first voltage, the second end ground connection of the second resistance R2.The magnitude of voltage of the first voltage is such as 5V.First diode D1 is set herein, and the first diode D1 is pulled to+5V by voltage, can control the output voltage of signal sample circuit 1, can signal limiter be played, and protect the effect of accurate full-wave rectifying circuit 2.
Current transformer is power current mutual inductor or HF current transformer.
Accurate full-wave rectifying circuit 2 comprises the first integrated operatinoal amplifier and the second integrated operatinoal amplifier, the negative pole of the first integrated operatinoal amplifier is connected to the output terminal of signal sample circuit 1, the output terminal of the first integrated operatinoal amplifier is connected to the negative pole of the second integrated operatinoal amplifier, the plus earth of the first integrated operatinoal amplifier and the second integrated operatinoal amplifier, circuit between the output terminal of signal sample circuit 1 and the negative pole of the first integrated operatinoal amplifier is provided with the 3rd resistance R3, circuit between the output terminal of signal sample circuit 1 and the negative pole of the second integrated operatinoal amplifier is provided with the 5th resistance R5, circuit between the output terminal of the first integrated operatinoal amplifier and the negative pole of the second integrated operatinoal amplifier is provided with the 6th resistance R6, circuit between 3rd resistance R3 and the 6th resistance R6 is provided with the 4th resistance R4, circuit between the negative pole of the second integrated operatinoal amplifier and the output terminal of the second integrated operatinoal amplifier is provided with the 7th resistance R7, the 3rd diode D3 is provided with between 6th resistance R6 and the output terminal of the first integrated operatinoal amplifier, the output terminal of the 3rd diode D3 is connected to the output terminal of the first integrated operatinoal amplifier, circuit between the output terminal of the 3rd diode D3 and the negative pole of the first integrated operatinoal amplifier is provided with the second diode D2, the output terminal of the second diode D2 is connected to the negative pole of the first integrated operatinoal amplifier.
In this accurate full-wave rectifying circuit 2,3rd resistance R3, the 4th resistance R4 and the 6th resistance R6 connect, form the first circuit, 5th resistance R5 connects with the 7th resistance R7 with the circuit after the first circuit in parallel, second integrated operatinoal amplifier is in parallel with the 7th resistance R7, second diode D2 and the circuit after the first integrated operatinoal amplifier parallel connection are connected with the 3rd diode D3 and are formed discharge circuit, and this discharge circuit is in parallel with the 4th resistance R4.
Preferably, the 3rd resistance R3 resistance is R3, and the 4th resistance R4 resistance is R4, and the 5th resistance R5 resistance is R5, and the 6th resistance R6 resistance is R6, wherein R3=R4=R6, R5=2R6.
As high-frequency voltage signal UI>0, the output voltage of the first integrated operatinoal amplifier is less than 0, thus causes diode D3 conducting, and D2 ends, the anti-phase scale operation of circuit realiration, the output voltage of the first integrated operatinoal amplifier
the then output voltage of the second integrated operatinoal amplifier
thus realize the output of positive half period signal integrity; As high-frequency input signal UI<0, the output voltage of the first integrated operatinoal amplifier is greater than 0, thus causes diode D2 conducting, and D3 ends, and input signal directly amplifies output by the second integrated operatinoal amplifier.Now
export after realizing the upset of negative half-cycle signal.Suitable magnification ratio can be obtained by regulating the value of the 5th resistance R5 and the 7th resistance R7.The second diode D2 herein and the 3rd diode D3 is such as Quick-return diode.
By above-mentioned regulative mode, the voltage signal that accurate full-wave rectifying circuit 2 finally can be exported according to sampled signal circuit exports corresponding all-view signal, the completeness and efficiency of the voltage signal keeping sampled signal circuit to export, overcome the drawback of half-wave or bridge rectifier, effectively can detect low-power load or purely resistive load arcing.By regulating the value of the 5th resistance R5 and the 7th resistance R7, the voltage signal that accurate full-wave rectifying circuit 2 exports can be amplified to desired value, make the output signal of accurate full-wave rectifying circuit 2 more clear.
The output terminal of the second integrated operatinoal amplifier is by the second electric capacity C2 ground connection.Second electric capacity C2 is used for filtering interference signals, ensures degree of purity and the sharpness of the second integrated operatinoal amplifier output signal.
Comparator circuit 3 comprises comparer COMP, and the in-phase input end of comparer COMP is connected to the output terminal of accurate full-wave rectifying circuit 2, and the inverting input of comparer COMP is connected to comparative voltage.Circuit between the in-phase input end and the output terminal of accurate full-wave rectifying circuit 2 of comparer COMP is also provided with the 8th resistance R8, can be used for playing the effect of accelerating circuit current stabilization.
The voltage signal that accurate full-wave rectifying circuit 2 can be exported by comparer COMP by comparator circuit 3 compares with the reference voltage preset, and to determine whether effective fault electric arc signal, can disturb by filtering noise simultaneously, is convenient to control protection electric circuit work.
Comparator circuit 3 utilize comparer COMP to amplify after signal amplitude judge, when signal amplitude meet pre-conditioned after, by control chip, the number of signals in several cycle is judged, chip output protection actuating signal after satisfying condition.
Preferably, comparative voltage is adjustable, makes reference voltage adjustable, can arrange different reference voltages according to the difference of the output voltage of fault electric arc, ensures accuracy and the reliability of testing result.
In the present embodiment, comparative voltage comprises regulating resistance R9, and the first end of regulating resistance R9 is connected to the second voltage, and the second end ground connection of regulating resistance R9, the reverse incoming end of comparer COMP is connected to the adjusting portion of regulating resistance R9.By regulating adjusting portion in the position of regulating resistance R9, the size of regulating resistance R9 resistance can be regulated, and then regulate the size of reference voltage, thus select suitable reference voltage.Certainly, also can regulate reference voltage in other way, such as, change the magnitude of voltage etc. of the second voltage.In the present embodiment, the magnitude of voltage of the second voltage is such as+5V.
Comparator circuit 3 also comprises and is arranged on driving voltage on comparer COMP and pull-up resistor R11, can strengthen the driving force of comparer COMP, and ensure the stability that comparer COMP signal exports.Driving voltage is herein such as+5V.Also be provided with pull-up resistor R10 at the output terminal of comparer COMP, this pull-up resistor R10 can stablize the output signal of comparer COMP.
After series fault arc testing circuit of the present utility model processes live wire electric current; the readout controller that comparator circuit 3 can be compared; the quantity that the signal that controller can export comparator circuit 3 carries out in unit period judges; to have judged whether that fault electric arc occurs, thus control protection electric circuit work.
Certainly, be more than preferred implementation of the present utility model.It should be pointed out that for those skilled in the art, under the prerequisite not departing from the utility model ultimate principle, can also make some improvements and modifications, these improvements and modifications are also considered as protection domain of the present utility model.
Claims (12)
1. a series fault arc testing circuit, is characterized in that, comprising:
Signal sample circuit (1), for sampling to live wire electric current, and exports the first signal;
Accurate full-wave rectifying circuit (2), is connected to the output terminal of described signal sample circuit (1), carries out rectification amplification, and export secondary signal to the first signal that described signal sample circuit (1) exports;
Comparator circuit (3), is connected to the output terminal of described accurate full-wave rectifying circuit (2), and the signal exported with described accurate full-wave rectifying circuit (2) compares, and exports comparative result.
2. series fault arc testing circuit according to claim 1, is characterized in that, described signal sample circuit (1) comprising:
Current transformer, samples to described live wire electric current;
First resistance, is arranged on the secondary side of described current transformer, and the secondary side output current of described current transformer is converted to voltage signal;
High pass circuit, is connected to the output terminal of described first resistance, exports high-frequency signal after carrying out filtering to described voltage signal.
3. series fault arc testing circuit according to claim 2, it is characterized in that, described high pass circuit comprises the first electric capacity and the second resistance, and described second resistance and described first resistor coupled in parallel, described first capacitances in series is between described first resistance and described second resistance.
4. series fault arc testing circuit according to claim 3, it is characterized in that, the first end that described second resistance is connected with described first electric capacity is connected with the first diode, and the output terminal of described first diode is connected to the first voltage, the second end ground connection of described second resistance.
5. series fault arc testing circuit according to claim 2, is characterized in that, described current transformer is power current mutual inductor or HF current transformer.
6. series fault arc testing circuit according to claim 1, it is characterized in that, described accurate full-wave rectifying circuit (2) comprises the first integrated operatinoal amplifier and the second integrated operatinoal amplifier, the negative pole of described first integrated operatinoal amplifier is connected to the output terminal of described signal sample circuit (1), the output terminal of described first integrated operatinoal amplifier is connected to the negative pole of described second integrated operatinoal amplifier, the plus earth of described first integrated operatinoal amplifier and described second integrated operatinoal amplifier, circuit between the output terminal of described signal sample circuit (1) and the negative pole of described first integrated operatinoal amplifier is provided with the 3rd resistance, circuit between the output terminal of described signal sample circuit (1) and the negative pole of described second integrated operatinoal amplifier is provided with the 5th resistance, circuit between the output terminal of the first integrated operatinoal amplifier and the negative pole of described second integrated operatinoal amplifier is provided with the 6th resistance, circuit between described 3rd resistance and described 6th resistance is provided with the 4th resistance, circuit between the negative pole of described second integrated operatinoal amplifier and the output terminal of described second integrated operatinoal amplifier is provided with the 7th resistance, the 3rd diode is provided with between described 6th resistance and the output terminal of described first integrated operatinoal amplifier, the output terminal of described 3rd diode is connected to the output terminal of described first integrated operatinoal amplifier, circuit between the output terminal of described 3rd diode and the negative pole of described first integrated operatinoal amplifier is provided with the second diode, the output terminal of described second diode is connected to the negative pole of described first integrated operatinoal amplifier.
7. series fault arc testing circuit according to claim 6, is characterized in that, described 3rd resistance is R3, described 4th resistance is R4, and described 5th resistance is R5, and described 6th resistance is R6, wherein R3=R4=R6, R5=2R6.
8. series fault arc testing circuit according to claim 6, is characterized in that, the output terminal of described second integrated operatinoal amplifier is by the second capacity earth.
9. series fault arc testing circuit according to claim 1, it is characterized in that, described comparator circuit (3) comprises comparer, the in-phase input end of described comparer is connected to the output terminal of described accurate full-wave rectifying circuit (2), and the inverting input of described comparer is connected to comparative voltage.
10. series fault arc testing circuit according to claim 9, is characterized in that, described comparative voltage is adjustable.
11. series fault arc testing circuits according to claim 10, it is characterized in that, described comparative voltage comprises regulating resistance, the first end of described regulating resistance is connected to the second voltage, second end ground connection of described regulating resistance, the reverse incoming end of described comparer is connected to the adjusting portion of described regulating resistance.
12. series fault arc testing circuits according to claim 9, is characterized in that, described comparator circuit (3) also comprises and is arranged on driving voltage on described comparer and pull-up resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520629091.5U CN205015411U (en) | 2015-08-19 | 2015-08-19 | Series fault arc detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520629091.5U CN205015411U (en) | 2015-08-19 | 2015-08-19 | Series fault arc detection circuit |
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| Publication Number | Publication Date |
|---|---|
| CN205015411U true CN205015411U (en) | 2016-02-03 |
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ID=55214006
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520629091.5U Expired - Fee Related CN205015411U (en) | 2015-08-19 | 2015-08-19 | Series fault arc detection circuit |
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| CN (1) | CN205015411U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105067931A (en) * | 2015-08-19 | 2015-11-18 | 珠海格力电器股份有限公司 | Series fault arc detection circuit |
| CN107462765A (en) * | 2017-09-07 | 2017-12-12 | 昆山龙腾光电有限公司 | A kind of signal deteching circuit and device |
| CN110208616A (en) * | 2019-05-28 | 2019-09-06 | 中国科学院武汉物理与数学研究所 | A kind of rubidium atomic clock working condition detection signal measurement apparatus |
-
2015
- 2015-08-19 CN CN201520629091.5U patent/CN205015411U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105067931A (en) * | 2015-08-19 | 2015-11-18 | 珠海格力电器股份有限公司 | Series fault arc detection circuit |
| CN107462765A (en) * | 2017-09-07 | 2017-12-12 | 昆山龙腾光电有限公司 | A kind of signal deteching circuit and device |
| CN110208616A (en) * | 2019-05-28 | 2019-09-06 | 中国科学院武汉物理与数学研究所 | A kind of rubidium atomic clock working condition detection signal measurement apparatus |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160203 |
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| CF01 | Termination of patent right due to non-payment of annual fee |