CN204681246U - Load open circuit protection circuit - Google Patents
Load open circuit protection circuit Download PDFInfo
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- CN204681246U CN204681246U CN201520426642.8U CN201520426642U CN204681246U CN 204681246 U CN204681246 U CN 204681246U CN 201520426642 U CN201520426642 U CN 201520426642U CN 204681246 U CN204681246 U CN 204681246U
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- resistance
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- tie point
- comparator
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- 238000001514 detection method Methods 0.000 claims abstract description 8
- 230000001681 protective effect Effects 0.000 claims abstract description 8
- 239000000758 substrate Substances 0.000 claims description 4
- 230000000087 stabilizing effect Effects 0.000 claims description 3
- 230000000630 rising effect Effects 0.000 abstract description 2
- 238000005516 engineering process Methods 0.000 description 3
- 238000005421 electrostatic potential Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000006837 decompression Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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Abstract
Load open circuit protection circuit, be connected between output voltage terminal and ground, by comparator, transistor, detect resistance, output divider resistance string, Alternative load resistance and reference voltage composition, the normal phase input end of described comparator connects reference voltage, output is by output divider resistance serial connection ground, the intermediate node of described output divider resistance string connects transistor base, the collector electrode of described transistor connects output voltage terminal by Alternative load resistance, grounded emitter, described detection resistance be connected to and load resistance tie point between, described load resistance tie point connects the inverting input of comparator, described transistor is NPN pipe, described load resistance tie point is also connected with electrostatic discharge protective circuit.The utility model realizes open circuit detection by detecting output current, accesses Alternative load, limit the rising of output end voltage, the safe and reliable unlikely damage of components and parts protected in switching power circuit when load open circuit.
Description
Technical field
The utility model relates to electronic circuit field, particularly, relates to a kind of load open circuit protection circuit.
Background technology
Along with the high speed development of power electronic technology, the work of power electronic equipment and people, the relation of life are day by day close, and electronic equipment all be unable to do without reliable power supply, enter nineties Switching Power Supply and in succession enter various electronics, electric equipment field, stored-program control exchange, communication, electron detection device power supply, control appliance power supply etc. employ Switching Power Supply all widely, more facilitate developing rapidly of switch power technology.
In order to prevent overtension on output, simultaneously in order to make power supply less to fully loaded load effect from zero load, switching power supply output does not allow open circuit yet.When empty, or during external circuit open circuit, output end voltage can rise very high, until up to the peak value of AC power, will damage the components and parts in circuit like this, even decompression capacitor.
Utility model content
For providing load open circuit protection function to Switching Power Supply or other power supply kind equipments, avoiding that power supply use procedure is medium-term and long-term is in Light Condition, the utility model discloses a kind of load open circuit protection circuit.
Load open circuit protection circuit described in the utility model, be connected between output voltage terminal and ground, by comparator, transistor, detect resistance, output divider resistance string, Alternative load resistance and reference voltage composition, the normal phase input end of described comparator connects reference voltage, output is by output divider resistance serial connection ground, the intermediate node of described output divider resistance string connects transistor base, the collector electrode of described transistor connects output voltage terminal by Alternative load resistance, grounded emitter, described detection resistance be connected to and load resistance tie point between, described load resistance tie point connects the inverting input of comparator, described transistor is NPN pipe,
Described load resistance tie point is also connected with electrostatic discharge protective circuit; described electrostatic discharge protective circuit is made up of the PMOS be connected between load resistance tie point and output voltage terminal and the NMOS be connected between load resistance tie point and ground wire; the grid of described PMOS, NMOS, source electrode, substrate are connected with output voltage terminal and ground wire respectively, and drain electrode is all connected with load resistance tie point.
Preferably, light-emitting diode is connected with between described emitter and ground.
Preferably, the power end of described comparator is connected with output voltage terminal, affiliated reference voltage is made up of the first divider resistance be connected between output voltage terminal and ground and the second divider resistance, described first divider resistance is connected the normal phase input end of comparator with the common port of the second divider resistance, described first divider resistance is identical with the second divider resistance resistance.
Preferably, voltage stabilizing didoe is connected with between described output voltage terminal and ground.
Load open circuit protection circuit described in the utility model; open circuit detection is realized by detecting output current; Alternative load is accessed when load open circuit; limit the rising of output end voltage; and electrostatic discharge protection circuit is added, the safe and reliable unlikely damage of components and parts protected in switching power circuit to the load switch access point exposed.
Accompanying drawing explanation
Fig. 1 is a kind of embodiment schematic diagram of the utility model;
Mark and corresponding parts title in accompanying drawing: A-load resistance tie point, COMP-comparator, UO-output voltage terminal, VD-light-emitting diode, M-transistor, R1-first divider resistance, R2-second divider resistance, R3-the 3rd divider resistance, R4-the 4th divider resistance, RL-load resistance, RLB-Alternative load resistance, RS-detects resistance, and MP-PMOS manages, and MN-NMOS manages.
Embodiment
Below in conjunction with embodiment and accompanying drawing, to the detailed description further of the utility model do, but execution mode of the present utility model is not limited thereto.
Load open circuit protection circuit described in the utility model, be connected between output voltage terminal UO and ground, by comparator COMP, transistor M, detect resistance RS, output divider resistance string, Alternative load resistance RLB and reference voltage composition, the normal phase input end of described comparator connects reference voltage, output is by output divider resistance serial connection ground, the intermediate node of described output divider resistance string connects transistor base, the collector electrode of described transistor connects output voltage terminal by Alternative load resistance, grounded emitter, described detection resistance be connected to and load resistance tie point A between, described load resistance tie point A connects the inverting input of comparator.
During normal use, load resistance RL connects between load resistance tie point A and output voltage terminal UO, when load resistance does not access, detect on resistance RS and there is no electric current, A point voltage is zero, comparator normal phase input end voltage is that reference voltage is greater than zero, comparator exports high level signal, after the dividing potential drop of output divider resistance string, make the threshold V T being still greater than this transistor at the base voltage of transistor M, transistor turns, Alternative load resistance RLB accesses between output voltage terminal and ground, avoids the zero load of output voltage terminal.RLB resistance answers value larger, avoid meaningless power consumption, usually more than megaohm rank, output divider resistance string is in series by the 3rd divider resistance R3 and the 4th divider resistance R4, voltage after dividing potential drop should be greater than common transistor threshold voltage, such as, when being 5V for output high level, the resistance ratio of R3 and R4 can select about 4:1, at intermediate node output voltage 1.25V, guarantee the conducting of transistor, range of choice can between several million to ten megaohms, to provide certain base current, can at the emitter of transistor M and the light-emitting diode VD that connects between ground, when transistor turns, this light-emitting diode also luminescence makes unloaded prompting.When load resistance RL accesses, RS has electric current and has pressure drop, comparator anti-phase input terminal voltage higher than reference voltage, output low level signal, transistor cutoff, Alternative load resistance RLB not place in circuit.For improving output voltage degree of safety further, voltage stabilizing didoe can also be connected between described output voltage terminal and ground.
Described load resistance tie point is also connected with electrostatic discharge protective circuit; described electrostatic discharge protective circuit is made up of the PMOS be connected between load resistance tie point and output voltage terminal and the NMOS be connected between load resistance tie point and ground wire; the grid of described PMOS, NMOS, source electrode, substrate are connected with output voltage terminal and ground wire respectively, and drain electrode is all connected with load resistance tie point.
Due to load resistance tie point need be exposed to outside; and due to load resistance frequent access and take off; the possibility meeting with electrostatic breakdown significantly increases; electrostatic discharge protective circuit provides electrostatic defending for load resistance tie point; in normal state, because the grid source of two metal-oxide-semiconductors links together, VGS=0; two MOS all not conductings, do not affect circuit and normally work.
When meeting with electrostatic pulse, positive voltage electrostatic pulse is met with this pin, and be example to ground wire bleed off, this electrostatic potential is coupled to MN grid by the gate-drain parasitic capacitances of NMOS tube MN, make MN conducting, thus to ground wire bleed off electrostatic potential, if meet with negative voltage electrostatic pulse, then ground is higher than load resistance tie point, makes the substrate of MN to the parasitic diode conducting of drain electrode, make the high-pressure electrostatic bleed off born, avoid high-pressure electrostatic to directly act on internal components, the input etc. of such as comparator, destroy internal circuit, to PMOS MP, bleed off principle is similar to.
For reference voltage, preferably be made up of the first divider resistance be connected between output voltage terminal and ground and the second divider resistance, described first divider resistance is connected the normal phase input end of comparator with the common port of the second divider resistance, described first divider resistance R1 is identical with the second divider resistance R2 resistance.Simplify design, no longer need extra DC power supply or chip to provide reference voltage, simultaneously usually appear at the rule about supply voltage half according to comparator gain maximum, make R1=R2, comparator adopts output voltage as power supply simultaneously, ensure that the accuracy of detection of comparator is maximum.
As mentioned above, the utility model can be realized preferably.
Claims (4)
1. load open circuit protection circuit, be connected between output voltage terminal and ground, it is characterized in that, by comparator, transistor, detect resistance, output divider resistance string, Alternative load resistance and reference voltage composition, the normal phase input end of described comparator connects reference voltage, output is by output divider resistance serial connection ground, the intermediate node of described output divider resistance string connects transistor base, the collector electrode of described transistor connects output voltage terminal by Alternative load resistance, grounded emitter, described detection resistance be connected to and load resistance tie point between, described load resistance tie point connects the inverting input of comparator, described transistor is NPN pipe,
Described load resistance tie point is also connected with electrostatic discharge protective circuit; described electrostatic discharge protective circuit is made up of the PMOS be connected between load resistance tie point and output voltage terminal and the NMOS be connected between load resistance tie point and ground wire; the grid of described PMOS, NMOS, source electrode, substrate are connected with output voltage terminal and ground wire respectively, and drain electrode is all connected with load resistance tie point.
2. load open circuit protection circuit according to claim 1, is characterized in that, is connected with light-emitting diode between described emitter and ground.
3. load open circuit protection circuit according to claim 1; it is characterized in that; the power end of described comparator is connected with output voltage terminal; affiliated reference voltage is made up of the first divider resistance be connected between output voltage terminal and ground and the second divider resistance; described first divider resistance is connected the normal phase input end of comparator with the common port of the second divider resistance, described first divider resistance is identical with the second divider resistance resistance.
4. load open circuit protection circuit according to claim 1, is characterized in that, is connected with voltage stabilizing didoe between described output voltage terminal and ground.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201520426642.8U CN204681246U (en) | 2015-06-19 | 2015-06-19 | Load open circuit protection circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201520426642.8U CN204681246U (en) | 2015-06-19 | 2015-06-19 | Load open circuit protection circuit |
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CN204681246U true CN204681246U (en) | 2015-09-30 |
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CN201520426642.8U Expired - Fee Related CN204681246U (en) | 2015-06-19 | 2015-06-19 | Load open circuit protection circuit |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109814650A (en) * | 2019-01-23 | 2019-05-28 | 西安交通大学 | A kind of low pressure difference linear voltage regulator clamping transistor structure |
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2015
- 2015-06-19 CN CN201520426642.8U patent/CN204681246U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109814650A (en) * | 2019-01-23 | 2019-05-28 | 西安交通大学 | A kind of low pressure difference linear voltage regulator clamping transistor structure |
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Legal Events
Date | Code | Title | Description |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150930 Termination date: 20180619 |