CN204376871U - Based on the frequency synthesizer of many ring locks phase - Google Patents
Based on the frequency synthesizer of many ring locks phase Download PDFInfo
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- CN204376871U CN204376871U CN201520121094.8U CN201520121094U CN204376871U CN 204376871 U CN204376871 U CN 204376871U CN 201520121094 U CN201520121094 U CN 201520121094U CN 204376871 U CN204376871 U CN 204376871U
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Abstract
The utility model discloses the frequency synthesizer based on many ring locks phase, comprise power splitter, four monocycle frequency synthesizer of phase locking, Direct Digital Frequency Synthesizers DDS and the compensated oscillator be connected on Direct Digital Frequency Synthesizers DDS, described power splitter connects monocycle frequency synthesizer of phase locking PLL1 simultaneously, PLL2 and PLL3, monocycle frequency synthesizer of phase locking PLL3 also connects Direct Digital Frequency Synthesizers DDS, monocycle frequency synthesizer of phase locking PLL2 also connects one-level frequency mixer successively, prefilter, secondary frequency mixer, postfilter and monocycle frequency synthesizer of phase locking PLL4, described Direct Digital Frequency Synthesizers DDS is also connected with one-level frequency mixer.The utility model is by above-mentioned principle, Direct Digital Frequency Synthesizers DDS is utilized to produce baseband signal, multiple monocycle frequency synthesizer of phase locking carries out spread spectrum, and on Direct Digital Frequency Synthesizers DDS, compensated oscillator is set, for offsetting or cut down the temperature drift of frequency of oscillation, low mutually hot-tempered, frequency that resolution is high can be obtained.
Description
Technical field
The utility model relates to frequency synthesis field, particularly, relates to the frequency synthesizer based on many ring locks phase.
Background technology
In recent years, along with ultra short wave communication radio station is to wide-band, high jump sepeed, multi-service, multi-functional future development, as the frequency synthesizer of radio station important component part, carry as radio station provides the key effect of required local oscillation signal and various clock, the index such as its bandwidth, phase noise, change-over time directly affects the communication performance in radio station.The combination property of modern military duplet frequency source proposes more and more higher requirement.Wide-band covering, thin frequency range stepping, low phase noise and low spurious level become the important development trend of frequency synthesizer.In traditional single frequency synthesizer of phase locking, because phase locking frequency multiplying is while phase demodulation frequency amplifies, also amplified equally by noise, its deterioration degree of making an uproar mutually is 20logN, and wherein N is frequency dividing ratio.Therefore its frequency resolution is higher, then reference frequency is lower, and the transient state time that loop enters locking is longer, and phase noise is also larger.So traditional monocycle PLL frequency synthesizer cannot realize higher frequency resolution.
Utility model content
Technical problem to be solved in the utility model is to provide the frequency synthesizer based on many ring locks phase, Direct Digital Frequency Synthesizers DDS is utilized to produce baseband signal, multiple monocycle frequency synthesizer of phase locking carries out spread spectrum, and on Direct Digital Frequency Synthesizers DDS, compensated oscillator is set, for offsetting or cut down the temperature drift of frequency of oscillation, low mutually hot-tempered, frequency that resolution is high can be obtained.
The technical scheme in the invention for solving the above technical problem is: based on the frequency synthesizer of many ring locks phase, it is characterized in that, comprise power splitter, monocycle frequency synthesizer of phase locking PLL1, monocycle frequency synthesizer of phase locking PLL2, monocycle frequency synthesizer of phase locking PLL3, monocycle frequency synthesizer of phase locking PLL4, Direct Digital Frequency Synthesizers DDS and the compensated oscillator be connected on Direct Digital Frequency Synthesizers DDS, described power splitter connects monocycle frequency synthesizer of phase locking PLL1 simultaneously, monocycle frequency synthesizer of phase locking PLL2 and monocycle frequency synthesizer of phase locking PLL3, monocycle frequency synthesizer of phase locking PLL3 also connects Direct Digital Frequency Synthesizers DDS, monocycle frequency synthesizer of phase locking PLL2 also connects one-level frequency mixer successively, prefilter, secondary frequency mixer, postfilter and monocycle frequency synthesizer of phase locking PLL4, described Direct Digital Frequency Synthesizers DDS is also connected with one-level frequency mixer.
Further, described monocycle frequency synthesizer of phase locking PLL1, monocycle frequency synthesizer of phase locking PLL2, monocycle frequency synthesizer of phase locking PLL3 and monocycle frequency synthesizer of phase locking PLL4 include phase discriminator, loop filter, voltage controlled oscillator and frequency divider, phase discriminator wherein, loop filter are connected successively with voltage controlled oscillator, and frequency divider is connected between frequency discriminator and voltage controlled oscillator.Phase noise and the frequency resolution of this frequency synthesizer restrict mutually.
Further, described Direct Digital Frequency Synthesizers DDS comprises the phase accumulator, wave memorizer, D/A converter and the low pass filter that connect successively, the common port of phase accumulator with wave memorizer is connected clock chip, is connected clock chip at wave memorizer with the common port of D/A converter.Clock chip provides reference clock, the frequency control word of phase accumulator to input carries out linear superposition, the phase code obtained is to wave memorizer addressing, make it to export corresponding amplitude code, obtain corresponding staircase waveform through digital-to-analog converter, obtain the waveform of frequency needed for continually varying finally by low pass filter.This synthesizer utilizes phase feedback control principle control frequency to export, and without the need to external auxiliary frequency acquisition, be easy to integrated, resolution is high.
Further, the model of described monocycle frequency synthesizer of phase locking PLL1, monocycle frequency synthesizer of phase locking PLL2, monocycle frequency synthesizer of phase locking PLL3 and monocycle frequency synthesizer of phase locking PLL4 is ADF4193.
Further, the model of described Direct Digital Frequency Synthesizers DDS is AD9951.
To sum up, the beneficial effects of the utility model are:
1, this many loop circuits structure is by the multistage mixing of Direct Digital Frequency Synthesizers DDS baseband signal, finally achieve the covering of the thin stepping of wide-band, simultaneously, by rational frequency allocation, the frequency multiplication number of times of each phase-locked loop is controlled in relatively low level, the deterioration amount of phase noise is little, ensure that the resolution of each phase-locked loop and final output signal phase noise is improved.
2, on Direct Digital Frequency Synthesizers DDS, also compensated oscillator is connected, for offsetting or cut down the temperature drift of frequency of oscillation, reduce the amplification of the noise of signal frequency after the phase frequency of monocycle frequency synthesizer of phase locking PLL1 and Direct Digital Frequency Synthesizers DDS is amplified, put forward high-frequency resolution.
Accompanying drawing explanation
Fig. 1 is theory diagram of the present utility model.
Embodiment
Below in conjunction with embodiment and accompanying drawing, to the detailed description further of the utility model do, but execution mode of the present utility model is not limited thereto.
Embodiment 1:
As shown in Figure 1, the utility model comprises power splitter, monocycle frequency synthesizer of phase locking PLL1, monocycle frequency synthesizer of phase locking PLL2, monocycle frequency synthesizer of phase locking PLL3, monocycle frequency synthesizer of phase locking PLL4, Direct Digital Frequency Synthesizers DDS and the compensated oscillator be connected on Direct Digital Frequency Synthesizers DDS, described power splitter connects monocycle frequency synthesizer of phase locking PLL1 simultaneously, monocycle frequency synthesizer of phase locking PLL2 and monocycle frequency synthesizer of phase locking PLL3, monocycle frequency synthesizer of phase locking PLL3 also connects Direct Digital Frequency Synthesizers DDS, monocycle frequency synthesizer of phase locking PLL2 also connects one-level frequency mixer successively, prefilter, secondary frequency mixer, postfilter and monocycle frequency synthesizer of phase locking PLL4, described Direct Digital Frequency Synthesizers DDS is also connected with one-level frequency mixer.
Operation principle is as follows: first signal is inputted power splitter, power splitter is utilized to be divided into by signal three tunnels to output to monocycle frequency synthesizer of phase locking PLL1 respectively, monocycle frequency synthesizer of phase locking PLL2 and monocycle frequency synthesizer of phase locking PLL3, Direct Digital Frequency Synthesizers DDS is utilized to produce stepping 10kHz, the baseband frequency signal of bandwidth 100MHz, then the low mutually hot-tempered dot frequency produced with monocycle frequency synthesizer of phase locking PLL2 is by exporting after the mixing of one-level frequency mixer, after the filtering of prefilter, the large step frequency of the L-band stepping 100MHz produced with monocycle frequency synthesizer of phase locking PLL3 is again comprehensive, through the spread spectrum of mixing again of secondary frequency mixer, by thin for arrowband stairstep signal spread spectrum, and by after postfilter filtering, by the wide band high-resolution reference signal produced, finally input monocycle frequency synthesizer of phase locking PLL4, the narrowband carrier tracking characteristics utilizing it good carries out tracking filter to the spurious components of Direct Digital Frequency Synthesizers DDS reference signal, finally obtain the thin cadence in low mutually hot-tempered broadband to combine signal and then export.Direct Digital Frequency Synthesizers DDS also connects compensated oscillator, for offsetting or cut down the temperature drift of frequency of oscillation, reduce the amplification of the noise of signal frequency after the phase frequency of monocycle frequency synthesizer of phase locking PLL1 and Direct Digital Frequency Synthesizers DDS is amplified, put forward high-frequency resolution.
This many loop circuits structure, by the multistage mixing of Direct Digital Frequency Synthesizers DDS baseband signal, finally achieves the covering of the thin stepping of wide-band.Meanwhile, by rational frequency allocation, control in relatively low level by the frequency multiplication number of times of each phase-locked loop, the deterioration amount of phase noise is little, ensure that the resolution of each phase-locked loop and final output signal phase noise is improved.
Embodiment 2:
The utility model is preferably as follows on the basis of embodiment 1: described monocycle frequency synthesizer of phase locking PLL1, monocycle frequency synthesizer of phase locking PLL2, monocycle frequency synthesizer of phase locking PLL3 and monocycle frequency synthesizer of phase locking PLL4 include phase discriminator, loop filter, voltage controlled oscillator and frequency divider, phase discriminator wherein, loop filter are connected successively with voltage controlled oscillator, and frequency divider is connected between frequency discriminator and voltage controlled oscillator.
Direct Digital Frequency Synthesizers DDS comprises the phase accumulator, wave memorizer, D/A converter and the low pass filter that connect successively, the common port of phase accumulator with wave memorizer is connected clock chip, is connected clock chip at wave memorizer with the common port of D/A converter.
The model of monocycle frequency synthesizer of phase locking PLL1, monocycle frequency synthesizer of phase locking PLL2, monocycle frequency synthesizer of phase locking PLL3 and monocycle frequency synthesizer of phase locking PLL4 is ADF4193.The output phase place of ADF4193 has digital programmable function, and when operating frequency is 2 GHz, phase of output signal error is 0.5 ° of rms, and the substrate of phase noise coefficient is-216 dBc/Hz, has 3 line serial line interfaces, with having low-noise differential amplifier in time slice.Inside comprises a digital frequency phase detector PFD and accurate differential charge pump of a low noise.Differential charge pump exports and converts a single ended voltage output to by differential amplifier, is supplied to outside voltage controlled oscillator VCO.
The model of Direct Digital Frequency Synthesizers DDS is AD9951.The most high workload clock of AD9951 is 400 MHz, have employed advanced CMOS technology.It forms a complete digital control programmable frequency synthesizer in conjunction with high speed, high-performance DAC and comparator in a sheet, and has clock generating function.AD9951 adopts 48 pin surface encapsulation form encapsulation, supports the operation of the compatible serial ports of SPI, and all registers can pass through Parallel I/O mouth write, also can be write by serial ports, and as determined frequency, victory becomes frequency hopping etc., meets the requirement of different designs.
As mentioned above, the utility model can be realized preferably.
Claims (5)
1. based on the frequency synthesizer of many ring locks phase, it is characterized in that, comprise power splitter, monocycle frequency synthesizer of phase locking PLL1, monocycle frequency synthesizer of phase locking PLL2, monocycle frequency synthesizer of phase locking PLL3, monocycle frequency synthesizer of phase locking PLL4, Direct Digital Frequency Synthesizers DDS and the compensated oscillator be connected on Direct Digital Frequency Synthesizers DDS, described power splitter connects monocycle frequency synthesizer of phase locking PLL1 simultaneously, monocycle frequency synthesizer of phase locking PLL2 and monocycle frequency synthesizer of phase locking PLL3, monocycle frequency synthesizer of phase locking PLL3 also connects Direct Digital Frequency Synthesizers DDS, monocycle frequency synthesizer of phase locking PLL2 also connects one-level frequency mixer successively, prefilter, secondary frequency mixer, postfilter and monocycle frequency synthesizer of phase locking PLL4, described Direct Digital Frequency Synthesizers DDS is also connected with one-level frequency mixer.
2. the frequency synthesizer based on many ring locks phase according to claim 1, it is characterized in that, described monocycle frequency synthesizer of phase locking PLL1, monocycle frequency synthesizer of phase locking PLL2, monocycle frequency synthesizer of phase locking PLL3 and monocycle frequency synthesizer of phase locking PLL4 include phase discriminator, loop filter, voltage controlled oscillator and frequency divider, phase discriminator wherein, loop filter are connected successively with voltage controlled oscillator, and frequency divider is connected between frequency discriminator and voltage controlled oscillator.
3. the frequency synthesizer based on many ring locks phase according to claim 1, it is characterized in that, described Direct Digital Frequency Synthesizers DDS comprises the phase accumulator, wave memorizer, D/A converter and the low pass filter that connect successively, the common port of phase accumulator with wave memorizer is connected clock chip, is connected clock chip at wave memorizer with the common port of D/A converter.
4. the frequency synthesizer based on many ring locks phase according to claim 1 and 2, it is characterized in that, the model of described monocycle frequency synthesizer of phase locking PLL1, monocycle frequency synthesizer of phase locking PLL2, monocycle frequency synthesizer of phase locking PLL3 and monocycle frequency synthesizer of phase locking PLL4 is ADF4193.
5. the frequency synthesizer based on many ring locks phase according to claim 1 or 3, is characterized in that, the model of described Direct Digital Frequency Synthesizers DDS is AD9951.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105141257A (en) * | 2015-09-02 | 2015-12-09 | 中国电子科技集团公司第三十八研究所 | Broadband large dynamic linear frequency multiplier |
| CN106774629A (en) * | 2016-12-09 | 2017-05-31 | 建荣半导体（深圳）有限公司 | Direct Digital Frequency Synthesizers and its frequency combining method, modulated transmitting device |
| CN109698698A (en) * | 2019-02-21 | 2019-04-30 | 中国人民解放军火箭军工程大学 | A kind of broadband mixing synthetic method and device for distribution interference |
| CN110399008A (en) * | 2019-07-16 | 2019-11-01 | 武汉鑫诚欣科技有限公司 | The ultrashort frequency synthesizer for involving microwave frequency band reception of wireless signals and method |
| CN113259021A (en) * | 2021-04-30 | 2021-08-13 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Automatic receiving and dispatching testing device for portable aviation radio station |
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2015
- 2015-03-02 CN CN201520121094.8U patent/CN204376871U/en active Active
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105141257A (en) * | 2015-09-02 | 2015-12-09 | 中国电子科技集团公司第三十八研究所 | Broadband large dynamic linear frequency multiplier |
| CN105141257B (en) * | 2015-09-02 | 2018-04-06 | 中国电子科技集团公司第三十八研究所 | A kind of linear frequency multiplier of broadband Larger Dynamic |
| CN106774629A (en) * | 2016-12-09 | 2017-05-31 | 建荣半导体（深圳）有限公司 | Direct Digital Frequency Synthesizers and its frequency combining method, modulated transmitting device |
| CN106774629B (en) * | 2016-12-09 | 2019-07-16 | 建荣半导体（深圳）有限公司 | Direct Digital Frequency Synthesizers and its frequency combining method, modulated transmitting device |
| CN109698698A (en) * | 2019-02-21 | 2019-04-30 | 中国人民解放军火箭军工程大学 | A kind of broadband mixing synthetic method and device for distribution interference |
| CN110399008A (en) * | 2019-07-16 | 2019-11-01 | 武汉鑫诚欣科技有限公司 | The ultrashort frequency synthesizer for involving microwave frequency band reception of wireless signals and method |
| CN113259021A (en) * | 2021-04-30 | 2021-08-13 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Automatic receiving and dispatching testing device for portable aviation radio station |
| CN113259021B (en) * | 2021-04-30 | 2023-06-02 | 西南电子技术研究所（中国电子科技集团公司第十研究所） | Portable automatic receiving and transmitting testing device for aviation radio station |
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