CN204244201U - Semiconductor device corrective system - Google Patents
Semiconductor device corrective system Download PDFInfo
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- CN204244201U CN204244201U CN201420771379.1U CN201420771379U CN204244201U CN 204244201 U CN204244201 U CN 204244201U CN 201420771379 U CN201420771379 U CN 201420771379U CN 204244201 U CN204244201 U CN 204244201U
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Abstract
The utility model provides a kind of semiconductor device corrective system, described semiconductor device corrective system comprises storage device, serial communication modular, Digital Signal Processing and control circuit module and analog signal processing circuit module, storage device stores the correction data of the semiconductor device that the online product test of factory obtains, the real time execution signal of semiconductor device is converted to digital controlled signal and is sent to Digital Signal Processing and control circuit module by analog signal processing circuit module, Digital Signal Processing and control circuit module are loaded on described analog signal processing circuit module according to described digital controlled signal automatically by the corresponding correction data that described storage device stores by described serial communication modular, described correction data is fed back to described semiconductor device with semiconductor device described in real time correction by described analog signal processing circuit module, eliminate the product parameters inconsistency caused because semiconductor technology processing procedure precision is discrete.
Description
Technical field
The utility model relates to IC manufacturing field, particularly relates to a kind of semiconductor device corrective system.
Background technology
MEMS (micro electro mechanical system) (Micro-Electro-Mechanical System, MEMS) transducer adopts microelectronics and the produced novel sensor of micromachining technology.Compared with traditional transducer, it has, and volume is little, lightweight, cost is low, low in energy consumption, reliability is high, be suitable for mass production, be easy to integrated and realize intelligentized feature.Meanwhile, it is made can to complete the irrealizable function of some traditional mechanical pick-up device in the characteristic size of micron dimension.
Semiconductor technology develops into deep-submicron from sub-micron, and precision improves constantly, but the discreteness of technique is still indeterminable problem.Normal distribution curve, be one in all very important probability distribution of mathematics, physics and engineering field.The mechanical device using semiconductor technology processing procedure to manufacture and testing circuit itself, performance parameter has the characteristic of a normal distribution.Technology controlling and process precision is higher, and Data distribution8 is more concentrated, but still has some particular product performance parameters and have and depart from, and affects the yield of product.
Utility model content
The utility model provides a kind of semiconductor device corrective system, to correct semiconductor device, eliminate the product parameters inconsistency caused because semiconductor technology processing procedure precision is discrete, under the convenience prerequisite not affecting product use, reduce the cost that production manufactures.
For solving the problem, the utility model provides a kind of semiconductor device corrective system, comprise: storage device, serial communication modular, analog signal processing circuit module and Digital Signal Processing and control circuit module, wherein, the correction data of described storage device storing semiconductor device, described serial communication modular controls described semiconductor device corrective system and starts, the real time execution signal of described semiconductor device is converted to digital controlled signal and is sent to described Digital Signal Processing and control circuit module by described analog signal processing circuit module, described Digital Signal Processing and control circuit module are loaded on described analog signal processing circuit module according to described digital controlled signal automatically by the corresponding correction data that described storage device stores by described serial communication modular, described correction data is fed back to described semiconductor device by described analog signal processing circuit module, with semiconductor device described in real time correction.
Optionally, in described semiconductor device corrective system, described storage device is disposable programmable nonvolatile memory.
Optionally, in described semiconductor device corrective system, described storage device comprises: electrification reset module, power on automatic load logic circuit, OTP module, address mapping logic module, register array and serial ports control burning OTP logical circuit, wherein, control burning OTP logical circuit by described serial ports and the correction data of semiconductor device is burned onto described OTP module, during real time correction semiconductor device, described electrification reset module produces power-on reset signal, the correction data of burning in advance in described OTP module is sent to described register array according to described power-on reset signal by described address mapping logic module by the described automatic load logic circuit that powers on, described correction data is sent to described analog signal processing circuit module by described register array.
Optionally, in described semiconductor device corrective system, described semiconductor device is the MEMS mechanical device with three detection axis.
Optionally, in described semiconductor device corrective system, described semiconductor device corrective system also comprises the first multiplexer circuit and the second multiplexer circuit, described first multiplexer circuit selects the real time execution signal of a detection axis of described MEMS mechanical device to be sent to described analog signal processing circuit module according to the control signal of described Digital Signal Processing and control circuit module, described second multiplexer circuit is loaded on described analog signal processing circuit module according to the correction data of the corresponding detection axis that the control signal of described Digital Signal Processing and control circuit module selects described storage device to store.
The utility model provides a kind of semiconductor device corrective system, described semiconductor device corrective system comprises storage device, serial communication modular, Digital Signal Processing and control circuit module and analog signal processing circuit module, described storage device stores the correction data of the semiconductor device that the online product test of factory obtains, control semiconductor device corrective system by serial communication modular to start, the real time execution signal of described semiconductor device is converted to digital controlled signal and is sent to described Digital Signal Processing and control circuit module by described analog signal processing circuit module, described Digital Signal Processing and control circuit module are loaded on described analog signal processing circuit module according to described digital controlled signal automatically by the corresponding correction data that described storage device stores by described serial communication modular, described correction data is fed back to described semiconductor device with semiconductor device described in real time correction by described analog signal processing circuit module, eliminate the product parameters inconsistency caused because semiconductor technology processing procedure precision is discrete, revise the normal distribution characteristic of large batch of particular product performance parameters, performance parameter is provided to have good conforming product.
Further, described storage device adopts One Time Programmable (OTP) nonvolatile memory, utilize OTP nonvolatile memory to simulate and repeatedly repeat erasable nonvolatile memory, after semiconductor device such as MEMS sensing device electrifying startup, electrification reset module produces a power-on reset signal, storage device detects power-on reset signal, and by powering on, automatic load logic circuit is stored into register array the correction data of burning in advance in OTP module by the mode of address maps.Correction data obtains by when the online product test of factory, then controls burning OTP logical circuit by serial communication modular and the built-in serial ports of storage device, correction data is burnt to the corresponding storage area of OTP module.Power on automatic loading data, under the convenience prerequisite not affecting product use, reduces the cost that production manufactures.
Accompanying drawing explanation
Fig. 1 is the structural representation of the semiconductor device corrective system of the utility model one embodiment.
Fig. 2 is the structural representation of the storage device of the semiconductor device corrective system of the utility model one embodiment.
Fig. 3 is the storage area distribution map of the OTP module of the utility model one embodiment.
Fig. 4 is the running status flow chart of the automatic load logic circuit that powers on of the utility model one embodiment.
Fig. 5 is the running status flow chart of the serial ports control burning OTP logical circuit of the utility model one embodiment.
Embodiment
Below in conjunction with the drawings and specific embodiments, the semiconductor device corrective system that the utility model proposes is described in further detail.According to the following describes and claims, advantage of the present utility model and feature will be clearer.It should be noted that, accompanying drawing all adopts the form that simplifies very much and all uses non-ratio accurately, only in order to object that is convenient, aid illustration the utility model embodiment lucidly.
As shown in Figure 1, the utility model provides a kind of semiconductor device corrective system, for real time correction semiconductor device as MEMS mechanical device 1a, described semiconductor device corrective system comprises: storage device 1e, serial communication modular 1f, analog signal processing circuit module 1c and Digital Signal Processing and control circuit module 1g, wherein, the correction data of described storage device 1e storing semiconductor device, described serial communication modular 1f controls described semiconductor device corrective system and starts, the real time execution signal of described MEMS mechanical device 1a is converted to digital controlled signal and is sent to described Digital Signal Processing and control circuit module 1g by described analog signal processing circuit module 1c, the correction data that described storage device 1e stores is loaded on described analog signal processing circuit module 1c according to described digital controlled signal by described serial communication modular 1f by described Digital Signal Processing and control circuit module 1g automatically, described correction data is fed back to described MEMS mechanical device 1a by described analog signal processing circuit module 1c, with semiconductor device described in real time correction as MEMS mechanical device 1a.
Continue with reference to figure 1, described semiconductor device is such as MEMS mechanical device 1a, described MEMS mechanical device 1a adopts semiconductor technology to be made, there are X, Y, Z tri-detection axis, and produce three groups of acceleration differential signals X+/X-, Y+/Y-, Z+/Z-, often organize acceleration differential signal and the sensing device along the acceleration linear correlation detected by respective detection axis.In the present embodiment, described real time execution signal refers to the acceleration differential signal of described MEMS mechanical device 1a, certainly, has the MEMS mechanical device of three detection axis described in the utility model is not only applicable to, is also applicable to other MEMS mechanical devices.Further, the utility model is also applicable to correct other device architectures be made by semiconductor technology, considers the factor of cost, is particularly useful for the semiconductor device that complex structure cost is higher.
In order to reduce the chip area of semiconductor device corrective system, described semiconductor device corrective system comprises the first multiplexer circuit 1b and the second multiplexer circuit 1d further, the control signal that described first multiplexer circuit 1b sends according to Digital Signal Processing and control circuit module 1g selects the real time execution signal of a detection axis of described MEMS mechanical device 1a to be sent to described analog signal processing circuit module 1c, described second multiplexer circuit 1d is loaded on described analog signal processing circuit module 1c according to the correction data of the corresponding detection axis that the control signal that Digital Signal Processing and control circuit module 1g send selects described storage device 1e to store.Specifically, by the mode of time-sharing multiplex, in acceleration differential signal X+/X-, Y+/Y-, Z+/Z-of X, Y, Z tri-detection axis of MEMS mechanical device 1a, select the acceleration differential signal of a detection axis as X+/X-and analog signal processing circuit module 1c as described in being sent in each time by the first multiplexer circuit 1b.Second multiplexer circuit 1d is similar to the operation principle of the first multiplexer circuit 1b, timesharing selects the correction data of a detection axis in three detection axis corresponding correction data Xcal, Ycal, the Zcal stored in storage device 1e as Xcal, and the correction data Xcal of the detection axis of selection is sent to described analog signal processing circuit module 1c.
Concrete, Digital Signal Processing and control circuit module 1g control to start by serial communication modular 1f, after Digital Signal Processing and control circuit module 1g work, produce the first multiplexer circuit 1b respectively, the control signal of analog signal processing circuit module 1c and the second multiplexer circuit 1d, and then select a detection axis of MEMS mechanical device 1a and to should the correction data of detection axis, the clock signal that producing analog signal processing circuit module 1c needs makes described analog signal processing circuit module 1c that the real time execution signal of described MEMS mechanical device 1a is converted to digital controlled signal, then the digital controlled signal that analog signal processing circuit module 1c produces is received.In the present embodiment, acceleration differential signal is converted to acceleration digital signal through analog signal processing circuit 1c, described analog signal processing circuit 1c comprises charge amplifying circuit and A/D change-over circuit, described differential signal converts voltage signal to through charge amplifying circuit, and described voltage signal can obtain acceleration digital signal through A/D change-over circuit.
In order to workout cost, the 1e of storage device described in the present embodiment is OTP nonvolatile memory.As everyone knows, multiple programmable nonvolatile memory (EEPROM) generally includes high pressure NMOS pipe, high voltage PMOS pipe, thin oxide window, isolation from oxygen SiClx-silicon nitride (Oxide-Nitride, the level such as ON), compared with common CMOS process, general increase is close to 10 levels, and in semiconductor technology processing procedure, level is more, the step of technique is more, and cost is also higher.And disposable programmable (One Time Programable, OTP) nonvolatile memory process, one deck polysilicon (Poly) is only used to realize the structure of similar EEPROM, substantially CMOS technology processing procedure that can be compatible general, greatly reduce level, reduce the cost manufactured.Although use disposable programmable (OTP) nonvolatile memory, correspondingly need the memory space increasing several times, to reach the object of simulation EEPROM, but for low capacity nonvolatile memory, memory cell only account for smaller space, the most space consumingly be actually inner booster circuit module, increase the memory capacity of several times, substantially can not increase the area of chip.
The structure and working principle of the storage device 1e of the present embodiment is described in detail below in conjunction with Fig. 2.
As shown in Figure 2, in the present embodiment, described storage device 1e is OTP nonvolatile memory, described OTP nonvolatile memory comprises: electrification reset module 2a, power on automatic load logic circuit 2b, OTP module 2c, address mapping logic module 2d, register array 2e and serial ports control burning OTP logical circuit 2f, wherein, control burning OTP logical circuit 2f by described serial ports and the correction data of semiconductor device is burned onto described OTP module 2c, during real time correction semiconductor device, described electrification reset module 2a produces power-on reset signal, the correction data of burning in advance in described OTP module 2c is sent to described register array 2e according to described power-on reset signal by described address mapping logic module 2d by the described automatic load logic circuit 2b that powers on, described correction data is sent to described analog signal processing circuit module 1c by the second multiplexer circuit 1d by described register array 2e.
Specifically, during real time correction semiconductor device, power-on reset signal POR is produced when electrification reset module 2a powers at every turn, power-on reset signal controls to power on when automatic load logic circuit 2b powers at every turn automatically to run once, produce OTP read control signal and OTP with the automatic load logic circuit 2b that controls to power on and read address signal, OTP module 2c needs read control signal and OTP to read address signal, the data of its storage area are sent to OTP module port, this process is serial, simultaneously OTP reads address and register array is many-to-one relation, by judging burning control word, the data of certain suitable storage area are stored to register array 2e, described correction data is sent to analog signal processing circuit module 1c by register array 2e.
Wherein, described correction data obtains by the mode of the online product test of factory, described serial communication modular 1f controls burning OTP logical circuit 2f by described serial ports and correction data is burned onto OTP module 2c, that is, serial communication modular 1f controls burning OTP logical circuit 2f by the serial ports that storage device 1e is built-in and correction data is burned onto the corresponding memory location of OTP module 2c.Detailed, when correction data being burned onto in described storage device 1e, serial communication modular 1f controls to start serial ports and controls burning OTP logical circuit 2f, burning process is started by its serial communication interface write burning enable signal, serial ports controls burning OTP logical circuit 2f and produces OTP burning digital controlled signal and OTP writing address signal, by described address mapping logic module 2d, correction data is write to OTP module 2c according to OTP burning digital controlled signal and OTP writing address signal.In addition, described serial ports controls burning OTP logical circuit 2f and after burning completes, writes corresponding burning control word, using the judgement signal as the automatic load logic circuit module 2b that powers on.
Fig. 3 is the regional distribution chart of OTP module 2c.3a is whole complete OTP module, and 3b is an OTP storage area, and 3c is the region that this storage area stores burning control word.According to the size of register array 2e, OTP module 2c is divided into N number of OTP storage area 3b, each OTP storage area 3b needs configuration burning control word region 3c.In order to prevent erroneous judgement, burning control word content according to the size of OTP storage area, can be set as more than 2, and data can be complete 1 or other numerical value that can accurately judge.OTP storage area can only burning once, if desired burning correction data again, just needs to be switched to next OTP storage area.
Fig. 4 is the running status flow chart of automatic load logic circuit 2b of powering on.When powering on, electrification reset module 2a produces power-on reset signal POR at every turn, and the automatic load logic circuit 2b that powers on produces OTP read control signal and OTP reads address signal, during real time correction semiconductor device, specifically comprises the steps:
Step 4a: power on initial condition, it is maximum N that OTP reads address initial value, powers on effectively, enters step 4b;
Step 4b: the automatic load logic circuit 2b that powers on generation OTP read control signal and OTP read address signal, read burning control word, enter step 4c;
Step 4c: the automatic load logic circuit 2b that powers on judges that whether burning control word is effective; If burning control word is invalid, show that these OTP data are for empty, enter step 4d; If burning control word is effective, show that this OTP storage area is by burning, data are latest data, directly enter step 4f;
Step 4d:OTP reads address decrement, enters step 4e;
Whether step 4e: the automatic load logic circuit 2b that powers on to judge that OTP reads address be 0; If it is not 0 that OTP reads address, reenter step 4b, the operation before repetition; If it is 0 that OTP reads address, illustrate this OTP storage area also non-burning cross data, directly get the hang of 4f;
Step 4f: the automatic load logic circuit 2b that powers on reads the correction data that this block OTP storage area stores, and by address maps to register array 2e, the automatic loading that powers on successfully enters, and enters step 4g;
Step 4g: wait state, the automatic load logic circuit 2b that powers on wait for the operation that next time powers on.
Wherein, power on and automatically load successfully, enter wait state, power at every turn and only run once, in wait state, also can pass through serial ports manual load.
Fig. 5 is the running status flow chart that serial ports controls burning OTP logical circuit 2f.When correction data is burned onto in described storage device, serial ports controls burning OTP logical circuit 2f and produces OTP burning digital controlled signal and OTP writing address signal, by described address mapping logic module 2d, correction data is write to OTP module 2c according to OTP burning digital controlled signal and OTP writing address signal, specifically comprise the steps:
Step 5a: burning initial condition, described serial communication modular 1f write burning enable signal WR, and OTP writing address initial value is minimum value 0, enters step 5b;
Step 5b: serial ports controls burning OTP logical circuit 2f and reads burning control word, enters step 5c;
Step 5c: serial ports controls burning OTP logical circuit 2f and judges that whether burning control word is effective, if burning control word is effective, shows that these OTP data are by burning, enter step 5d; If burning control word is invalid, show that this OTP storage area is not by burning, can the new register array data of burning, directly enter step 5f;
Step 5d:OTP writing address adds 1, enters step 5e;
Step 5e: serial ports controls burning OTP logical circuit 2f and judges whether OTP writing address is maximum N; If OTP writing address is N, whole OTP data, entirely by burning, cannot carry out burning action again, now need to terminate current burning action, enter step 5g; If OTP writing address is not N, reenter step 5b, the operation before repetition;
Step 5f: pass through address maps, correction data in described register array 2e is automatically mapped to the corresponding OTP storage area of described OTP module 2c, produces OTP burning digital controlled signal, configure corresponding burning control word simultaneously, after success burning data, step 5g can be entered;
Step 5g: wait state, described serial ports controls burning OTP logical circuit 2f and waits for that described serial communication modular 1f writes burning enable signal next time.
As from the foregoing, described storage device 1e adopts OTP nonvolatile memory, pass through said method, disposable programmable (OTP) nonvolatile memory is modeled to the nonvolatile memory of multiple programmable, under the convenience prerequisite not affecting product use, reduce the cost that production manufactures.
Generally speaking, adopt semiconductor device corrective system of the present utility model, semiconductor device is as after MEMS sensing device 1a electrifying startup, electrification reset module 2a produces a power-on reset signal, storage device 2e detects power-on reset signal, by the automatic load logic circuit 2b that powers on the correction data of burning in advance in OTP module 2c, be stored into register array 2e by the mode of address maps.Correction data by obtaining when the online product test of factory, then controls burning OTP logical circuit 2f by the serial ports that serial communication modular 1f and storage device 1e is built-in, correction data is burnt to the corresponding storage area of OTP module 2c.
Obviously, those skilled in the art can carry out various change and modification to utility model and not depart from spirit and scope of the present utility model.Like this, if these amendments of the present utility model and modification belong within the scope of the utility model claim and equivalent technologies thereof, then the utility model is also intended to comprise these change and modification.
Claims (5)
1. a semiconductor device corrective system, comprise: storage device, serial communication modular, analog signal processing circuit module and Digital Signal Processing and control circuit module, wherein, the correction data of described storage device storing semiconductor device, described serial communication modular controls described semiconductor device corrective system and starts, the real time execution signal of described semiconductor device is converted to digital controlled signal and is sent to described Digital Signal Processing and control circuit module by described analog signal processing circuit module, described Digital Signal Processing and control circuit module are loaded on described analog signal processing circuit module according to described digital controlled signal automatically by the corresponding correction data that described storage device stores by described serial communication modular, described correction data is fed back to described semiconductor device by described analog signal processing circuit module, with semiconductor device described in real time correction.
2. semiconductor device corrective system as claimed in claim 1, it is characterized in that, described storage device is disposable programmable nonvolatile memory.
3. semiconductor device corrective system as claimed in claim 2, it is characterized in that, described storage device comprises: electrification reset module, power on automatic load logic circuit, OTP module, address mapping logic module, register array and serial ports control burning OTP logical circuit, wherein, control burning OTP logical circuit by described serial ports and the correction data of semiconductor device is burned onto described OTP module, during real time correction semiconductor device, described electrification reset module produces power-on reset signal, the correction data of burning in advance in described OTP module is sent to described register array according to described power-on reset signal by described address mapping logic module by the described automatic load logic circuit that powers on, described correction data is sent to described analog signal processing circuit module by described register array.
4. semiconductor device corrective system as claimed in claim 1, it is characterized in that, described semiconductor device is the MEMS mechanical device with three detection axis.
5. semiconductor device corrective system as claimed in claim 4, it is characterized in that, described semiconductor device corrective system also comprises the first multiplexer circuit and the second multiplexer circuit, described first multiplexer circuit selects the real time execution signal of a detection axis of described MEMS mechanical device to be sent to described analog signal processing circuit module according to the control signal of described Digital Signal Processing and control circuit module, described second multiplexer circuit is loaded on described analog signal processing circuit module according to the correction data of the corresponding detection axis that the control signal of described Digital Signal Processing and control circuit module selects described storage device to store.
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| CN201420771379.1U CN204244201U (en) | 2014-12-09 | 2014-12-09 | Semiconductor device corrective system |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104410396A (en) * | 2014-12-09 | 2015-03-11 | 杭州士兰微电子股份有限公司 | Correcting system and correcting method for semiconductor device |
| CN106952665A (en) * | 2017-03-16 | 2017-07-14 | 成都信息工程大学 | A kind of circuit for accessing otp memory |
-
2014
- 2014-12-09 CN CN201420771379.1U patent/CN204244201U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104410396A (en) * | 2014-12-09 | 2015-03-11 | 杭州士兰微电子股份有限公司 | Correcting system and correcting method for semiconductor device |
| CN106952665A (en) * | 2017-03-16 | 2017-07-14 | 成都信息工程大学 | A kind of circuit for accessing otp memory |
| CN106952665B (en) * | 2017-03-16 | 2023-07-14 | 成都信息工程大学 | Circuit for accessing OTP memory |
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