CN203838697U - Solid-state disc device based on DDR interface - Google Patents
Solid-state disc device based on DDR interface Download PDFInfo
- Publication number
- CN203838697U CN203838697U CN201420274731.0U CN201420274731U CN203838697U CN 203838697 U CN203838697 U CN 203838697U CN 201420274731 U CN201420274731 U CN 201420274731U CN 203838697 U CN203838697 U CN 203838697U
- Authority
- CN
- China
- Prior art keywords
- ddr interface
- interface
- solid
- flash
- ddr
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000002245 particle Substances 0.000 claims abstract description 7
- 101100498818 Arabidopsis thaliana DDR4 gene Proteins 0.000 claims description 4
- 230000005540 biological transmission Effects 0.000 abstract description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
Landscapes
- Information Transfer Systems (AREA)
Abstract
The utility model relates to a solid-state disc, and in particular relates to a solid-state disc device based on a DDR interface. The solid-state disc comprises a flash memory controller, wherein the uplink of the flash memory controller is connected with a CPU through the DDR interface while the downlink of the flash memory is connected with flash memory particles through a flash memory bus. According to the solid-state disc device based on the DDR interface provided by the utility model, the hard disk can be directly mounted on a memory slot of the CPU, so that delay can be greatly reduced, and furthermore data transmission efficiency is improved.
Description
Technical field
The utility model relates to a kind of Ssd apparatus, particularly a kind of Ssd apparatus based on ddr interface.
Background technology
Development along with Flash technology, increasing Flash SSD(flash memory hard disk) be taken as hard disk applications on Computer Storage, the Flash SSD interface of main flow comprises SATA interface (Serial Advanced Technology Attachment---Serial Advanced Technology Attachment at present, a kind of serial hardware driver interface based on industry standard), SAS interface, these are several for PCI-E interface (PCI-Express), generally be connected to PCI-E, PCH or the ICH(I/O controller hub meaning be " i/o controller center) on equipment, be used for improving the access speed of computer system, but the hard disk of this legacy interface mode is due to the distance from CPU, memory access latency is generally larger.
Summary of the invention
In order to solve the problem of prior art, the utility model provides a kind of Ssd apparatus based on ddr interface, and it can be directly installed on hard disk on the memory bank of CPU, can significantly reduce delay, further improves data transmission efficiency.
The technical scheme that the utility model adopts is as follows:
A Ssd apparatus based on ddr interface, comprises flash controller, and flash controller uplink connects CPU by ddr interface, and downgoing line connects flash memory particle by flash memory bus.
Flash controller connects power circuit by ddr interface.
Flash controller connects clock signal circuit by ddr interface.
Ddr interface is DDR3 interface or DDR4 interface.
A kind of Ssd apparatus based on ddr interface of the present utility model is by 1 Flash(flash memory) controller and several Flash particles form, wherein the up of Flash controller is connected with CPU by DDR bus interface (can be DDR3 or DDR4), the descending Flash bus of passing through is connected with Flash particle, its Main Function is that DDR protocol conversion is become to Flash agreement, be connected under PCH or ICH and compare with traditional flash SSD, can realize the direct access of CPU to Flash SSD, thereby can reduce system access, postpone, improve memory rate.
In addition, in the utility model, the necessary power supply of Ssd apparatus and clock signal are also provided by standard ddr interface, thereby can reduce the complexity of design and reduce design cost.
To sum up, the beneficial effect that the technical scheme that the utility model provides is brought is:
The low delay of system storage, increase system memory size, lower design cost, can be used on a plurality of server platforms and use.Solid state hard disc can be directly installed on memory bank, can improve on the one hand the capacity of system storage, CPU can directly access on the other hand, thereby can improve disk read-write performance.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the utility model embodiment, below the accompanying drawing of required use during embodiment is described is briefly described, apparently, accompanying drawing in the following describes is only embodiment more of the present utility model, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the structured flowchart of a kind of Ssd apparatus based on ddr interface of the present utility model.
Embodiment
For making the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with accompanying drawing, the utility model embodiment is described in further detail.
Embodiment mono-
As shown in Figure 1, a kind of Ssd apparatus based on ddr interface is comprised of 1 Flash controller and four Flash particles, wherein the up of Flash controller is connected with CPU by DDR bus (can be DDR3 or DDR4), the descending Flash bus of passing through is connected with Flash particle, its Main Function is that DDR protocol conversion is become to Flash agreement, be connected under PCH or ICH and compare with traditional flash SSD, can realize the direct access of CPU to Flash SSD, thereby can reduce system access, postpone, improve memory rate.
In addition, in the present embodiment, the necessary power supply of Ssd apparatus and clock signal are also provided by standard ddr interface, thereby can reduce the complexity of design and reduce design cost.
The foregoing is only preferred embodiment of the present utility model, not in order to limit the utility model, all within spirit of the present utility model and principle, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection domain of the present utility model.
Claims (4)
1. the Ssd apparatus based on ddr interface, comprises flash controller, it is characterized in that, described flash controller uplink connects CPU by ddr interface, and downgoing line connects flash memory particle by flash memory bus.
2. a kind of Ssd apparatus based on ddr interface according to claim 1, is characterized in that, described flash controller connects power circuit by ddr interface.
3. a kind of Ssd apparatus based on ddr interface according to claim 2, is characterized in that, described flash controller connects clock signal circuit by ddr interface.
4. according to a kind of Ssd apparatus based on ddr interface described in claim 1,2 or 3, it is characterized in that, described ddr interface is DDR3 interface or DDR4 interface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420274731.0U CN203838697U (en) | 2014-05-27 | 2014-05-27 | Solid-state disc device based on DDR interface |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420274731.0U CN203838697U (en) | 2014-05-27 | 2014-05-27 | Solid-state disc device based on DDR interface |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203838697U true CN203838697U (en) | 2014-09-17 |
Family
ID=51516512
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420274731.0U Expired - Fee Related CN203838697U (en) | 2014-05-27 | 2014-05-27 | Solid-state disc device based on DDR interface |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203838697U (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104572518A (en) * | 2014-12-30 | 2015-04-29 | 杭州华为数字技术有限公司 | Storage device |
| CN104681077A (en) * | 2015-03-05 | 2015-06-03 | 上海磁宇信息科技有限公司 | MRAM (magnetic random access memory)-NAND controller and SMD (surface mount device) SSD (solid state drive) |
| CN105589912A (en) * | 2015-03-27 | 2016-05-18 | 上海磁宇信息科技有限公司 | Method and storage structure for processing frequently written document with MRAM (Magnetic Random Access Memory) |
| CN105630408A (en) * | 2015-07-10 | 2016-06-01 | 上海磁宇信息科技有限公司 | Solid-state drive control chip integrating MRAM (Magnetic Random Access Memory) and solid-state drive |
| WO2018039855A1 (en) * | 2016-08-29 | 2018-03-08 | 华为技术有限公司 | Memory device, memory controller, data caching device, and computer system |
-
2014
- 2014-05-27 CN CN201420274731.0U patent/CN203838697U/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104572518A (en) * | 2014-12-30 | 2015-04-29 | 杭州华为数字技术有限公司 | Storage device |
| CN104572518B (en) * | 2014-12-30 | 2018-06-26 | 杭州华为数字技术有限公司 | A kind of storage device |
| CN104681077A (en) * | 2015-03-05 | 2015-06-03 | 上海磁宇信息科技有限公司 | MRAM (magnetic random access memory)-NAND controller and SMD (surface mount device) SSD (solid state drive) |
| CN104681077B (en) * | 2015-03-05 | 2018-07-31 | 上海磁宇信息科技有限公司 | A kind of MRAM-NAND controllers and patch type solid state disk |
| CN105589912A (en) * | 2015-03-27 | 2016-05-18 | 上海磁宇信息科技有限公司 | Method and storage structure for processing frequently written document with MRAM (Magnetic Random Access Memory) |
| CN105589912B (en) * | 2015-03-27 | 2019-09-03 | 上海磁宇信息科技有限公司 | A kind of method and storage organization using MRAM processing frequency written document |
| CN105630408A (en) * | 2015-07-10 | 2016-06-01 | 上海磁宇信息科技有限公司 | Solid-state drive control chip integrating MRAM (Magnetic Random Access Memory) and solid-state drive |
| WO2018039855A1 (en) * | 2016-08-29 | 2018-03-08 | 华为技术有限公司 | Memory device, memory controller, data caching device, and computer system |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN203838697U (en) | Solid-state disc device based on DDR interface | |
| CN203552155U (en) | Hard disc plug device based on PCIE slots | |
| CN204650401U (en) | A kind of hard disk backboard of compatible NVME hard disk | |
| CN204203854U (en) | A kind of novel NVME SFF-8639 hard disc switching card | |
| US20120268888A1 (en) | Hard disk drive connector | |
| CN102096559B (en) | Method for improving data transmission efficiency of SATA interface solid state disk | |
| CN203299696U (en) | Raid hardware realization device based on Feiteng platform | |
| CN206147469U (en) | Improve external storage device access performance's computer of soaring | |
| CN102789276A (en) | Laptop with mouse pad | |
| CN104615565A (en) | SAS card device with transmission rate reaching 12Gb | |
| CN204480247U (en) | A kind of gigabit networking of arm processor and SATA interface extending device | |
| CN103440212A (en) | Disk array achieving method based on SPARC server | |
| CN102176589A (en) | Concentrator for universal serial bus (USB)-8 serial port RS422 | |
| CN205809774U (en) | A kind of server and the server master board of inside thereof | |
| CN203299814U (en) | Novel board design | |
| CN201754255U (en) | Computer motherboard, storage device and computer motherboard with storage device | |
| CN202362773U (en) | PCIE high-speed transmission passage-based novel storage structure | |
| CN202632285U (en) | Solid state disk (SSD) controller applying intelligent direct memory access (DMA) | |
| CN205942532U (en) | Embedded computer module | |
| CN106708745A (en) | 24-tub NVME dynamic allocation structure and method | |
| CN205193779U (en) | RAID card based on multi -path server | |
| CN108762382A (en) | A kind of processor board based on the CPU that soars | |
| CN204288804U (en) | A kind of mobile hard disc box of shock-proof shatter-resistant | |
| CN203773954U (en) | Computer interconnected data transmission memorizer | |
| CN203631136U (en) | Microprocessor chip controlled USB flash disk data write protector for teaching |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140917 Termination date: 20160527 |