CN203535111U - Test device for PCIE device power consumption automation detection - Google Patents
Test device for PCIE device power consumption automation detection Download PDFInfo
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- CN203535111U CN203535111U CN201320668554.XU CN201320668554U CN203535111U CN 203535111 U CN203535111 U CN 203535111U CN 201320668554 U CN201320668554 U CN 201320668554U CN 203535111 U CN203535111 U CN 203535111U
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Abstract
The utility model discloses a test device for PCIE device power consumption automation detection. The test device comprises a system power supply module, a power consumption detection module, a single-chip microcomputer processing module and a display module. The system power supply module separately supplies power for the power consumption detection module, the single-chip microcomputer processing module and the display module. The signal input end of the power consumption detection module is connected with a mainboard PCIE interface. The signal output end of the power consumption detection module is connected with the signal input end of the single-chip microcomputer processing module. The signal output end of the single-chip microcomputer processing module is connected with the signal input end of the display module. The test device can accurately and effectively test power consumption of a PCIE device with higher detection efficiency, and greatly simplify design and reduce verification cost.
Description
Technical field
The utility model relates to proving installation technical field, especially a kind of testing apparatus of automated detection PCIE equipment power dissipation.
Background technology
Due to the development with rapid changepl. never-ending changes and improvements of X86 mainboard, also there is basic variation in the physical aspect of product.Miniaturization, miniaturization have become the trend of industry development.Along with the variation of X86 product form, its main peripherals has also occurred in function thereupon, modal variation, from before the high-power video card of simplification, to relating to watch-dog, data transmission set of industry-by-industry etc.Owing to being the same in its essential physical aspect, in order to meet the standard at PCIE interface, each PCIE equipment vendors are that the power consumption of demand is inconsistent to the power supply supply of its equipment.This brings and says a new challenge for X86 motherboard design manufacturer, will meet the requirement of customization, and version type can be more and more less, meets again the power requirement of power supply.Traditional PCIE power consumption test method has been difficult to meet the designing requirement becoming more meticulous, and because traditional method is consuming time, and the data error obtaining is larger, can not be as the design standards of present PCIE Power Management Design.
In prior art, conventionally the mode of employing current probe is measured the power consumption of PCIE equipment, first cut off PCB, then the current value of copper cash is flow through in the mode measurement of a Low ESR copper cash of connecting, again by the supply voltage of multimeter testing apparatus, do again with simple mathematics multiplication, draw power consumption, adopt this test gimmick, need high precision oscillograph, high-precision current probe, need very large expense to drop into, and due to the loss of wire rod, the error of multimeter, the data error finally drawing is more than 0.01%, precision is not high; And owing to there being two kinds of voltages of 3.3V and 12V on PCIE interface, need twice step of double counting, affect work efficiency.
Utility model content
The utility model embodiment technical matters to be solved is: the testing apparatus that a kind of automated detection PCIE equipment power dissipation is provided, can not only exactly, effectively test the power consumption of PCIE equipment, detecting efficiency is higher, and has greatly simplified design, has reduced checking cost.
For solving the problems of the technologies described above, the utility model embodiment has proposed a kind of testing apparatus of automated detection PCIE equipment power dissipation, comprise system power supply module, power consumption detecting module, single chip processing module and display module, described system power supply module is respectively power consumption detecting module, single chip processing module and display module power supply is provided; The signal input part of described power consumption detecting module connects mainboard PCIE interface, the signal output part of described power consumption detecting module is connected with the signal input part of single chip processing module, and the signal output part of single chip processing module is connected with the signal input part of display module.
Described power consumption detecting module comprises the first power consumption detecting module and the second power consumption detecting module, in described the first power consumption detecting module and the second power consumption detecting module, is equipped with communication module, wherein,
Described the first power consumption detecting module comprises the first processing unit IU1, filter resistance IR5, filter resistance IR6, filter capacitor IC17, filter capacitor IC15, accurate power resistor IRS1, power supply test end ITP1 and power supply test end ITP2, one end of described filter resistance IR5 connects power supply test end ITP1, and the other end of filter resistance IR5 connects the input end of analog signal VINP1 of the first processing unit IU1; One end of described filter resistance IR6 connects power supply test end ITP2, and the other end of filter resistance IR6 connects the input end of analog signal VINN2 of the first processing unit IU1; One end of described filter capacitor IC17 is connected with input end of analog signal VINP1, and the other end of filter capacitor IC17 is connected with input end of analog signal VINN2; One end of described accurate power resistor IRS1 connects power supply test end ITP1, and the other end of accurate power resistor IRS1 connects power supply test end ITP2; Described the first processing unit IU1 is by filter capacitor IC15 ground connection;
Described the second power consumption detecting module comprises the second processing unit IU2, filter resistance IR9, filter resistance IR10, filter capacitor IC21, filter capacitor IC20, accurate power resistor IRS2, power supply test end ITP3 and power supply test end ITP4, one end of described filter resistance IR9 connects power supply test end ITP3, and the other end of filter resistance IR9 connects the input end of analog signal VINP1 of the second processing unit IU2; One end of described filter resistance IR10 connects power supply test end ITP4, and the other end of filter resistance IR10 connects the input end of analog signal VINN2 of the second processing unit IU2; One end of described filter capacitor IC21 is connected with input end of analog signal VINP1, and the other end of filter capacitor IC21 is connected with input end of analog signal VINN2; One end of described accurate power resistor IRS2 connects power supply test end ITP3, and the other end of accurate power resistor IRS2 connects power supply test end ITP4; Described the second processing unit IU2 is by filter capacitor IC20 ground connection.
Further, the model of described single chip processing module (3) is CY7C64355.
Further, described display module (4) adopts 8 sections of LED charactrons of red 4 one common anode utmost points to show power consumption data, and it comprises for showing the first display module and second display module of power consumption data.
Technique scheme at least has following beneficial effect: the utility model is respectively power consumption detecting module, single chip processing module and display module by system power supply module power supply is provided; The signal input part of power consumption detecting module connects mainboard PCIE interface, and the signal output part of power consumption detecting module is connected with the signal input part of single chip processing module, and the signal output part of single chip processing module is connected with the signal input part of display module.Can not only exactly, effectively test the power consumption of PCIE equipment, detecting efficiency is higher, and has greatly simplified design, has reduced checking cost.
Accompanying drawing explanation
Fig. 1 is the theory diagram of the testing apparatus of the utility model automated detection PCIE equipment power dissipation.
Fig. 2 is the circuit theory diagrams of power consumption detecting module in the testing apparatus of the utility model automated detection PCIE equipment power dissipation.
Fig. 3 is the circuit theory diagrams of single chip processing module in the testing apparatus of the utility model automated detection PCIE equipment power dissipation.
Fig. 4 is the circuit theory diagrams of display module in the testing apparatus of the utility model automated detection PCIE equipment power dissipation.
Fig. 5 is the circuit theory diagrams of system power supply module in the testing apparatus of the utility model automated detection PCIE equipment power dissipation.
Embodiment
It should be noted that, in the situation that not conflicting, embodiment and the feature in embodiment in the application can combine mutually.Below in conjunction with accompanying drawing, the utility model is described further.
As shown in Figure 1, the testing apparatus of the automated detection PCIE equipment power dissipation of the utility model embodiment comprises system power supply module 1, power consumption detecting module 2, single chip processing module 3 and display module 4, and system power supply module 1 is respectively power consumption detecting module 2, single chip processing module 3 and display module 4 power supply is provided; The signal input part of power consumption detecting module 2 connects mainboard PCIE interface, and the signal output part of power consumption detecting module 2 is connected with the signal input part of single chip processing module 3, and the signal output part of single chip processing module 3 is connected with the signal input part of display module 4.
Power consumption detecting module 2 comprises for detecting the first power consumption detecting module of 3.3V voltage on PCIE interface and for detecting the second power consumption detecting module of 12V voltage on PCIE interface, in described the first power consumption detecting module and the second power consumption detecting module, be equipped with communication module, such as adopting I2C communication module, wherein
As shown in Figure 2, described the first power consumption detecting module comprises the first processing unit IU1, filter resistance IR5, filter resistance IR6, filter capacitor IC17, filter capacitor IC15, accurate power resistor IRS1, power supply test end ITP1 and power supply test end ITP2, one end of described filter resistance IR5 connects power supply test end ITP1, and the other end of filter resistance IR5 connects the input end of analog signal VINP1 of the first processing unit IU1; One end of described filter resistance IR6 connects power supply test end ITP2, and the other end of filter resistance IR6 connects the input end of analog signal VINN2 of the first processing unit IU1; One end of described filter capacitor IC17 is connected with input end of analog signal VINP1, and the other end of filter capacitor IC17 is connected with input end of analog signal VINN2; One end of described accurate power resistor IRS1 connects power supply test end ITP1, and the other end of accurate power resistor IRS1 connects power supply test end ITP2; Described the first processing unit IU1 is by filter capacitor IC15 ground connection;
Described the second power consumption detecting module comprises the second processing unit IU2, filter resistance IR9, filter resistance IR10, filter capacitor IC21, filter capacitor IC20, accurate power resistor IRS2, power supply test end ITP3 and power supply test end ITP4, one end of described filter resistance IR9 connects power supply test end ITP3, and the other end of filter resistance IR9 connects the input end of analog signal VINP1 of the second processing unit IU2; One end of described filter resistance IR10 connects power supply test end ITP4, and the other end of filter resistance IR10 connects the input end of analog signal VINN2 of the second processing unit IU2; One end of described filter capacitor IC21 is connected with input end of analog signal VINP1, and the other end of filter capacitor IC21 is connected with input end of analog signal VINN2; One end of described accurate power resistor IRS2 connects power supply test end ITP3, and the other end of accurate power resistor IRS2 connects power supply test end ITP4; Described the second processing unit IU2 is by filter capacitor IC20 ground connection.
As shown in Figure 3, the model of single chip processing module 3 is CY7C64355, and single-chip microcomputer CY7C64355 reads power consumption data by I2C (IU1 and the IU2) communication interface of Fig. 2, through internal processes, processes and exports to display module 4.In Fig. 2, UJ2 is single-chip microcomputer DEBUG interface, for single-chip microcomputer internal processes debugging, export respectively+3.3V_F_I of P2.x and P3.X and+the demonstration data of 12V_F_I are to display module 4, P0.X is that signal is selected in the position of display module 4.
Ir29, Ir30, Ic26, IR35, IR27, Ic24, Ic, Ic23, is peripheral driver or the filter element of single-chip microcomputer, UJ2 and periphery component module thereof are debugging module, facilitate subsequent product to safeguard debugging.
As shown in Figure 4, display module 4 adopts 8 sections of LED charactrons of red 4 one common anode utmost points to show power consumption data, it comprises the second display module for the first display module of the power consumption data of show+3.3V_F_I and demonstration+12V_F_I power consumption data, particularly, the first display module adopts charactron LED0, the second display module adopts charactron LED1, and charactron LED0 and LED1 are all used 3.3V to do driving power.
IQ2, IQ3, IQ6, IQ7, IQ8, IQ9, IQ10, IQ11, IQ4, IQ5, IQ12, IQ13 is charactron LED0 and LED1 driven MOS pipe.
IR11, IR18, IR19, IR20, IR, IR12, IR13, IR, IR14, IR23, IR15, IR24, IR16, IR25, IR17, IR26 is the brightness regulation resistance of charactron LED0 and LED1.
IR34, IR38, IR33, IR37, IR32, IR36, IR31, IR39, IR43, IR47, IR, IR44, IR, IR45, IR40, IR48, IR52, IR51, IR53, IR54, IR56, IR55, IR57, IR58 is the driving build-out resistor of IU5 drive part and charactron LED0 and LED1.
As shown in Figure 5, this system IU1, IU2, IU5, LED0, LED1 is all used 3.3V power supply, adopts the input of 5V adapter, by analog-converted circuit, converts IU1 to, IU2, IU5, LED0, the power supply supply of LED1 functional unit.
IJ1 external power source supplier interface, IC9, IC10, IR4, IC11 is High frequency filter circuit, removes HFS; IFUSE is fuse, guarantees security of system; IC12, IC13, IC13, IC14 is filter capacitor, can guarantee IU1, IU2, IU5, LED0, LED1 steady operation.
IU3, IC18, IR7, IR8, IC19, PC13 unit is IU1, IU2, supply module.
The utility model is respectively power consumption detecting module 2, single chip processing module 3 and display module 4 by system power supply module 1 power supply is provided; The signal input part of power consumption detecting module 2 connects mainboard PCIE interface, and the signal output part of power consumption detecting module 2 is connected with the signal input part of single chip processing module 3, and the signal output part of single chip processing module 3 is connected with the signal input part of display module 4.Can not only exactly, effectively test the power consumption of PCIE equipment, detecting precision is higher, and the detecting data precision of this PCIE equipment can reach 0.01%, and has greatly simplified design, easy to use, promote test, verification efficiency, simultaneously, can be widely used in X86 motherboard design, promote Power Management Design quality, guarantee design redundancy, reduced checking cost.
The above is embodiment of the present utility model; it should be pointed out that for those skilled in the art, do not departing under the prerequisite of the utility model principle; can also make some improvements and modifications, these improvements and modifications are also considered as protection domain of the present utility model.
Claims (3)
1. the testing apparatus of an automated detection PCIE equipment power dissipation, it is characterized in that, comprise system power supply module (1), power consumption detecting module (2), single chip processing module (3) and display module (4), described system power supply module (1) is respectively power consumption detecting module (2), single chip processing module (3) and display module (4) power supply is provided; The signal input part of described power consumption detecting module (2) connects mainboard PCIE interface, the signal output part of described power consumption detecting module (2) is connected with the signal input part of single chip processing module (3), and the signal output part of single chip processing module (3) is connected with the signal input part of display module (4);
Described power consumption detecting module (2) comprises the first power consumption detecting module and the second power consumption detecting module, in described the first power consumption detecting module and the second power consumption detecting module, is equipped with communication module, wherein,
Described the first power consumption detecting module comprises the first processing unit IU1, filter resistance IR5, filter resistance IR6, filter capacitor IC17, filter capacitor IC15, accurate power resistor IRS1, power supply test end ITP1 and power supply test end ITP2, one end of described filter resistance IR5 connects power supply test end ITP1, and the other end of filter resistance IR5 connects the input end of analog signal VINP1 of the first processing unit IU1; One end of described filter resistance IR6 connects power supply test end ITP2, and the other end of filter resistance IR6 connects the input end of analog signal VINN2 of the first processing unit IU1; One end of described filter capacitor IC17 is connected with input end of analog signal VINP1, and the other end of filter capacitor IC17 is connected with input end of analog signal VINN2; One end of described accurate power resistor IRS1 connects power supply test end ITP1, and the other end of accurate power resistor IRS1 connects power supply test end ITP2; Described the first processing unit IU1 is by filter capacitor IC15 ground connection;
Described the second power consumption detecting module comprises the second processing unit IU2, filter resistance IR9, filter resistance IR10, filter capacitor IC21, filter capacitor IC20, accurate power resistor IRS2, power supply test end ITP3 and power supply test end ITP4, one end of described filter resistance IR9 connects power supply test end ITP3, and the other end of filter resistance IR9 connects the input end of analog signal VINP1 of the second processing unit IU2; One end of described filter resistance IR10 connects power supply test end ITP4, and the other end of filter resistance IR10 connects the input end of analog signal VINN2 of the second processing unit IU2; One end of described filter capacitor IC21 is connected with input end of analog signal VINP1, and the other end of filter capacitor IC21 is connected with input end of analog signal VINN2; One end of described accurate power resistor IRS2 connects power supply test end ITP3, and the other end of accurate power resistor IRS2 connects power supply test end ITP4; Described the second processing unit IU2 is by filter capacitor IC20 ground connection.
2. the testing apparatus of automated detection PCIE equipment power dissipation as claimed in claim 1, is characterized in that, the model of described single chip processing module (3) is CY7C64355.
3. the testing apparatus of automated detection PCIE equipment power dissipation as claimed in claim 1, it is characterized in that, described display module (4) adopts 8 sections of LED charactrons of red 4 one common anode utmost points to show power consumption data, and it comprises for showing the first display module and second display module of power consumption data.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201320668554.XU CN203535111U (en) | 2013-10-28 | 2013-10-28 | Test device for PCIE device power consumption automation detection |
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| CN201320668554.XU CN203535111U (en) | 2013-10-28 | 2013-10-28 | Test device for PCIE device power consumption automation detection |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103529285A (en) * | 2013-10-28 | 2014-01-22 | 深圳市杰和科技发展有限公司 | Test equipment for automatically detecting power consumption of PCIE (Peripheral Component Interface Express) equipment |
| TWI696069B (en) * | 2019-02-13 | 2020-06-11 | 睿寬智能科技有限公司 | Wide-range power measurement device for PCIe equipment |
-
2013
- 2013-10-28 CN CN201320668554.XU patent/CN203535111U/en not_active Withdrawn - After Issue
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103529285A (en) * | 2013-10-28 | 2014-01-22 | 深圳市杰和科技发展有限公司 | Test equipment for automatically detecting power consumption of PCIE (Peripheral Component Interface Express) equipment |
| CN103529285B (en) * | 2013-10-28 | 2015-12-09 | 深圳市杰和科技发展有限公司 | A kind of testing apparatus of automated detection PCIE device power consumption |
| TWI696069B (en) * | 2019-02-13 | 2020-06-11 | 睿寬智能科技有限公司 | Wide-range power measurement device for PCIe equipment |
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| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20140409 Effective date of abandoning: 20151209 |
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| C25 | Abandonment of patent right or utility model to avoid double patenting |