CN203225845U - Digital high-definition video-wall - Google Patents

Digital high-definition video-wall Download PDF

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Publication number
CN203225845U
CN203225845U CN 201320255199 CN201320255199U CN203225845U CN 203225845 U CN203225845 U CN 203225845U CN 201320255199 CN201320255199 CN 201320255199 CN 201320255199 U CN201320255199 U CN 201320255199U CN 203225845 U CN203225845 U CN 203225845U
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CN
China
Prior art keywords
circuit
video
wall
digital high
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN 201320255199
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Chinese (zh)
Inventor
颜文胜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taizhou Zhicheng Electronic Engineering Co., Ltd.
Original Assignee
Taizhou Vocational and Technical College
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taizhou Vocational and Technical College filed Critical Taizhou Vocational and Technical College
Priority to CN 201320255199 priority Critical patent/CN203225845U/en
Application granted granted Critical
Publication of CN203225845U publication Critical patent/CN203225845U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model discloses a digital high-definition video-wall including an MCU and a video-wall server. The video-wall server includes a signal receiving circuit, a decoding circuit connected with an output terminal of the signal receiving circuit, a signal distributing circuit connected with an output terminal of the decoding circuit, a multi-path image processing circuit connected with an output terminal of the signal distributing circuit, a multi-path image displaying circuit connected with an output terminal of the multi-path image processing circuit and a plurality of HDMI output interface circuits connected with an output terminal of the multi-path image displaying circuit. The HDMI output interface circuits are connected with video-walls. The digital high-definition video-wall provided by the utility model is simple in structure and a plurality of video-walls can be driven synchronously. And the connection stability is good. The definition of video display screens can be improved effectively through the HDMI output interface circuits. And the practical applicability is good.

Description

A kind of digital high-definition television wall
Technical field
The utility model belongs to video conference and shows the field, is specifically related to a kind of digital high-definition television wall.
Background technology
In common video conference application, the main meeting-place of video conferencing system can only be seen the picture in a meeting-place at one time, when watching other meeting-place picture if desired, must finish the picture switching or use the split screen function of MCU to finish the picture split screen by MCU, but because in some occasion, need watch the video pictures in a plurality of meeting-place or all meeting-place simultaneously, the video wall of prior art can not provide the picture in a plurality of meeting-place simultaneously, or a plurality of pictures that provide can not show simultaneously, and the resolution of its picture is also lower, is difficult to satisfy the needs in market.
Summary of the invention
But the purpose of this utility model provide a plurality of video displays of a kind of driven in synchronism simple in structure and a kind of digital high-definition television wall.
The technical scheme that realizes the utility model purpose is: a kind of digital high-definition television wall, comprise MCU controller and video wall server, described video wall server comprises signal receiving circuit, the decoding circuit that is connected with described signal receiving circuit output, the signal distribution circuit that is connected with described decoding circuit output, the multipath video treatment circuit that is connected with described signal distribution circuit output, the multipath video display circuit that is connected with described multipath video treatment circuit output, with a plurality of HDMI output interface circuits that described multipath video display circuit output is connected, described HDMI output interface circuit is connected with video wall.
Described video wall server also comprises the image resolution ratio holding circuit, and described image resolution ratio holding circuit is connected electrically between described multipath video treatment circuit and the multipath video display circuit.
Also comprise data processor, the output of described data processor is connected with described signal receiving circuit, and the input of described data processor is connected with described MCU controller.
Described decoding circuit is the decoding circuit of picture format H.264.
Described video wall server is a plurality of, and stack arranges successively.
The utlity model has positive effect: of the present utility model simple in structure, but a plurality of video walls of its driven in synchronism, and connective stability is good, by the HDMI output interface circuit, can effectively improve the definition that TV screen shows, and practicality is good.
Description of drawings
Content of the present utility model is easier clearly to be understood in order to make, according to specific embodiment also by reference to the accompanying drawings, the utility model is described in further detail below, wherein:
Fig. 1 is structural principle block diagram of the present utility model.
Embodiment
(embodiment 1)
Fig. 1 has shown a kind of embodiment of the present utility model, and wherein Fig. 1 is structural principle block diagram of the present utility model.
See Fig. 1, a kind of digital high-definition television wall, comprise MCU controller 1 and video wall server 2, described video wall server 2 comprises signal receiving circuit 21, the decoding circuit 22 that is connected with described signal receiving circuit 21 outputs, the signal distribution circuit 23 that is connected with described decoding circuit 22 outputs, the multipath video treatment circuit 24 that is connected with described signal distribution circuit 23 outputs, the multipath video display circuit 25 that is connected with described multipath video treatment circuit 24 outputs, with a plurality of HDMI output interface circuits 26 that described multipath video display circuit 25 outputs are connected, described HDMI output interface circuit 26 is connected with video wall 3.But a plurality of video walls of its driven in synchronism, and connective stability is good, by the HDMI output interface circuit, can effectively improve the definition that TV screen shows, and practicality is good.
Described video wall server 2 also comprises image resolution ratio holding circuit 27, and described image resolution ratio holding circuit 27 is connected electrically between described multipath video treatment circuit 24 and the multipath video display circuit 25.It can output image resolution be CIF, 4CIF and 720P, in the present embodiment, adopts the broadband consistent with the system of IMS conference bandwidth, the highlyest can reach 4Mbps, and it has improved the quality of operation image to a certain extent.
Also comprise data processor 28, the output of described data processor 28 is connected with described signal receiving circuit 21, and the input of described data processor 28 is connected with described MCU controller 1.When MCU controller and display device distance is far away, adopt data processor to finish the data of all video conference sub-venues are handled, improved validity and the promptness of data.
Described decoding circuit 22 is the decoding circuit of picture format H.264.
Described video wall server is a plurality of, and stack arranges successively.Its a plurality of video wall servers that can superpose have increased the quantity that connects video wall to a certain extent, are adapted at using in the situation of many video walls.
Obviously, above-described embodiment of the present utility model only is for the utility model example clearly is described, and is not to be restriction to execution mode of the present utility model.For those of ordinary skill in the field, can also make other changes in different forms on the basis of the above description.Here need not also can't give all execution modes exhaustive.And these belong to apparent variation or the change that connotation of the present utility model extends out and still belong to protection range of the present utility model.

Claims (5)

1. digital high-definition television wall, comprise MCU controller and video wall server, it is characterized in that: described video wall server comprises signal receiving circuit, the decoding circuit that is connected with described signal receiving circuit output, the signal distribution circuit that is connected with described decoding circuit output, the multipath video treatment circuit that is connected with described signal distribution circuit output, the multipath video display circuit that is connected with described multipath video treatment circuit output, with a plurality of HDMI output interface circuits that described multipath video display circuit output is connected, described HDMI output interface circuit is connected with video wall.
2. a kind of digital high-definition television wall according to claim 1, it is characterized in that: described video wall server also comprises the image resolution ratio holding circuit, and described image resolution ratio holding circuit is connected electrically between described multipath video treatment circuit and the multipath video display circuit.
3. a kind of digital high-definition television wall according to claim 2, it is characterized in that: also comprise data processor, the output of described data processor is connected with described signal receiving circuit, and the input of described data processor is connected with described MCU controller.
4. a kind of digital high-definition television wall according to claim 3 is characterized in that: described decoding circuit is the decoding circuit of picture format H.264.
5. a kind of digital high-definition television wall according to claim 4, it is characterized in that: described video wall server is a plurality of, stack arranges successively.
CN 201320255199 2013-05-13 2013-05-13 Digital high-definition video-wall Expired - Fee Related CN203225845U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201320255199 CN203225845U (en) 2013-05-13 2013-05-13 Digital high-definition video-wall

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201320255199 CN203225845U (en) 2013-05-13 2013-05-13 Digital high-definition video-wall

Publications (1)

Publication Number Publication Date
CN203225845U true CN203225845U (en) 2013-10-02

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Family Applications (1)

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CN 201320255199 Expired - Fee Related CN203225845U (en) 2013-05-13 2013-05-13 Digital high-definition video-wall

Country Status (1)

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CN (1) CN203225845U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018202589A1 (en) 2017-05-05 2018-11-08 Arcelik Anonim Sirketi A remote control method for a multiple-screen display system
CN110010016A (en) * 2019-03-28 2019-07-12 苏州佳世达电通有限公司 Display panel

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018202589A1 (en) 2017-05-05 2018-11-08 Arcelik Anonim Sirketi A remote control method for a multiple-screen display system
CN110010016A (en) * 2019-03-28 2019-07-12 苏州佳世达电通有限公司 Display panel

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
ASS Succession or assignment of patent right

Owner name: TAIZHOU ZHICHENG ELECTRONIC ENGINEERING CO., LTD.

Free format text: FORMER OWNER: YAN WENSHENG

Effective date: 20141201

Free format text: FORMER OWNER: TAIZHOU VOCATIONAL TECHNOLOGY COLLEGE

Effective date: 20141201

C41 Transfer of patent application or patent right or utility model
COR Change of bibliographic data

Free format text: CORRECT: ADDRESS; FROM: 318000 TAIZHOU, ZHEJIANG PROVINCE TO: 318050 TAIZHOU, ZHEJIANG PROVINCE

TR01 Transfer of patent right

Effective date of registration: 20141201

Address after: 318050 No. 3005, electronic digital city, Luqiao District, Zhejiang, Taizhou

Patentee after: Taizhou Zhicheng Electronic Engineering Co., Ltd.

Address before: 318000 Xueyuan Road, Zhejiang,, No. 788, Taizhou Vocational and Technical College, Jiaojiang

Patentee before: Yan Wensheng

Patentee before: Taizhou Vocational & Technical College

DD01 Delivery of document by public notice

Addressee: Taizhou Zhicheng Electronic Engineering Co., Ltd.

Document name: Approval notice for cost mitigation

DD01 Delivery of document by public notice

Addressee: Taizhou Zhicheng Electronic Engineering Co., Ltd.

Document name: Notification of Termination of Patent Right

CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20131002

Termination date: 20150513

EXPY Termination of patent right or utility model