CN203219288U - Three-level superheterodyne receiver and local oscillation circuit thereof - Google Patents
Three-level superheterodyne receiver and local oscillation circuit thereof Download PDFInfo
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- CN203219288U CN203219288U CN 201320271187 CN201320271187U CN203219288U CN 203219288 U CN203219288 U CN 203219288U CN 201320271187 CN201320271187 CN 201320271187 CN 201320271187 U CN201320271187 U CN 201320271187U CN 203219288 U CN203219288 U CN 203219288U
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Abstract
The utility model discloses a three-level superheterodyne receiver and a local oscillation circuit thereof. The local oscillation circuit of the superheterodyne receiver comprises a crystal oscillator, a direct digital frequency synthesizer, a PLL (phase-locked loop) circuit, a VCO (voltage controlled oscillator) circuit, a frequency multiplier I, a frequency multiplier II, a frequency multiplier III, a frequency mixer I and a frequency mixer II, and signals generated from the direct digital frequency synthesizer enter the PLL circuit and the VCO circuit in sequence. The input end of each of the frequency multiplier I, the frequency multiplier II and the frequency multiplier III is connected to the output end of the crystal oscillator, the output end of the frequency multiplier I is connected to the input end of the direct digital frequency synthesizer, and the output end of each of the frequency multiplier II and the frequency multiplier III is connected to the second input end of each of the frequency mixer I and the frequency mixer II. The output end of the VCO circuit is connected to the input end of each of the frequency mixer I and the frequency mixer II simultaneously. The output end of the frequency mixer I is connected to the second input end of the PLL circuit. The output of the frequency mixer II serves as the output of the local oscillation circuit of the superheterodyne receiver. The three-level superheterodyne receiver and the local oscillation circuit thereof have the advantages of high frequency bandwidth, high frequency resolution, low phase noise and the like.
Description
Technical field
The utility model relates to technical field of micro communication, is specifically related to a kind of three grades of superheterodyne receivers and local oscillation circuit thereof.
Background technology
Receiver is the key component in the communication system, is mainly used in the fields such as civil aviation, space flight, maritime communication; Also can be used as frequency monitoring, the monitoring of enemy broadcasting station signal and detection etc.Receiver commonly used is the two-stage superheterodyne receiver, its primary structure as shown in Figure 1, comprise the antenna, high-frequency amplifier, first frequency mixer, first intermediate frequency amplifier, second frequency mixer, second intermediate frequency amplifier, wave detector, low frequency amplifier, the output that connect successively, wherein first frequency mixer links to each other with local oscillator with second frequency mixer.
For the protection whole system stable, operating accuracy is high; usually require receiver in specific frequency range, having functions such as bandwidth selection, model selection, intermediate frequency rf attenuation control, and require fast, strong interference immunity receiver frequency accuracy height, channel settling time, operating temperature range is wide, stability is better.
At present main receiver product is immature because of technology, and a lot of key indexs are bigger apart from the above-mentioned requirements gap.An important parameter of receiver is exactly phase noise, the excessive main influence to receiver of phase noise is to have reduced the letter/ratio of making an uproar that receives signal, reduces demodulation quality, and the error rate is increased, some modulation system comparatively responsive to phase place particularly is as the QAM signal.In the radio monitoring application facet, mainly be to influence Detection of weak, so each system integration company and user pay much attention to the index of phase noise.Phase noise not only will be seen the index of phase place noise to the size of Detection of Weak Signals influence, i.e. noise power size in the unit bandwidth at certain frequency deviation place of offset carrier more will be seen the frequency resolution of receiver.
And the phase noise of receiver in fact specially refers to the phase noise of local oscillator, in the prior art, local oscillator mainly adopts the scheme of DDS excitation PLL to realize, frequency source in this scheme can be accomplished higher frequency, conversion speed, higher resolution faster within the specific limits, S-band have lower spuious with make an uproar mutually, make an uproar mutually can be low to moderate-95～-the making an uproar mutually of 100dBm/Hz@10kHz; But there is a bigger deficiency in it: can't reach above-mentioned lower making an uproar mutually at C-band.
The utility model content
The technical problems to be solved in the utility model just is: at the technical problem of prior art existence, the utility model provides three grades of low superheterodyne receivers of a kind of bandwidth, frequency resolution height, phase noise and local oscillation circuit thereof, and these three grades of superheterodyne receivers can both reach lower phase noise in S-band and C-band.
For achieving the above object, receiver local oscillation circuit of the present utility model, comprise crystal oscillator, Direct Digital Synthesizer, the PLL circuit, the VCO circuit, the signal that Direct Digital Synthesizer produces enters the PLL circuit successively, the VCO circuit, also comprise frequency multiplier one, frequency multiplier two, frequency multiplier three, frequency mixer one, frequency mixer two, wherein: frequency multiplier one, frequency multiplier two, the input of frequency multiplier three all is connected to the output of crystal oscillator, the output of frequency multiplier one links to each other with the input of Direct Digital Synthesizer, and the output of frequency multiplier two is connected to the input of frequency mixer one, the output of frequency multiplier three is connected to the input of frequency mixer two; The output of VCO circuit is connected to second input of frequency mixer one and second input of frequency mixer two simultaneously; The output of frequency mixer one is connected to second input of PLL circuit; Frequency mixer two is output as the output of whole receiver local oscillation circuit.In this local oscillation circuit, the signal of crystal oscillator output adopts frequency multiplier to handle back output, can make crystal oscillator be operated in lower frequency, improves frequency stability; Adopt Direct Digital Synthesizer to obtain the high frequency resolution of local oscillation signal; The composite type frequency synthesis realizes the broadband frequency hopping of frequency and high frequency resolution.Adopt the receiver of this kind local oscillation circuit can have advantages such as PLL bandwidth, clutter suppress, frequency resolution height, the frequency tuning time is short, phase noise is low simultaneously.
Preferably, above-mentioned Direct Digital Synthesizer is the Direct Digital Synthesizer with 32 frequency control words, makes frequency resolution up to 1HZ.
Three grades of superheterodyne receivers of the present utility model, comprise first frequency mixer, second frequency mixer, the output of local oscillation circuit one is connected to second input of first frequency mixer, the output of local oscillation circuit two is connected to second input of second frequency mixer, also comprise local oscillation circuit three and be connected second frequency mixer three-mixer afterwards, the output of local oscillation circuit three is connected second input of three-mixer; Wherein, the receiver local oscillation circuit in the local oscillation circuit one employing such scheme.
As further improvement of the utility model, above-mentioned three grades of superheterodyne receivers also comprise isolation amplitude limiter, attenuator, high-frequency amplifier, preselection filter group, first amplifier, first filter, first intermediate frequency amplifier, second filter, second intermediate frequency amplifier, the 3rd filter, the 3rd intermediate frequency amplifier, the 4th filter that links to each other in turn; The input of wherein isolating amplitude limiter connects the external radio-frequency signal input, the output output intermediate-freuqncy signal of the 4th filter; First frequency mixer is connected between first filter and first intermediate frequency amplifier; Second frequency mixer is connected between second filter and second intermediate frequency amplifier; Three-mixer is connected between the 3rd filter and the 3rd intermediate frequency amplifier.
Preferably, for obtaining cleaner frequency spectrum, above-mentioned the 4th filter is the switch filter group, the output output intermediate-freuqncy signal of switch filter group.
The beneficial effects of the utility model are: local oscillation circuit one of the present utility model adopts directly synthetic method to realize crucial frequency, the composite type frequency synthesis realizes the broadband frequency hopping of frequency and high frequency resolution, adopts three grades of superheterodyne receivers of this local oscillation circuit to have advantages such as frequency resolution height, PLL bandwidth, clutter suppress, the frequency tuning time is short, phase noise is low.
Description of drawings
Fig. 1 is the structural representation of receiver local oscillation circuit of the present utility model;
Fig. 2 is the structural representation of three grades of superheterodyne receivers of the present utility model.
Marginal data:
11, local oscillation circuit one; 12, local oscillation circuit two; 13, local oscillation circuit three; 111, crystal oscillator; 112, frequency multiplier one; 113, Direct Digital Synthesizer; 114, PLL circuit; 115, VCO circuit; 116, frequency multiplier two; 117, frequency multiplier three; 118, frequency mixer one; 119, frequency mixer two; 21, high-frequency amplifier; 22, first amplifier; 23, first intermediate frequency amplifier; 24, second intermediate frequency amplifier; 25, the 3rd intermediate frequency amplifier; 31, first frequency mixer; 32, second frequency mixer; 33, three-mixer; 41, first filter; 42, second filter; 43, the 3rd filter; 5, isolate amplitude limiter; 6, attenuator; 7, preselection filter group; 8, the 4th filter.
Embodiment
Below with reference to Figure of description and specific embodiment the utility model is described in further details.
Embodiment 1
As shown in Figure 1, the receiver local oscillation circuit of present embodiment, comprise crystal oscillator 111, Direct Digital Synthesizer 113, PLL circuit 114, VCO circuit 115, frequency multiplier 1, frequency multiplier 2 116, frequency multiplier 3 117, frequency mixer 1, frequency mixer 2 119, wherein: the signal that Direct Digital Synthesizer 113 produces enters PLL circuit 114, VCO circuit 115 successively; The input of frequency multiplier 1, frequency multiplier 2 116, frequency multiplier 3 117 all is connected to the output of crystal oscillator 111, the output of frequency multiplier 1 links to each other with the input of Direct Digital Synthesizer 113, the output of frequency multiplier 2 116, frequency multiplier 3 117 is connected respectively to the input of frequency mixer 1 and frequency mixer 2 119, and namely the output of frequency multiplier 2 116 is connected to the input of frequency mixer 1, the output of frequency multiplier 3 117 is connected to the input of frequency mixer 2 119; The output of VCO circuit 115 is connected to second input of frequency mixer 1 and second input of frequency mixer 2 119 simultaneously; The output of frequency mixer 1 is connected to second input of PLL circuit 114; Frequency mixer 2 119 is output as the output of whole receiver local oscillation circuit.Above-mentioned Direct Digital Synthesizer 113 has 32 frequency control words, and frequency resolution can reach 1HZ.Particularly, the crystal oscillator 111 in the present embodiment, Direct Digital Synthesizer 113, PLL circuit 114, VCO circuit 115, frequency multiplier, frequency mixer are the normal circuit that adopts in the prior art, repeat no more in the present embodiment.In this local oscillation circuit, the signal of crystal oscillator 111 outputs adopts frequency multiplier to handle back output, can make crystal oscillator 111 be operated in lower frequency, improves frequency stability; Adopt Direct Digital Synthesizer 113 to obtain the high frequency resolution of local oscillation signal; The composite type frequency synthesis realizes the broadband frequency hopping of frequency and high frequency resolution.
Embodiment 2
As shown in Figure 2, three grades of superheterodyne receivers of present embodiment, its input of isolating amplitude limiter 5 connects the external radio-frequency signal input, its output is connected in series attenuator 6, high-frequency amplifier 21, preselection filter group 7, first amplifier 22, first filter 41, first frequency mixer 31, first intermediate frequency amplifier 23, second filter 42, second frequency mixer 32, second intermediate frequency amplifier 24, the 3rd filter 43, three-mixer 33, the 3rd intermediate frequency amplifier 25, the 4th filter 8 in turn, wherein the output of the 4th filter 8 output intermediate-freuqncy signal; Local oscillation circuit 1, local oscillation circuit 2 12, the output of local oscillation circuit 3 13 is connected respectively to first frequency mixer 31, second frequency mixer 32, second input of three-mixer 33, it is second input that the output of local oscillation circuit 1 is connected to first frequency mixer 31, the output of local oscillation circuit 2 12 is connected to second input of second frequency mixer 32, the output of local oscillation circuit 3 13 is connected to second input of three-mixer 33, in, the receiver local oscillation circuit that local oscillation circuit 1 adopts among the embodiment 1, local oscillation circuit 2 12 and local oscillation circuit 3 13 can adopt the general local oscillation circuit that uses in the prior art; Above-mentioned the 4th filter 8 is the switch filter group, reduces by directly synthetic bring spuious, makes frequency spectrum cleaner, the output output intermediate-freuqncy signal of switch filter group.Isolation amplitude limiter 5 in the present embodiment, attenuator 6, amplifier, bank of filters 7, filter, frequency mixer, switch filter group etc. also are the normal circuit that adopts in the prior art, repeat no more in the present embodiment.The local oscillation circuit 1 of three grades of superheterodyne receivers in the present embodiment adopts local oscillation circuit among the embodiment 1, have advantages such as PLL bandwidth, clutter suppress, frequency resolution height, the frequency tuning time is short, phase noise is low, it is made an uproar mutually can not only all reach-95 at S-band, C-band～-100dBm/Hz@10kHz, even can be low to moderate-120dBm/Hz@10kHz.
Below only be preferred implementation of the present utility model, protection range of the present utility model also not only is confined to above-described embodiment, and all technical schemes that belongs under the utility model thinking all belong to protection range of the present utility model.Should be pointed out that for those skilled in the art the some improvements and modifications not breaking away under the utility model principle prerequisite should be considered as protection range of the present utility model.
Claims (5)
1. receiver local oscillation circuit, comprise crystal oscillator (111), Direct Digital Synthesizer (113), PLL circuit (114), VCO circuit (115), the signal that described Direct Digital Synthesizer (113) produces enters PLL circuit (114), VCO circuit (115) successively, it is characterized in that: also comprise frequency multiplier one (112), frequency multiplier two (116), frequency multiplier three (117), frequency mixer one (118), frequency mixer two (119); The input of described frequency multiplier one (112), frequency multiplier two (116), frequency multiplier three (117) all is connected to the output of crystal oscillator (111), the output of frequency multiplier one (112) links to each other with the input of Direct Digital Synthesizer (113), and the output of frequency multiplier two (116) is connected to the input of frequency mixer one (118), the output of frequency multiplier three (117) is connected to the input of frequency mixer two (119); The output of described VCO circuit (115) is connected to second input of frequency mixer one (118) and second input of frequency mixer two (119) simultaneously; The output of described frequency mixer one (118) is connected to second input of PLL circuit (114); Described frequency mixer two (119) is output as the output of whole receiver local oscillation circuit.
2. receiver local oscillation circuit according to claim 1 is characterized in that: described Direct Digital Synthesizer (113) is for having the Direct Digital Synthesizer of 32 frequency control words.
3. three grades of superheterodyne receivers, comprise first frequency mixer (31), second frequency mixer (32), the output of local oscillation circuit one (11) is connected to second input of first frequency mixer (31), the output of local oscillation circuit two (12) is connected to second input of second frequency mixer (32), it is characterized in that: also comprise local oscillation circuit three (13) and be connected second frequency mixer (32) three-mixer (33) afterwards, the output of local oscillation circuit three (13) is connected second input of three-mixer (33); Described local oscillation circuit one (11) adopts the receiver local oscillation circuit described in the claim 1 or 2.
4. three grades of superheterodyne receivers according to claim 3 is characterized in that: also comprise the isolation amplitude limiter (5), attenuator (6), high-frequency amplifier (21), preselection filter group (7), first amplifier (22), first filter (41), first intermediate frequency amplifier (23), second filter (42), second intermediate frequency amplifier (24), the 3rd filter (43), the 3rd intermediate frequency amplifier (25), the 4th filter (8) that link to each other in turn; Wherein, the input of isolating amplitude limiter (5) connects the external radio-frequency signal input, the output output intermediate-freuqncy signal of the 4th filter (8); Above-mentioned first frequency mixer (31) is connected between first filter (41) and first intermediate frequency amplifier (23); Second frequency mixer (32) is connected between second filter (42) and second intermediate frequency amplifier (24); Three-mixer (33) is connected between the 3rd filter (43) and the 3rd intermediate frequency amplifier (25).
5. three grades of superheterodyne receivers according to claim 4 is characterized in that: described the 4th filter (8) is the switch filter group, the output output intermediate-freuqncy signal of switch filter group.
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| CN 201320271187 CN203219288U (en) | 2013-05-17 | 2013-05-17 | Three-level superheterodyne receiver and local oscillation circuit thereof |
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| CN 201320271187 CN203219288U (en) | 2013-05-17 | 2013-05-17 | Three-level superheterodyne receiver and local oscillation circuit thereof |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108390696A (en) * | 2018-05-11 | 2018-08-10 | 中国电子科技集团公司第五十四研究所 | C frequency ranges minimize one transmitter and four receivers intermediate frequency unit |
| CN108616283A (en) * | 2018-05-11 | 2018-10-02 | 中国电子科技集团公司第五十四研究所 | The anti-interference radio frequency unit of Ka frequency ranges of jump and amplitude limiting processing is solved based on Ka |
| CN108631810A (en) * | 2018-05-11 | 2018-10-09 | 中国电子科技集团公司第五十四研究所 | The anti-interference demodulation intermediate frequency unit of C frequency ranges based on amplitude limiting processing |
| CN109257057A (en) * | 2018-11-08 | 2019-01-22 | 扬州海科电子科技有限公司 | A kind of ultra wide band Superheterodyne receiving system |
-
2013
- 2013-05-17 CN CN 201320271187 patent/CN203219288U/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108390696A (en) * | 2018-05-11 | 2018-08-10 | 中国电子科技集团公司第五十四研究所 | C frequency ranges minimize one transmitter and four receivers intermediate frequency unit |
| CN108616283A (en) * | 2018-05-11 | 2018-10-02 | 中国电子科技集团公司第五十四研究所 | The anti-interference radio frequency unit of Ka frequency ranges of jump and amplitude limiting processing is solved based on Ka |
| CN108631810A (en) * | 2018-05-11 | 2018-10-09 | 中国电子科技集团公司第五十四研究所 | The anti-interference demodulation intermediate frequency unit of C frequency ranges based on amplitude limiting processing |
| CN108390696B (en) * | 2018-05-11 | 2023-12-22 | 中国电子科技集团公司第五十四研究所 | C-band miniaturized one-transmitting-four-receiving medium-frequency unit |
| CN109257057A (en) * | 2018-11-08 | 2019-01-22 | 扬州海科电子科技有限公司 | A kind of ultra wide band Superheterodyne receiving system |
| CN109257057B (en) * | 2018-11-08 | 2023-09-29 | 扬州海科电子科技有限公司 | Ultra-wideband superheterodyne receiving system |
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| C14 | Grant of patent or utility model | ||
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Address after: 610000 Shuangliu County, southwest of Sichuan, Hong Kong Economic Development Zone Venture Center, No. 208, No. Patentee after: Chengdu Zhongya Polytron Technologies Inc Address before: 610000, 9, Huang Hai Road, Shuangliu Industrial Park, Chengdu, Sichuan Patentee before: Chengdu Zhongya Tongmao Technology Co.,Ltd. |
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| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130925 Termination date: 20190517 |