CN202710716U - Novel programmer - Google Patents

Novel programmer Download PDF

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Publication number
CN202710716U
CN202710716U CN 201220325473 CN201220325473U CN202710716U CN 202710716 U CN202710716 U CN 202710716U CN 201220325473 CN201220325473 CN 201220325473 CN 201220325473 U CN201220325473 U CN 201220325473U CN 202710716 U CN202710716 U CN 202710716U
Authority
CN
China
Prior art keywords
circuit
chip
testing circuit
main control
places
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CN 201220325473
Other languages
Chinese (zh)
Inventor
苏龙健
郑灼荣
李务柒
徐景存
刘境发
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jianrong Integrated Circuit Technology Zhuhai Co Ltd
Original Assignee
Jianrong Integrated Circuit Technology Zhuhai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jianrong Integrated Circuit Technology Zhuhai Co Ltd filed Critical Jianrong Integrated Circuit Technology Zhuhai Co Ltd
Priority to CN 201220325473 priority Critical patent/CN202710716U/en
Application granted granted Critical
Publication of CN202710716U publication Critical patent/CN202710716U/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

The utility model provides a novel burner which has properties of low cost, high reliability and automatic chip picking and placing detection. The novel burner comprises a casing and further comprises a chip picking and placing detection circuit, wherein the casing is internally provided with a main control chip circuit, a voltage detection circuit, a null slice detection circuit, a burning circuit, an outer communication interface and a storage unit, a chip test socket is arranged on the casing, the voltage detection circuit, the null slice detection circuit, the burning circuit, the storage unit, the outer communication interface and the chip test socket are in electrical connection with the main control chip circuit, and the chip picking and placing detection circuit is in electrical connection with the main control chip circuit. The novel burner can be applied to the chip manufacturing field.

Description

A kind of novel cd-rom recorder
Technical field
The utility model relates to a kind of novel cd-rom recorder.
Background technology
All electronic chips all will pass through the test macro analysis, and all have the chip (such as OTP, Flash, E2PROM) that needs programming all will just have corresponding function behind the programmable device write-in program, are referred to as test or programming here.It is manually greatly that present test or programming have, and in order to enhance productivity, a common manual operations member can operate several tests or programmable device simultaneously.The operator operates simultaneously several tests or during programming system, can have artificial error, does not press the startup button such as some unit, centre, does not perhaps take away and other maloperation of causing etc.Existing test or programmable device can not realize picking and placeing detection, and a close friend's prompting interface just can't be provided to the operator, also just can not stop this artificial error.
The utility model content
Technical problem to be solved in the utility model is to overcome the deficiencies in the prior art, and a kind of low cost, high reliability are provided, and has a novel cd-rom recorder that automatic detection chip picks and places.
The technical scheme that the utility model adopts is: the utility model comprises housing, in described housing, be provided with the main control chip circuit, voltage detecting circuit, empty sheet testing circuit, the burning circuit, external communication interface and storage unit, be provided with the test chip socket at described housing, described voltage detecting circuit, described empty sheet testing circuit, described burning circuit, described storage unit, described external communication interface and described test chip socket all are electrically connected with described main control chip circuit, comprise that also chip picks and places testing circuit, described chip picks and places testing circuit and is electrically connected with described main control chip circuit.
Described chip picks and places testing circuit and forms by being arranged on the testing circuit I that is examined on the chip and the testing circuit II that is arranged on the described main control chip circuit, and described testing circuit I links to each other with described testing circuit II.
Be examined chip and adopt the non-mode that powers on, the mode that relies on its chip pin internal circuit that signal lines is dragged down determines whether chip places.
The beneficial effects of the utility model are: because the utility model comprises housing, in described housing, be provided with the main control chip circuit, voltage detecting circuit, empty sheet testing circuit, the burning circuit, external communication interface and storage unit, be provided with the test chip socket at described housing, described voltage detecting circuit, described empty sheet testing circuit, described burning circuit, described storage unit, described external communication interface and described test chip socket all are electrically connected with described main control chip circuit, comprise that also chip picks and places testing circuit, described chip picks and places testing circuit and is electrically connected with described main control chip circuit, so, the utility model picks and places the setting of testing circuit by described chip, by detecting the level height of IO mouth, determine whether test chip inserts or whether take out, and can detect easily whether test chip is arranged in the socket.
Because whether described cd-rom recorder can intelligent decision have chip to put into socket, so, cd-rom recorder can carry out various operations according to these condition intelligent ground of whether putting into, in addition, after burning finished, cd-rom recorder provided an obvious acousto-optic combination indication to operating personnel, allows the operator know exactly whether test chip inserts or whether take out, make things convenient for staff's operation and management, avoid occurring some maloperations.
Described cd-rom recorder is because what adopt is detection to the chip internal circuit, disobey outer signal enabling, do not power on to target yet, therefore described burning neither can damage being examined chip, can effectively detect chip again puts into, realized easily automatic burning, from another point of view, not only saved client's burning cost but also improved system reliability.
Description of drawings
Fig. 1 is that easy structure of the present utility model connects block diagram;
Fig. 2 is the simple and easy schematic diagram that described chip picks and places testing circuit.
Embodiment
As shown in Figure 1, in the present embodiment, the utility model comprises housing, in described housing, be provided with main control chip circuit, voltage detecting circuit, empty sheet testing circuit, burning circuit, communication interface and storage unit, be provided with the test chip socket at described housing, described voltage detecting circuit, described empty sheet testing circuit, described burning circuit, described storage unit, described external communication interface and described test chip socket all are electrically connected with described main control chip circuit.Comprise that also chip picks and places testing circuit, described chip picks and places testing circuit and is electrically connected with described main control chip circuit.
Described chip picks and places testing circuit and forms by being arranged on the testing circuit I that is examined on the chip and the testing circuit II that is arranged on the described main control chip circuit, and described testing circuit I links to each other when chip is inserted with described testing circuit II.As shown in Figure 2, the testing circuit I is comprised of two ESD diodes and a resistance, and is in parallel with described resistance after described two ESD diodes series connection, an end ground connection wherein, and another termination power, this circuit is present in chip under test inside, need not the outside and redesigns.The detection IO mouth that is connected the main control chip of governor circuit between described two ESD diodes by the chip I/O mouth with described testing circuit II.
The utility model carries out when work according to the following steps: main control chip detects IO and is made as pull-up resistor or externally adds suitable pull-up resistor; Cut off the power supply to chip; Sampling Detection IO discontinuously if the IO level that detects is continuously height, illustrates test chip socket chipless or loose contact continuously; Sampling Detection IO discontinuously is low if the IO level that detects is continuously continuously, illustrates that the test chip socket has chip.
This cd-rom recorder comprises following to the process that chip carries out burning: the IO initialization is carried out in master control; Whether detection chip is put into; Voltage detecting; Empty sheet detects; Burning/recording chip; Checking data; Detection chip is taken out and is processed.
The chip detecting method that the utility model cd-rom recorder has just can be realized at various general IC seats, and peripheral circuit is simple, realizes easily.
The utility model can be applicable to the chip manufacturing field.

Claims (3)

1. novel cd-rom recorder, comprise housing, in described housing, be provided with the main control chip circuit, voltage detecting circuit, empty sheet testing circuit, the burning circuit, external communication interface and storage unit, be provided with the test chip socket at described housing, described voltage detecting circuit, described empty sheet testing circuit, described burning circuit, described storage unit, described external communication interface and described test chip socket all are electrically connected with described governor circuit, it is characterized in that: comprise that also chip picks and places testing circuit, described chip picks and places testing circuit and is electrically connected with described main control chip circuit.
2. a kind of novel cd-rom recorder according to claim 1, it is characterized in that: described chip picks and places testing circuit and forms by being arranged on the testing circuit I that is examined on the chip and the testing circuit II that is arranged on the described main control chip circuit, and described testing circuit I links to each other with described testing circuit II.
3. a kind of novel cd-rom recorder according to claim 2 is characterized in that: be examined chip and adopt the non-mode that powers on, the mode that relies on its chip pin internal circuit that signal lines is dragged down determines whether chip places.
CN 201220325473 2012-07-06 2012-07-06 Novel programmer Expired - Lifetime CN202710716U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201220325473 CN202710716U (en) 2012-07-06 2012-07-06 Novel programmer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201220325473 CN202710716U (en) 2012-07-06 2012-07-06 Novel programmer

Publications (1)

Publication Number Publication Date
CN202710716U true CN202710716U (en) 2013-01-30

Family

ID=47591004

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 201220325473 Expired - Lifetime CN202710716U (en) 2012-07-06 2012-07-06 Novel programmer

Country Status (1)

Country Link
CN (1) CN202710716U (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105632556A (en) * 2015-12-25 2016-06-01 环鸿电子(昆山)有限公司 Chip offset detection device and method and chip burning method and system
CN108519541A (en) * 2018-04-23 2018-09-11 珠海深圳清华大学研究院创新中心 A kind of detection circuit and detection device
CN115389912A (en) * 2022-08-26 2022-11-25 无锡众享科技有限公司 OTP MCU chip detection device and detection method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105632556A (en) * 2015-12-25 2016-06-01 环鸿电子(昆山)有限公司 Chip offset detection device and method and chip burning method and system
CN108519541A (en) * 2018-04-23 2018-09-11 珠海深圳清华大学研究院创新中心 A kind of detection circuit and detection device
CN115389912A (en) * 2022-08-26 2022-11-25 无锡众享科技有限公司 OTP MCU chip detection device and detection method
CN115389912B (en) * 2022-08-26 2023-08-29 无锡众享科技有限公司 OTP MCU chip detection device and detection method

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CX01 Expiry of patent term
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Granted publication date: 20130130