CN202696650U - HART protocol conversion device - Google Patents
HART protocol conversion device Download PDFInfo
- Publication number
- CN202696650U CN202696650U CN 201220275738 CN201220275738U CN202696650U CN 202696650 U CN202696650 U CN 202696650U CN 201220275738 CN201220275738 CN 201220275738 CN 201220275738 U CN201220275738 U CN 201220275738U CN 202696650 U CN202696650 U CN 202696650U
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- Prior art keywords
- hart
- protocol conversion
- conversion apparatus
- asynchronous receiving
- hart protocol
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Abstract
The utility model provides an HART (Highway Addressable Remote Transducer) protocol conversion device which is applicable to the field of communication. The HART protocol conversion device comprises an isolation conversion circuit, a CPU (Central Processing Unit) core electrically connected with the isolation conversion circuit, and at least two asynchronous transmitting-receiving buffers electrically connected with the CPU core, wherein each asynchronous transmitting-receiving buffer is electrically connected with multiple channels of HART independent modems. According to the HART protocol conversion device provided by the utility model, multiple channels of HART data in parallel can be acquired in real time and conveniently converted into a single channel of other industrial field bus data in real time.
Description
Technical field
The utility model belongs to the communications field, relates in particular to a kind of HART protocol conversion apparatus.
Background technology
At present, existing highway addressable remote transducer (Highway Addressable Remote Transducer, HART) protocol conversion apparatus majority is to add peripheral circuit by single channel HART stand-alone modem chip to form structure and function singleness.Minority HART protocol conversion apparatus possesses the multipath conversion function, but switch to realize multichannel communication owing to adopt single asynchronism transceiver serial ports to carry out multichannel, response is slower when multi-channel data acquisition, the real-time requirement of data acquisition and control can't be satisfied, the requirement of non real-time equipment control can only be satisfied.
The utility model content
The utility model embodiment provides a kind of HART protocol conversion apparatus, is intended to solve existing HART protocol conversion apparatus and responds slowlyer when multi-channel data acquisition, can't satisfy the real-time problem of the requirement of data acquisition and control.
The utility model embodiment is achieved in that a kind of HART protocol conversion apparatus, comprising:
The isolation change-over circuit;
The core cpu that is electrically connected with described isolation change-over circuit; And
At least two asynchronous receiving-transmitting buffers that are electrically connected with described core cpu, each asynchronous receiving-transmitting buffer is electrically connected respectively multichannel HART stand-alone modem.
Further, described asynchronous receiving-transmitting buffer is 4 road asynchronous receiving-transmitting buffers, and 4 paths of each 4 road asynchronous receiving-transmitting buffer connect respectively 4 road HART stand-alone modems.
Further, described asynchronous receiving-transmitting buffer has multichannel independent input output data queue buffer cell, and each road independent input output data queue buffer cell connects one road HART stand-alone modem.
Further, described independent input output data queue buffer cell is connected with the UART of HART stand-alone modem by 2 lines Transistor-Transistor Logic level processed.
Further, each HART stand-alone modem is connected with HART bus on the target device by the external circuit that is made of resolution element.
Further, described core cpu is connected by data address bus with described asynchronous receiving-transmitting buffer.
Further, described data address bus draws exclusion on adopting.
Further, described asynchronous receiving-transmitting buffer has the normal data address bus interface, and described core cpu is read and write each asynchronous receiving-transmitting buffer by different addressing of address.
Further, described isolation change-over circuit is RS485 isolation change-over circuit.
Further, described isolation change-over circuit is electrically connected with the independent serial port of described core cpu.
HART protocol conversion apparatus among the utility model embodiment can not only be realized multichannel HART data parallel Real-time Collection, and can easily multichannel HART device data be converted in real time other industrial field bus data of single channel.
Description of drawings
Fig. 1 is the structure chart of the HART protocol conversion apparatus that provides of the utility model embodiment.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein only in order to explaining the utility model, and be not used in restriction the utility model.
In the utility model embodiment, the HART protocol conversion apparatus comprises at least two asynchronous receiving-transmitting buffers, and each asynchronous receiving-transmitting buffer connects respectively multichannel HART stand-alone modem.
Comprise two 4 road asynchronous receiving-transmitting buffers with the HART protocol conversion apparatus, it is example that each 4 road asynchronous receiving-transmitting buffer respectively connects 4 road HART stand-alone modems, as shown in Figure 1.
Isolation change-over circuit 1 is electrically connected with core cpu 2.
As an embodiment of the present utility model, isolation change-over circuit 1 is RS485 isolation change-over circuit.
Isolation change-over circuit 1 is electrically connected with the independent serial port of core cpu 2.
In the utility model embodiment, the independent serial port of core cpu 2 can also connect RS232 interface, industrial field bus translation interface, bluetooth module and serial ports/local area network (LAN) modular converter etc. except can connecting isolation change-over circuit 1.
In the utility model embodiment, core cpu 2 and asynchronous receiving-transmitting buffer 3 are electrically connected by data address bus.Each asynchronous receiving-transmitting buffer all has the normal data address bus interface, and core cpu 2 is by each asynchronous receiving-transmitting buffer on the different addressing of address read-write buses.
In the utility model embodiment, core cpu 2 is electrically connected with two asynchronous receiving-transmitting buffers 3, and the data address bus of connection draws exclusion on adopting, and a slice gate circuit chip that uses carries out the logical sequence conversion.
Asynchronous receiving-transmitting buffer 4 has multichannel independent input output data queue buffering (FIFO) function, each road independent input output data queue buffer cell is electrically connected one road HART stand-alone modem, its electric connection mode is to adopt 2 lines logic gates processed (Transistor-Transistor Logic, TTL) the universal asynchronous receiving/transmitting device of level (Universal Asynchronous Receiver/Transmitter, UART) is electrically connected.
The external circuit that each HART stand-alone modem consists of by the discrete element such as some resistance, electric capacity is electrically connected with the HART bus on the target device.
HART protocol conversion apparatus among the utility model embodiment can not only be realized multichannel HART data parallel Real-time Collection, and can easily multichannel HART device data be converted in real time other industrial field bus data of single channel.
The above only is preferred embodiment of the present utility model; not in order to limit the utility model; all any modifications of within spirit of the present utility model and principle, doing, be equal to and replace and improvement etc., all should be included within the protection range of the present utility model.
Claims (10)
1. a HART protocol conversion apparatus is characterized in that, described HART protocol conversion apparatus comprises:
The isolation change-over circuit;
The core cpu that is electrically connected with described isolation change-over circuit; And
At least two asynchronous receiving-transmitting buffers that are electrically connected with described core cpu, each asynchronous receiving-transmitting buffer is electrically connected respectively multichannel HART stand-alone modem.
2. HART protocol conversion apparatus as claimed in claim 1 is characterized in that, described asynchronous receiving-transmitting buffer is 4 road asynchronous receiving-transmitting buffers, and 4 paths of each 4 road asynchronous receiving-transmitting buffer connect respectively 4 road HART stand-alone modems.
3. HART protocol conversion apparatus as claimed in claim 1, it is characterized in that, described asynchronous receiving-transmitting buffer has multichannel independent input output data queue buffer cell, and each road independent input output data queue buffer cell connects one road HART stand-alone modem.
4. HART protocol conversion apparatus as claimed in claim 3 is characterized in that, described independent input output data queue buffer cell is connected with the UART of HART stand-alone modem by 2 lines Transistor-Transistor Logic level processed.
5. HART protocol conversion apparatus as claimed in claim 1 is characterized in that, each HART stand-alone modem is connected with HART bus on the target device by the external circuit that is made of resolution element.
6. HART protocol conversion apparatus as claimed in claim 1 is characterized in that, described core cpu is connected by data address bus with described asynchronous receiving-transmitting buffer.
7. HART protocol conversion apparatus as claimed in claim 6 is characterized in that, described data address bus draws exclusion on adopting.
8. such as claim 1 or 6 described HART protocol conversion apparatus, it is characterized in that described asynchronous receiving-transmitting buffer has the normal data address bus interface, described core cpu is read and write each asynchronous receiving-transmitting buffer by different addressing of address.
9. HART protocol conversion apparatus as claimed in claim 1 is characterized in that, described isolation change-over circuit is RS485 isolation change-over circuit.
10. such as claim 1 or 9 described HART protocol conversion apparatus, it is characterized in that described isolation change-over circuit is electrically connected with the independent serial port of described core cpu.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220275738 CN202696650U (en) | 2012-06-12 | 2012-06-12 | HART protocol conversion device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220275738 CN202696650U (en) | 2012-06-12 | 2012-06-12 | HART protocol conversion device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202696650U true CN202696650U (en) | 2013-01-23 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220275738 Expired - Fee Related CN202696650U (en) | 2012-06-12 | 2012-06-12 | HART protocol conversion device |
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| CN (1) | CN202696650U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109479050A (en) * | 2016-03-29 | 2019-03-15 | 分辨率产品公司 | Puppy parc converter |
| CN115379023A (en) * | 2022-08-25 | 2022-11-22 | 国核自仪系统工程有限公司 | HART communication device |
| US11985214B2 (en) | 2022-07-11 | 2024-05-14 | Resolution Products, Llc | Universal protocol translator |
-
2012
- 2012-06-12 CN CN 201220275738 patent/CN202696650U/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109479050A (en) * | 2016-03-29 | 2019-03-15 | 分辨率产品公司 | Puppy parc converter |
| US10516765B2 (en) | 2016-03-29 | 2019-12-24 | Resolution Products, Llc | Universal protocol translator |
| EP3437300A4 (en) * | 2016-03-29 | 2020-03-04 | Resolution Products, Inc. | Universal protocol translator |
| US11388266B2 (en) | 2016-03-29 | 2022-07-12 | Resolution Products, Llc | Universal protocol translator |
| US11985214B2 (en) | 2022-07-11 | 2024-05-14 | Resolution Products, Llc | Universal protocol translator |
| CN115379023A (en) * | 2022-08-25 | 2022-11-22 | 国核自仪系统工程有限公司 | HART communication device |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130123 Termination date: 20210612 |