CN202488592U - Real-time high definition video transmitter - Google Patents
Real-time high definition video transmitter Download PDFInfo
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- CN202488592U CN202488592U CN2011204910722U CN201120491072U CN202488592U CN 202488592 U CN202488592 U CN 202488592U CN 2011204910722 U CN2011204910722 U CN 2011204910722U CN 201120491072 U CN201120491072 U CN 201120491072U CN 202488592 U CN202488592 U CN 202488592U
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Abstract
The utility model relates to a real-time high definition video data transmitter. Since a present transmitter is restricted by speed and capacity, generally the present transmitter does not support transmission of a full high definition video and only has the video sending function, and corresponding processing is carried out according to a video output requirement. The real-time high definition video transmitter comprises an Ethernet interface module, a data storage module, a data output and conversion module, a video interface, and a central control module. Video data sent by a switch is transmitted to a data processing module through the Ethernet interface module. According to an instruction transmitted by the central control module, the data processing module processes the video data and transmits the video data to the data storage module. After being converted by the data output and conversion module, the video data finally is sent to a display terminal through the video interface. The real-time high definition video transmitter can support the transmission of 1080P full high definition video data at the most so as to satisfy the requirements of different types of data reception terminals.
Description
Technical field
The utility model belongs to electronic technology field, relates to a kind of real-time HD video data transmitter.
Background technology
Video transmitter is an indispensable part during design, the research and development of present processing system for video are produced.Difference by signal input interface can be divided into, S terminal (S-Video), component vide interface (3RCA), bnc interface, RCN interface, VGA interface, DVI interface, HDMI interface.
Existing transmitter is not generally supported the transmission of full HD video, and is only had the function of the transmission of video owing to receive the restriction of speed and capacity, handles
accordingly according to video output request.
The utility model content
The technical problem that the utility model solved provides a kind of real-time transmission of HD video; Can support the video transmitter of high-definition video signal; Its transmission speed is fast; And can support the output of multi-channel video signal as an output node in the video matrix, effectively solve the real-time HD video transmitter of existing video transmitter the problem of high definition high-speed video transmission.
For solving above-mentioned technical problem, the technical scheme that the utility model adopts is:
A kind of real-time HD video data transmitter, its special character is: comprise ethernet module, data memory module, data output modular converter, video interface, central control module; The video data that switch sends over is transferred to data processing module through ethernet interface module; The video Data Transmission of data processing module after according to the instruction process of central control module transmission is to data memory module, and the conversion through data output modular converter sends to display terminal through video interface at last again.
Above-mentioned data memory module comprises input data buffer storage unit, data buffering memory cell, dateout buffer unit, and data memory module is connected and composed by input data buffer storage unit, data buffering memory cell, dateout buffer unit successively.
Above-mentioned input data buffer storage unit, the circuit chip of data buffering memory cell are the xc6slx45 of the Spartan6 of Xilinx company series.
The chip of above-mentioned data memory module is MT47H64M16HR.
The circuit chip of above-mentioned Ethernet interface control module is 88E1111.
Above-mentioned video source interface is the DVI interface.
The circuit chip of above-mentioned data output modular converter is the TFP410 of TI company.
Above-mentioned video source interface is the HDMI interface.
The circuit chip of above-mentioned data output modular converter is TMDS141.
The utility model has following advantage and effect with respect to traditional video transmitter:
1, the highest support can reach the transmission of the full HD video data of 1080P, to satisfy the demand of various different types of data receiving terminals.
2, support real time video signals transmission and processing.
3, support multi-multipoint matrix planning video output interface.
Description of drawings
Fig. 1 is the theory diagram of the utility model;
Fig. 2 is the ethernet module circuit theory diagrams of the utility model;
Fig. 3 is the data memory module circuit theory diagrams of the utility model;
Fig. 4 is the central control module flow chart of the utility model.
Embodiment
Below in conjunction with accompanying drawing the utility model is further elaborated:
Referring to Fig. 1, the Ethernet interface control module that the utility model connects successively, data processing module, data memory module, data output modular converter and central control module.Wherein the Ethernet interface control module is responsible for the transmission with video data of communicating by letter between native system and other node.Look data memory module and comprise input data buffer storage unit, data buffering memory cell, dateout buffer unit.Input data buffer storage unit, data buffering memory cell can guarantee the correct transmission of the intermodular data of friction speed.The data buffering memory cell is used for storing the video data that sends over from other node.Reach the data volume of setting when video data after, through the decoding of data output modular converter, video data is transformed to the vision signal output that is suitable for corresponding interface.
Referring to Fig. 2, ethernet interface module, it is the communication interface of whole device, is used for the mutual of implement device and PC control messages, also is the data transmission interface of system, is used for the transmission of the video data between device and other video node.The PHY chip that ethernet interface module adopts is 88E1111, uses the full duplex mode of operation, and Adaptive Transmission speed is supported the transmission speed of the highest 1G.
Referring to Fig. 3, data memory module comprises input data buffer unit, data storage cell and data output buffer unit.Data memory module mainly adopts DDR2 to realize that its operating frequency is different with pixel clock frequency, thereby between input modular converter and data memory module, will add the integrality that the input data buffer unit guarantees data.Wherein output/data output buffer unit adopts the inner dual port RAM of FPGA to realize.The data buffering memory cell adopts DDR2 to realize that it is whole key for design.The storage buffering of data is the problems that can run into usually in the signal processing.The buffering of vision signal, because its data volume is big, feasible capacity and speed to memory has all proposed to compare higher requirement.When the ultimate resolution of system works at 1 600 * 1 20060 Hz; Storing the required capacity of frame data is d0=1 600 * 1 200 * 3 B=5.49 MB; The data transfer rate of this moment is d=d0 * 60=329.59 MB/s, and this requires memory to have big capacity and enough fast speed.Adopting the ping-pong operation of DDR2 both can satisfy the jumbo requirement of video data, can satisfy the requirement on the speed again, is a kind of scheme preferably.
The circuit chip of above-mentioned central control module is the xc6slx45 of the Spartan6 of Xilinx company series.
Above-mentioned input data buffer storage unit, the circuit chip of data buffering memory cell are the xc6slx45 of the Spartan6 of Xilinx company series.
The chip of above-mentioned data memory module is MT47H64M16HR.
The circuit chip of above-mentioned Ethernet interface control module is 88E1111.
Above-mentioned data output modular converter, when the video source interface was the DVI interface, its circuit chip was the TFP410 of TI company.It is 4 road serial signals that data output modular converter is used for 24 parallel-by-bit data transaction, and the chip that uses is TFP410, the pixel clock of the highest 165 MHz of this chip support, the i.e. resolution of corresponding 1 600 * 1 20060 Hz.When the video source interface was the HDMI interface, the chip that data output modular converter uses was TMDS141, and this chip is supported the signal transfer rate of 2.5Gbps, supports the resolution of 1080P.The video Data Transmission phase, transmit the video pixel signal on the HDMI data wire, vision signal is through coding, and (i.e. 3 TMDS data message passages, 8 on every road) totally 24 the video data stream that generates 3 tunnel is input in the HDMI reflector.The vision signal of 24 pixels is through the transition minimized differential signaling channel transfer; Convert the signal encoding of 8 in every passage into 10; Transmit a minimized burst in each 10 pixel clock cycle; Vision signal is modulated to the data-signal that minimizes the transmission difference and sends out, and in recipient, receives at last.The data that receive will write the video data memory module.
Referring to Fig. 4, central controller adopts the embedded system Microblaze based on FPGA, mainly is responsible for each block configuration; Control each module operating state, the analysis of PC control message, control data processing method; The video data source number is sent this machine operating state.After system powered on, central controller was at first accomplished DDR, ethernet controller, and the configuration of other peripheral hardwares.Wait for host computer message then.When receiving PC control message, central controller can be analyzed control messages, confirms number of videos source number, Video processing mode and video output number and position.Message after will analyzing again is sent to function corresponding.
Claims (9)
1. a real-time HD video transmitter is characterized in that: comprise ethernet module, data memory module, data output modular converter, video interface, central control module; The video data that switch sends over is transferred to data processing module through ethernet interface module; The video Data Transmission of data processing module after according to the instruction process of central control module transmission is to data memory module, and the conversion through data output modular converter sends to display terminal through video interface at last again.
2. a kind of real-time HD video transmitter according to claim 1; It is characterized in that: described data memory module comprises input data buffer storage unit, data buffering memory cell, dateout buffer unit, and data memory module is connected and composed by input data buffer storage unit, data buffering memory cell, dateout buffer unit successively.
3. a kind of real-time HD video transmitter according to claim 1 and 2 is characterized in that: described above-mentioned input data buffer storage unit, the circuit chip of data buffering memory cell are the xc6slx45 of the Spartan6 of Xilinx company series.
4. a kind of real-time HD video transmitter according to claim 1 and 2, it is characterized in that: the chip of described data memory module is MT47H64M16HR.
5. a kind of real-time HD video transmitter according to claim 1 and 2, it is characterized in that: the circuit chip of described Ethernet interface control module is 88E1111.
6. a kind of real-time HD video transmitter according to claim 1 and 2, it is characterized in that: described video source interface is the DVI interface.
7. a kind of real-time HD video transmitter according to claim 6 is characterized in that: the circuit chip of described data output modular converter is the TFP410 of TI company.
8. a kind of real-time HD video transmitter according to claim 1 and 2, it is characterized in that: described video source interface is the HDMI interface.
9. a kind of real-time HD video transmitter according to claim 8 is characterized in that: the circuit chip of described data output modular converter is TMDS141.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011204910722U CN202488592U (en) | 2011-12-01 | 2011-12-01 | Real-time high definition video transmitter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2011204910722U CN202488592U (en) | 2011-12-01 | 2011-12-01 | Real-time high definition video transmitter |
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| Publication Number | Publication Date |
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| CN202488592U true CN202488592U (en) | 2012-10-10 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2011204910722U Expired - Fee Related CN202488592U (en) | 2011-12-01 | 2011-12-01 | Real-time high definition video transmitter |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102420964A (en) * | 2011-12-01 | 2012-04-18 | 吕宁 | Real-time high definition video transmitter |
| CN108419336A (en) * | 2018-04-09 | 2018-08-17 | 横店集团得邦照明股份有限公司 | A kind of LED lamplight screen control system and its implementation |
-
2011
- 2011-12-01 CN CN2011204910722U patent/CN202488592U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102420964A (en) * | 2011-12-01 | 2012-04-18 | 吕宁 | Real-time high definition video transmitter |
| CN108419336A (en) * | 2018-04-09 | 2018-08-17 | 横店集团得邦照明股份有限公司 | A kind of LED lamplight screen control system and its implementation |
| CN108419336B (en) * | 2018-04-09 | 2019-12-10 | 横店集团得邦照明股份有限公司 | LED light screen control system and implementation method thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20121010 Termination date: 20141201 |
|
| EXPY | Termination of patent right or utility model |