CN201548256U - Accuracy compensating device for sine-cosine encoder - Google Patents
Accuracy compensating device for sine-cosine encoder Download PDFInfo
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- CN201548256U CN201548256U CN2009202477594U CN200920247759U CN201548256U CN 201548256 U CN201548256 U CN 201548256U CN 2009202477594 U CN2009202477594 U CN 2009202477594U CN 200920247759 U CN200920247759 U CN 200920247759U CN 201548256 U CN201548256 U CN 201548256U
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Abstract
The utility model discloses an accuracy compensating device for a sine-cosine encoder, which compensates errors in the process of carrying out subdivision for improving resolving power on the sine-cosine output encoder based on the sine-cosine output encoder subdivision technology so as to improve the accuracy of a feedback value of the encoder. The accuracy compensating device for the sine-cosine encoder is combined by the accuracy compensating method of the sine-cosine output encoder and comprises a differential complementation period generating module, a sine-cosine data sampling and computing module, a full period computing module, a table look-up module, an output mode selecting module, a pulse mode output module, an absolute value output module, an error table storage module and a summing module, thus, the system has simple implementation and good using effect, also has good adaptability and is suitable for wide popularization in all position measurement, angle measurement and movement control fields using the sine-cosine signal output, such as the fields of the numerical control machine, the high-precision measuring instrument and the like.
Description
Technical field
The utility model relates to a kind of scrambler precision compensation system, relates in particular to a kind of sine and cosine encoder accuracy compensation device.
Background technology
The scrambler of emerging in recent years product sine and cosine output is good with its precision, the subsequent treatment simple and fast, and numerical value is directly perceived easy-to-use to be widely used at numerical control field, and the scrambler of sine and cosine output is the equilibrium product of high resolving power high-precision low cost, and a lot of advantages are arranged:
1, output waveform comprises relative phase information, therefore can utilize specific method of interpolation to realize that resolution improves greatly, and not need to improve the physics groove.
2, the scrambler output spectrum of sine and cosine output is purer, and the special composition of frequency spectrum is few, therefore is fit to transmission at a distance more than square wave output and absolute value output coder, and it is little to decay, distance.
3, under identical mathematics resolution, the scrambler that the physics groove is exported than the square wave formula lacks a lot, and higher rotating speed can be provided.
Based on above characteristics, sine and cosine encoder is used in a lot of middle-grade extremely high-grade numerically-controlled machines and mapping system in a large number.(this technology is the content of another patent of reporting simultaneously of applicant, and particular content is introduced below by subdivide technology.) can improve the resolution (ranging up to up to ten thousand times) of sine and cosine output type encoder greatly.But really can't improve the precision of sine and cosine output type encoder, because precision is fixed after the production of sine and cosine output type encoder is finished again, the scrambler factory chamber of commerce is divided into different class according to different precision with the sine and cosine output type encoder, the price that precision is high more is expensive more, and the extra high kind of precision is also embargoed China, and the device or the system that compensate for low precision product are not developed at present as yet, so a kind of novel subdivision system with accuracy compensation function is badly in need of being developed, and solves the problem how low precision encoding device improves precision.
Above-mentioned as shown in Figure 1 subdivide technology particular content is as follows: a kind of sine and cosine subdividing device, at first, difference benefit cycle generation module produces the computation period pulse signal of whole device, starts the execution of carrying out each order with the clock period according to the rules in order to control device; Then, sine and cosine data sampling and computing module are used for the two-way cosine and sine signal of received code device output, and (the two-way cosine and sine signal is A, B phase or C, the D phase signals), the magnitude of voltage of this two-way cosine and sine signal is carried out the A/D conversion of 12 (or 14) earlier, just can obtain the pairing digital quantity of magnitude of voltage of this two-way cosine and sine signal.This digital quantity is that 12 A/D converters obtain, so accessible maximum segmentation multiple is 12 powers of 2, and promptly 4096 times.In like manner the maximum that can reach with 14 A/D converters is segmented 16384 times of multiples; Computation process wherein is, the digital quantity of the magnitude of voltage of the two-way cosine and sine signal that sampling process is obtained carries out the operation of division, promptly with the digital quantity of the digital quantity after the A phase signals A/D conversion after divided by B phase signals A/D conversion (or the digital quantity after changing divided by D phase signals A/D with the digital quantity after the C phase signals A/D conversion).Wherein the figure place of A/D decision is the maximal value of segmentation multiple, can reach 4096 times as the segmentation multiple of 12 A/D maximums.Also can realize littler 2048,1024,512,256,128,64,32 times than it.
Complete cycle, computing module was used for the cosine and sine signal of scrambler input is carried out the counting of complete cycle.Computing module complete cycle of cosine and sine signal, the cosine and sine signal of scrambler output is carried out the counting of complete cycle, and scrambler rotates a circle, and the increment of count value equals the line number of scrambler, to filtering to be carried out to input signal, the hysteresis phenomenon of waveform complete cycle be handled.
Method by a kind of digital filtering (be exactly under the clock control of a high frequency high level (or low level) to square-wave signal repeatedly sample, get most situations.(as to high level sampling 5 times and since disturb once be 0, four time be 1, just think that the result is 1)), high frequency interference is filtered out, in case complete cycle, deviation appearred in count value.Wherein, the hysteresis phenomenon of handling waveform complete cycle comprises that the sine and cosine ripple of wanting input carries out counting complete cycle, to align cosine wave (CW) earlier and carry out the square wave shaping, realize by comparer, (be exactly that the voltage of cosine and sine signal is when being higher than certain value, as 2.5V, just be made into high level, just be made into low level when being lower than 2.5V) also be method in common very.(this is the processing to waveform complete cycle).Otherwise can't count.Carry out counting operation after shaping is finished, the part that needs in the meantime to lag behind compensates.
The sine and cosine ripple carries out shaping and is included on the pure hardware foundation and waveform is become tractable form, but in this course, the waveform generation that new waveform will be imported relatively lags behind.The lagged value of complete cycle need be compensated when computation of Period is carried out in this hysteresis for solving, a synchronizing signal that obtains in sampling by the AD output valve and the computing module, lagged value is compensated calculating, thereby make the complete cycle count value can be because of lag behind producing error.
Data after wherein sine and cosine data sampling and computing module are handled are given table look-up module, by table look-up module according to the division value of the two-way sine and cosine wave voltage value digital quantity of interior storage the tables of data of corresponding segmentation value compare, obtain the segmentation value with this.Owing to obtain their digital quantity after the A of input, B two-phase cosine and sine signal change through A/D.Computation process is that these two digital quantities are carried out divide operations, this division the value that arrives and the sampling A, the value of B phase signals has been determined this division value jointly in the uniqueness of a sine and cosine in the cycle, thus carry out operation specific as follows with the division value that realizes two-way sine and cosine wave voltage value digital quantity the formation of tables of data of corresponding segmentation value:
Being subdivided into example with 32 times describes, get phase differential and be 90 ° of two-way sine and cosine ripple e and f (A and B mutually or C be 90 °) with the phasic difference of D phase signals phase, the phase place of e is ahead of 90 ° of f, and (A is ahead of 90 ° mutually of B mutually, C is ahead of 90 ° of D phases), their amplitude is M, when using 12 A/D converters, A, the amplitude of B phase cosine and sine signal is 4096, therefore getting M is 4096, in the time of should using 14 A/D converters together, the value of M gets 16384, so just can guarantee the e that got, f sine and cosine ripple and A, B phase cosine and sine signal (or C, D phase cosine and sine signal) in full accord on amplitude and phase place.Also just can guarantee e, f sine and cosine ripple and A, the division value that B phase cosine and sine signal (or C, D phase cosine and sine signal) is calculated on same position is identical.With e, the one-period equalization of f be divided into 32 parts, get e, the range value of starting point of each part and terminal point carries out division (with e divided by f in 32 parts in the f sine and cosine ripple, this is corresponding divided by B with A) because first section terminal point is second section a starting point, so obtained the result of 32 divisions, numerical value after the division is formed a table, be stored in the table look-up module.
The process of searching is the process of a comparison, sampling and computing module obtain an A each time, after the result of division of the digital quantity after B phase cosine and sine signal is changed through A/D, this result is compared the operation of size with 32 data of having stored in the table, after relatively, can find A this time, B phase cosine and sine signal can be in 32 sections between a certain section the starting point division value and terminal point division value through the result of division of the digital quantity after the A/D conversion, suppose between the 5th section starting point division value and terminal point division value, the segmentation value that obtains so is exactly 5, after give summation module to carry out trying to achieve of occurrence.
The operation that summation module carries out is, earlier with complete cycle counting module resulting to A, the count value of the complete cycle of B phase cosine and sine signal multiply by current segmentation multiple, the current A that finds with result behind this multiplication and table look-up module then, and the segmentation value of B phase cosine and sine signal is carried out add operation; To select the selection of module after complete cycle, calculated value and segmentation value were sued for peace through output mode, export with the form output of pulse or with the form of absolute value.
Output mode selects module to select the instruction of load module input to carry out the switch operating of output mode according to parameter, and when selecting pulsed output mode, this module passes to pulse output module with the result of the addition that summation module finally obtains; When selecting the absolute value output mode, this module passes to the absolute value output module with the result of the addition that summation module finally obtains equally.
The pulse mode output module is used for output mode is selected exporting with the form of pulse according to the definite umber of pulse of addition results of module input; Implementation procedure is as follows: for example: suppose that the difference benefit cycle is 800ns, the outcome record of output mode being selected the addition that summation that module passes over and module finally obtain in the starting point in this cycle once, write down the result that output mode is selected the addition that summation that module passes over and module finally obtain again in the end point in this cycle then, with after once the data of record to deduct the resulting numerical value of the previous record data that obtain be exactly the pulse number that will export, just can obtain the clock period of a pulse will exporting then divided by the pulse number that will export with 800ns, at last with these pulses continuous output in 800ns.
The result of the addition that the summation module that output mode selects module to pass over finally obtains is exactly the absolute position data that will export.These data are exported by the mode of serial data transmission, the result who is about to the addition that summation module that output mode that the absolute value output module receives selects module to pass over finally obtains changes into binary data, then from the low level of data to high position output successively.
Parameter is selected load module, provides user selected parameter information to be read in the system, and then according to this information, the certain module of controlling the segmentation special chip carries out the switching of corresponding work mode according to user's selection.
1, parameter selects load module with A, whether B phase cosine and sine signal needs the information of transposition to pass to sampling and computing module, sampling and computing module just can carry out A according to this information like this, whether B phase cosine and sine signal the operation of transposition, the benefit of so doing is to receive B and go up mutually when the personnel that connect signal wire will be input to A phase signals in the code device signal line of segmentation device, when the B phase signals is received A and is gone up mutually, can be from new wiring, by segmenting device special chip customer parameter input mode fast with A, B phase cosine and sine signal transposition.
2, parameter selects load module that the information of the needed segmentation multiple of user is passed to table look-up module, table look-up module just can according to this information generate the customer requirements selection the segmentation multiple form.
3, parameter selects load module that the information of the needed segmentation multiple of user is passed to summation module, and the segmentation multiple that the count value of complete cycle multiply by in the summation module just can obtain according to this letter.
4, parameter is selected load module that the needed output mode information of user is passed to output mode and is selected module, and output mode selects module just can carry out the switch operating of output mode according to this information.
Summary of the invention
The utility model is at the proposition of above problem, and develop a kind of based on sine and cosine output type encoder subdivide technology, in the segmentation process that the sine and cosine output type encoder is improved resolution, error is compensated, thus the precision of raising encoder feedback value.The concrete technological means that adopts of the utility model is as follows:
A kind of sine and cosine encoder accuracy compensation device comprises:
Difference benefit cycle generation module,, be used to produce the cycle sequential of starting impulse signal and the operation of whole device;
Sine and cosine data sampling and computing module, the two-way cosine and sine signal that is used for the output of received code device, and the magnitude of voltage of this two-way cosine and sine signal carried out the A/D conversion, obtained the pairing digital quantity of magnitude of voltage of this two-way cosine and sine signal, the operation of division is carried out to the digital quantity of the magnitude of voltage of the two-way cosine and sine signal of sampling acquisition in the back;
Complete cycle, computing module was used for the cosine and sine signal of scrambler input is carried out the counting of complete cycle;
Table look-up module, the data after being used for sine and cosine data sampling and computing module handled, with the division value of the two-way sine and cosine wave voltage value digital quantity that stores in the table look-up module the tables of data of corresponding segmentation value compare, obtain the segmentation value with this;
Output mode is selected module, is used for carrying out according to the instruction of input the switch operating of output mode, and when selecting pulsed output mode, this module passes to pulse output module with the result of the addition that summation module finally obtains; When selecting the absolute value output mode, this module passes to the absolute value output module with the result of the addition that summation module finally obtains equally;
The pulse mode output module is used for output mode is selected exporting with the form of pulse according to the definite umber of pulse of addition results of module input;
The absolute value output module is used for output mode is selected directly exporting with the form of data according to the definite umber of pulse of addition results of module input;
It is characterized in that also comprising: the errors table storage module is used to store the error amount of sine and cosine output type encoder one all arbitrfary points that said method obtains;
Summation module, offset after the error amount that is used for the segmentation value relative error table storage module of current cosine and sine signal that table look-up module is found adds up, the result who multiply by behind the current segmentation multiple with the resulting scrambler input of counting module complete cycle cosine and sine signal number complete cycle carries out add operation;
Described sine and cosine data sampling and computing module and computation of Period module are connected with scrambler and carry out synchronized sampling, described sine and cosine data sampling and computing module with complete cycle computing module be connected and send synchronizing signal to it; Described poor benefit cycle generation module is connected with computing module with the sine and cosine data sampling and sends the starting impulse signal to it, and described sine and cosine data sampling is connected with table look-up module with computing module; Described complete cycle computing module will count the input of record scrambler complete cycle cosine and sine signal number send in the connected summation module; The segmentation value of the current cosine and sine signal that described summation module is found connected table look-up module, after offset after the error amount of the errors table storage module through being connected with summation module adds up multiply by current segmentation multiple value and sues for peace with the input cosine and sine signal complete cycle number that complete cycle, computing module sended over, sending to connected output mode selects on the module, select the selection of module through output mode after, directly export with data mode with the form output of square wave or by the absolute value output module by the pulse mode output module.
Comprise that also individual pen counting module complete cycle is connected with summation module, be used for counting operation but the count value of this module is carried out zero clearing when scrambler zero crossing complete cycle cosine and sine signal.
Each is formed module and all is integrated in the on-site programmable gate array FPGA.
Behind the subdivide technology of having grasped the sine and cosine output type encoder, to hang down the error of precision encoding device generation in the process of segmentation revises, just can obtain the identical effect of high precision sine and cosine output type encoder under the prerequisite cheaply, thereby improve the precision of using this encoder device, also can break the embarrassment that can't obtain high precision sine and cosine output type encoder.
System-on-a-chip is to concentrate design on same chip the armamentarium of electronic system, by certain coordination system each equipment in the system is carried out cooperation management, realizes to reach system-level function.System-on-a-chip generally has characteristic of simple structure, the design process of system-on-a-chip is also simplified and accelerated to silicon intellectual property nuclear multiplex technique simultaneously, both can increase and decrease applied function module easily, and can make upgrading and modification become more easy again according to real needs.In addition, invent described method implement simple, result of use is good, and has good adaptability.Its apparatus structure is simple, not only is convenient to produce, and position measurement, measurement of angle, the motion control field that is suitable in all use cosine and sine signal outputs with low cost, extensively promote as fields such as numerically-controlled machine, high-precision surveying instruments.
Description of drawings
Fig. 1 is the structural representation of the described subdividing device of background technology;
Fig. 2 is for adopting the system architecture synoptic diagram of the precision compensation method of sine and cosine output type encoder own;
Fig. 3 is the structural representation of sine and cosine encoder accuracy compensation device described in the utility model;
Fig. 4 is for adopting the precision compensation method process flow diagram of sine and cosine output type encoder own;
The curve map of Fig. 5 for being linked to be without the error testing point before the over-compensation and these test points among the embodiment;
The error curve diagram of Fig. 6 for after over-compensation, recording once more among the embodiment.
Embodiment
As shown in Figure 3, the employed device of this system comprises: difference benefit cycle generation module, sine and cosine data sampling and computing module, complete cycle computing module, table look-up module, output mode is selected module, pulse mode output module and absolute value output module.Its function and structure just be not described here with the identical of the subdividing device of being introduced in the background technology.Different being increased the errors table storage module newly, is used to store the error amount of sine and cosine output type encoder one all arbitrfary points that said method obtains; Summation module originally becomes, offset after the error amount of the segmentation value relative error table storage module of the current cosine and sine signal that table look-up module is found adds up, the result who multiply by behind the current segmentation multiple with the resulting scrambler input of counting module complete cycle cosine and sine signal number complete cycle carries out add operation.In addition, also be provided with individual pen counting module complete cycle and be connected, be used for counting operation but the count value of this module is carried out zero clearing when scrambler zero crossing complete cycle cosine and sine signal with summation module for being used this device.
The above-mentioned module of respectively forming all is integrated in the on-site programmable gate array FPGA or with form design of each module by FPGA and is integrated in the single-chip.
Introduce the compensation method that this system adopts below:
As Fig. 2, Fig. 3 and the own precision compensation method of sine and cosine output type encoder shown in Figure 4, comprise the steps:
1) the low precision sine and cosine output type encoder with a needs correction carries out coaxial installation (as shown in Figure 2) with a high precision sine and cosine output type encoder;
2) will hang down precision sine and cosine output type encoder and be connected the segmentation device respectively with high precision sine and cosine output type encoder;
3) adjust the segmentation multiple of segmentation device according to the line number of two scramblers, the identical positional value number that two scramblers is rotated a circle obtain;
4) within a week of scrambler rotation, get corresponding test point, on each test point, get the segmentation value of low precision sine and cosine output type encoder and high precision sine and cosine output type encoder respectively;
5) then that two values are poor, obtain the relative error value of low precision sine and cosine output type encoder with respect to the test point of high precision sine and cosine output type encoder;
6) line segment will be approximately between two test points, connect at adjacent 2 and obtain the graph of errors that low precision sine and cosine output type encoder rotates a circle, can obtain the relative error value of low precision sine and cosine output type encoder one all arbitrfary points according to graph of errors; Be implemented as follows:
Above-mentioned individual pen counting module complete cycle with complete cycle counting module compare and finish equally A, counting operation complete cycle of B phase cosine and sine signal, different is carries out clear operation with the count value of individual pen counting module complete cycle when scrambler zero crossing (being that the Z signal pulse occurs), with 2048 line scramblers is example, and the complete number of turns that complete cycle, count value equaled the current operation of scrambler multiply by 2048 adds the individual pen count value of complete cycle.The purpose of doing like this is in order to determine the current angle value that rotates to apart from zero point of scrambler.For example, when individual pen count value complete cycle was 1024 (scrambler with 2048 lines is an example), scrambler had rotated through 180 ° apart from zero point.The horizontal ordinate of each error point is exactly this angle value that current encoder rotated through apart from zero point, and the ordinate of each error point is for working as the resulting error amount of Pretesting.
Be approximately a line segment (1 qualified scrambler should satisfy this condition) between per two error points, just the slope that can calculate this line segment according to these two error point horizontal ordinates and ordinate (as shown in Figure 5, the coordinate of two error points of A section is respectively (120,-25) and (132,-17), slope is 2/3 like this), can calculate the error amount of arbitrfary point between these 2 then according to slope, thereby calculate the error amount in the complete cycle (scrambler rotates a circle).The error point coordinate that obtains is stored in the errors table storage module, just can calculate the angle value (horizontal ordinate of current encoder dwell point) of current encoder according to individual pen count value complete cycle apart from the rotation at zero point, the horizontal ordinate of error point in the horizontal ordinate of current point and the errors table is compared operation, in the time of between the horizontal ordinate of the horizontal ordinate of current point certain two adjacent error point in errors table, just determined current in errors table these two adjacent error put on the formed line segment, the slope of this line segment is calculated by the starting point and the end point coordinate of this line segment, know the horizontal ordinate of current point again, so can calculate the ordinate of current point, just current error amount.
7) error amount that step 6 is obtained makes errors table, and the offset of exporting each position as low precision sine and cosine output type encoder leaves in the errors table storage module of said apparatus, and the error of low precision encoding device is revised.
Be the step that guarantees that its progress is revised the compensating error value, specific as follows:
A) errors table is input in the segmentation device of low precision sine and cosine output type encoder, continues above-mentioned 1 to 4 step, will hang down the absolute position value of each test point of precision sine and cosine output type encoder with the corresponding modified value addition of current absolute position value at errors table;
B) will compare with the positional value that high precision sine and cosine output type encoder records through revised modified value, to obtain error amount;
C) whether the error amount of each test point of obtaining of determining step b satisfies the accuracy requirement of setting, satisfied then with the errors table that obtains in the above-mentioned steps to get as the errors table that finally hangs down precision sine and cosine output type encoder; Do not satisfy and then return above-mentioned steps 1 from newly hanging down obtaining of precision sine and cosine output type encoder errors table.
Revised absolute position value is to add that by the absolute position value current encoder is apart from the description according to the principle of work of segmentation device of the offset of the angle of zero point rotation, what obtain at last in the summation module is the absolute position value (be count complete cycle multiply by current segmentation multiple add current segmentation value) of current encoder operation, can determine the angle of scrambler according to individual pen count value complete cycle apart from the rotation at zero point, basis again, with 2048 line scramblers is example, the complete number of turns that complete cycle, count value equaled the current operation of scrambler multiply by 2048 adds the individual pen count value of complete cycle, individual pen count value complete cycle and complete cycle count value be plus-minus synchronously.So it is the offset that is added the angle that current encoder was rotated apart from zero point by the absolute position value that the scrambler that can calculate according to the count value of individual pen complete cycle, is determined revised absolute position value apart from the angle value of rotation at zero point.
The net result of summation module computing becomes revised absolute position value, carries out repetition error before then and measures step.The segmentation value of high precision sine and cosine output type encoder for example: within a week of scrambler rotation, get several test points, on each test point, get low precision sine and cosine output type encoder and error respectively and be ± 1 ".
Then that two values are poor, obtain low precision sine and cosine output type encoder and be ± 1 with respect to error " the relative error value of high precision sine and cosine output type encoder.
A line segment will be approximately between two test points, connect at adjacent 2 and obtain the graph of errors that low precision sine and cosine output type encoder rotates a circle, can calculate the relative error value of low precision sine and cosine output type encoder one all arbitrfary points according to graph of errors.Again obtain new errors table, analyze new errors table data then, see whether will satisfy accuracy requirement, the physical accuracy of supposing low precision encoding device is ± 35 " (curve that records is as shown in Figure 5); and the precision that requires to be adapted to is ± 5 ", after through the first-order error compensation, the new graph of errors that records satisfies ± 5 " during the precision of (as shown in Figure 6); compensation behaviour finish; after carrying out the first-order error compensation, the new error Qu Jingdu that records is greater than ± 5 ", so just carries out secondary correction work according to new graph of errors, the requirement of precision is satisfied in so cycling up to graph of errors.
The scrambler one all corresponding unique error correction values in optional position in week like this, thus the precision of low precision sine and cosine output type encoder well improved.
The above; it only is the preferable embodiment of the utility model; but protection domain of the present utility model is not limited thereto; anyly be familiar with those skilled in the art in the technical scope that the utility model discloses; be equal to replacement or change according to the technical solution of the utility model and inventive concept thereof, all should be encompassed within the protection domain of the present utility model.
Claims (3)
1. sine and cosine encoder accuracy compensation device comprises:
Difference benefit cycle generation module is used to produce the cycle sequential of starting impulse signal and the operation of whole device;
Sine and cosine data sampling and computing module, the two-way cosine and sine signal that is used for the output of received code device, and the magnitude of voltage of this two-way cosine and sine signal carried out the A/D conversion, obtained the pairing digital quantity of magnitude of voltage of this two-way cosine and sine signal, the operation of division is carried out to the digital quantity of the magnitude of voltage of the two-way cosine and sine signal of sampling acquisition in the back;
Complete cycle, computing module was used for the cosine and sine signal of scrambler input is carried out the counting of complete cycle;
Table look-up module, the data after being used for sine and cosine data sampling and computing module handled, with the division value of the two-way sine and cosine wave voltage value digital quantity that stores in the table look-up module the tables of data of corresponding segmentation value compare, obtain the segmentation value with this;
Output mode is selected module, is used for carrying out according to the instruction of input the switch operating of output mode, and when selecting pulsed output mode, this module passes to pulse output module with the result of the addition that summation module finally obtains; When selecting the absolute value output mode, this module passes to the absolute value output module with the result of the addition that summation module finally obtains equally;
The pulse mode output module is used for output mode is selected exporting with the form of pulse according to the definite umber of pulse of addition results of module input;
The absolute value output module is used for output mode is selected directly exporting with the form of data according to the definite umber of pulse of addition results of module input;
It is characterized in that also comprising: the errors table storage module is used to store the error amount of sine and cosine output type encoder one all arbitrfary points;
Summation module, be used for current cosine and sine signal that table look-up module is found segmentation value relative error table storage module error amount directly or the offset that adds up after calculating of error amount, the result who multiply by behind the current segmentation multiple with the resulting scrambler input of counting module complete cycle cosine and sine signal number complete cycle carries out add operation;
Described sine and cosine data sampling and computing module and computation of Period module are connected with scrambler and carry out synchronized sampling, described sine and cosine data sampling and computing module with complete cycle computing module be connected and send synchronizing signal to it; Described poor benefit cycle generation module is connected with computing module with the sine and cosine data sampling and sends the starting impulse signal to it, and described sine and cosine data sampling is connected with table look-up module with computing module; Described complete cycle computing module will count the input of record scrambler complete cycle cosine and sine signal number send in the connected summation module; The segmentation value of the current cosine and sine signal that described summation module is found connected table look-up module, after offset after the error amount of the errors table storage module through being connected with summation module adds up multiply by current segmentation multiple value and sues for peace with the input cosine and sine signal complete cycle number that complete cycle, computing module sended over, sending to connected output mode selects on the module, select the selection of module through output mode after, directly export with data mode with the form output of square wave or by the absolute value output module by the pulse mode output module.
2. sine and cosine encoder accuracy compensation device according to claim 1, it is characterized in that also comprising that individual pen counting module complete cycle is connected with summation module, be used for counting operation but the count value of this module is carried out zero clearing when scrambler zero crossing complete cycle cosine and sine signal.
3. sine and cosine encoder accuracy compensation device according to claim 1 and 2 is characterized in that the above-mentioned module of respectively forming all is integrated in the on-site programmable gate array FPGA.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101709983B (en) * | 2009-10-30 | 2012-04-25 | 大连光洋科技工程有限公司 | On-line actual error compensation system of sine and cosine encoder |
| CN101726320B (en) * | 2009-10-30 | 2012-11-21 | 大连光洋科技工程有限公司 | Precision compensation system of sine-cosine output type encoder |
| WO2024066472A1 (en) * | 2022-09-28 | 2024-04-04 | 长春汇通光电技术有限公司 | Error compensation method for sine-cosine signal, and storage medium |
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2009
- 2009-10-30 CN CN2009202477594U patent/CN201548256U/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101709983B (en) * | 2009-10-30 | 2012-04-25 | 大连光洋科技工程有限公司 | On-line actual error compensation system of sine and cosine encoder |
| CN101726320B (en) * | 2009-10-30 | 2012-11-21 | 大连光洋科技工程有限公司 | Precision compensation system of sine-cosine output type encoder |
| WO2024066472A1 (en) * | 2022-09-28 | 2024-04-04 | 长春汇通光电技术有限公司 | Error compensation method for sine-cosine signal, and storage medium |
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