CN201345715Y - Device for multiplexing of photoelectric interfaces - Google Patents

Device for multiplexing of photoelectric interfaces Download PDF

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Publication number
CN201345715Y
CN201345715Y CNU2009201292482U CN200920129248U CN201345715Y CN 201345715 Y CN201345715 Y CN 201345715Y CN U2009201292482 U CNU2009201292482 U CN U2009201292482U CN 200920129248 U CN200920129248 U CN 200920129248U CN 201345715 Y CN201345715 Y CN 201345715Y
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CN
China
Prior art keywords
interface
optical
phy chip
optical interface
photoelectric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNU2009201292482U
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Chinese (zh)
Inventor
夏洪波
钱民
张永胜
张晋博
鄢思友
郭书勇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
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Priority to CNU2009201292482U priority Critical patent/CN201345715Y/en
Application granted granted Critical
Publication of CN201345715Y publication Critical patent/CN201345715Y/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The embodiment of the utility mode discloses a device for the multiplexing of photoelectric interfaces. The device comprises an interface board and a PHY chip, wherein, an optical interface and an electric interface are formed on the interface board; the pins of the PHY chip are connected with the optical interface and the electric interface of the interface board respectively; and the PHY chip can determine whether the chip is connected with the optical interface or the electric interface according to a given value of a specific pin. Through the application of the device, the requirements of various product forms such as pure optical interface, pure electric interface, optical-electric interface and the like are met, the types of PCBs (printed circuit boards) are reduced, and the complexity of production and maintenance is reduced.

Description

A kind of device of photoelectric interface duplex
Technical field
The utility model relates to networking technology area, particularly relates to a kind of device of photoelectric interface duplex.
Background technology
There are multiple demands such as pure optical interface, pure electrical interface, optic electric interface mixing in the optic electric interface of current Ethernet.And the prior art solution to be a veneer only support optical interface, a veneer only to support electrical interface, perhaps on veneer, preestablish the quantity of optical interface and electrical interface, adopt the mode of plug-in card to support.Concrete as Fig. 1, Fig. 2 and shown in Figure 3.For the mode that these two kinds of Fig. 1 and Fig. 2 only support a kind of interface, its shortcoming is to lack flexibility, can't support the photoelectricity mixed insertion.Mode for this veneer plug-in card of Fig. 3, its shortcoming is the quantity that will configure optical interface and electrical interface in advance, if the quantity of optical interface or electrical interface changes, then need veneer is carried out rewiring, cause PCB (Print circuitboard, printed circuit board) kind is many, the product structure complexity, and cost increases.
The utility model content
The utility model embodiment provides a kind of device of photoelectric interface duplex, realize pure optical interface, pure electrical interface, multiple product form demands such as optic electric interface mixing by a veneer and PHY (physical layer physical layer) chip, reduce the PCB kind, reduce and produce and safeguard complexity.
The utility model embodiment proposes a kind of device of photoelectric interface duplex, comprising:
Interface board comprises optical interface and electrical interface;
PHY chip, its pin link to each other with electrical interface with the optical interface of described interface board respectively, and judge that according to the numerical value of output pin linking to each other with described optical interface this moment still is to link to each other with described electrical interface.
The technical scheme of the utility model embodiment realizes pure optical interface by a veneer and PHY chip, pure electrical interface, and multiple product form demands such as optic electric interface mixing reduce the PCB kind, reduce and produce and safeguard complexity.
Description of drawings
Fig. 1 is for only supporting the schematic diagram of electrical interface veneer in the prior art;
Fig. 2 is for only supporting the schematic diagram of optical interface veneer in the prior art;
Fig. 3 is the schematic diagram of optic electric interface mixing plug-in card veneer in the prior art;
Fig. 4 is the utility model photoelectric interface duplex device schematic diagram;
Fig. 5 is the utility model interface board schematic diagram;
Fig. 6 is the utility model interface board positive and negative schematic diagram;
Fig. 7 is the utility model PHY chip schematic diagram.
Embodiment
The utility model embodiment provides a kind of device of photoelectric interface duplex, realizes multiple product form demands such as pure optical interface, pure electrical interface, optic electric interface mixing by a veneer and PHY chip, reduces the PCB kind, reduces and produces and safeguard complexity.
The utility model embodiment specifically comprises as shown in Figure 4, comprising:
Interface board comprises optical interface and electrical interface;
PHY chip, its pin link to each other with electrical interface with the optical interface of interface board respectively, and judge that according to the numerical value of A0 pin linking to each other with optical interface this moment still is to link to each other with electrical interface.
In order more clearly to describe the structure of interface board,, describe in further detail below in conjunction with Fig. 5 and Fig. 6:
As shown in Figure 5, optical interface and electrical interface are arranged on the interface board, and make electrical interface and optical interface be placed on the same position and the pin mutually noninterfere of interface board, particularly, its topology layout is furnished with the optical interface position that the fixing hole size is certain and spacing is identical in the one side of interface board as shown in Figure 6, shown among Fig. 61, concrete, the optical interface that connects on this optical interface position can be SFP (Small Form-factor Pluggables, a miniature pluggable module) light opening connector; Corresponding interface board another side is furnished with the electrical interface position, and shown among Fig. 62, the optical interface position of its fixing hole size and spacing and another side is just the same, concrete, and the electrical interface that connects on this electrical interface position can be a RJ45 electricity opening connector.Such layout can make electric opening connector and light opening connector pin simultaneously on PCB and mutually noninterfere.
As shown in Figure 7,, can define some pins of PHY chip and link to each other with optical interface in the interface board according to the difference of actual conditions, as Ai to the pin between the Am; Other pins link to each other with electrical interface in the interface board, as Am to the pin between the An.When the output A0 pin in the PHY chip was 0, what represent PHY chip connection this moment was optical interface; When the output A0 pin in the PHY chip was 1, what represent PHY chip connection this moment was electrical interface, and vice versa.Certainly, according to the difference of configuration around the PHY chip, can determine that the PHY chip was connected with optical interface or was connected with electrical interface this moment with other output pin equally.
The technical scheme of the utility model embodiment has the following advantages, and realizes pure optical interface by a veneer and PHY chip, pure electrical interface, and multiple product form demands such as optic electric interface mixing reduce the PCB kind, reduce and produce and safeguard complexity.
The above only is a preferred implementation of the present utility model; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the utility model principle; can also make some improvements and modifications, these improvements and modifications also should be looked protection scope of the present invention.

Claims (4)

1, a kind of device of photoelectric interface duplex is characterized in that, comprising:
Interface board comprises optical interface and electrical interface;
PHY chip, its pin link to each other with electrical interface with the optical interface of described interface board respectively, and judge that according to the numerical value of output pin linking to each other with described optical interface this moment still is to link to each other with described electrical interface.
2, a kind of device of photoelectric interface duplex according to claim 1 is characterized in that described interface board simultaneously is furnished with described optical interface position, and another side is furnished with described electrical interface position.
3, as the device of a kind of photoelectric interface duplex as described in the claim 2, it is characterized in that the fixing hole size of described optical interface position and described electrical interface position is all identical with spacing.
4, a kind of device of photoelectric interface duplex according to claim 1 is characterized in that, when the output A0 pin in the described PHY chip was 0, what represent that this moment, the PHY chip connected was optical interface; When the output A0 pin in the described PHY chip was 1, what represent PHY chip connection this moment was electrical interface.
CNU2009201292482U 2009-02-09 2009-02-09 Device for multiplexing of photoelectric interfaces Expired - Fee Related CN201345715Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNU2009201292482U CN201345715Y (en) 2009-02-09 2009-02-09 Device for multiplexing of photoelectric interfaces

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNU2009201292482U CN201345715Y (en) 2009-02-09 2009-02-09 Device for multiplexing of photoelectric interfaces

Publications (1)

Publication Number Publication Date
CN201345715Y true CN201345715Y (en) 2009-11-11

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102819625A (en) * 2011-06-10 2012-12-12 上海华虹集成电路有限责任公司 Design method for digital analogy multiplex input/output (IO) pin structure
CN103297117A (en) * 2012-02-27 2013-09-11 中兴通讯股份有限公司 Reuse method of photoelectricity port based on configuration and single board
CN102819625B (en) * 2011-06-10 2016-12-14 上海华虹集成电路有限责任公司 A kind of method for designing of digital-to-analogue multiplexing I/O pin structure
CN106507580A (en) * 2016-12-12 2017-03-15 郑州云海信息技术有限公司 A kind of PCB and signal transmission system
CN113242480A (en) * 2021-06-24 2021-08-10 烽火通信科技股份有限公司 Photoelectric multiplexing device and method

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102819625A (en) * 2011-06-10 2012-12-12 上海华虹集成电路有限责任公司 Design method for digital analogy multiplex input/output (IO) pin structure
CN102819625B (en) * 2011-06-10 2016-12-14 上海华虹集成电路有限责任公司 A kind of method for designing of digital-to-analogue multiplexing I/O pin structure
CN103297117A (en) * 2012-02-27 2013-09-11 中兴通讯股份有限公司 Reuse method of photoelectricity port based on configuration and single board
CN103297117B (en) * 2012-02-27 2017-05-24 中兴通讯股份有限公司 Reuse method of photoelectricity port based on configuration and single board
CN106507580A (en) * 2016-12-12 2017-03-15 郑州云海信息技术有限公司 A kind of PCB and signal transmission system
CN106507580B (en) * 2016-12-12 2018-11-27 郑州云海信息技术有限公司 A kind of PCB and signal transmission system
CN113242480A (en) * 2021-06-24 2021-08-10 烽火通信科技股份有限公司 Photoelectric multiplexing device and method

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20091111

Termination date: 20180209