CN201204027Y - Circuit capable of reducing gate drive circuit quantity and liquid crystal display apparatus - Google Patents
Circuit capable of reducing gate drive circuit quantity and liquid crystal display apparatus Download PDFInfo
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- CN201204027Y CN201204027Y CNU2008200558164U CN200820055816U CN201204027Y CN 201204027 Y CN201204027 Y CN 201204027Y CN U2008200558164 U CNU2008200558164 U CN U2008200558164U CN 200820055816 U CN200820055816 U CN 200820055816U CN 201204027 Y CN201204027 Y CN 201204027Y
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- film transistor
- gate driving
- transistor switch
- control signal
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Abstract
The utility model discloses a circuit for reducing amount of gate IC which is capable of achieving the goal of reducing amount of gate IC into one half, and a LCD device comprising the circuit. The device comprises a plurality of source data line, a plurality of gate data line, a first control signal line and a second control signal line, a first thin-film transistor and a second thin-film transistor, wherein the gate of the first thin-film transistor is connected to the first control signal line, the source thereof is connected to a gate drive line, and the drain is connected to the source of a second thin-film transistor switch through previous adjacent gate drive line of gate drive line. The gate of the second thin-film transistor switch is connected to a second control line, and drain is connected to a signal line providing low-level voltage. Gate output of one channel is divided into two channels to be applied on the gate line by controlling switch of thin-film transistor on the array substrate. The utility model can be applied in the field of LCD device.
Description
Technical field
The utility model relates to a kind of circuit structure and comprises the liquid crystal indicator of sort circuit structure, relates in particular to a kind of liquid crystal indicator that the usage quantity of gate driver circuit (Gate IC) can be reduced the circuit of half and comprise sort circuit.
Background technology
LCD is one of the most widely used type in the current panel display apparatus.LCD generally includes two substrate-array base paltes and colored optical filtering substrates and the liquid crystal layer between two panels, and described two panels have pixel electrode and the public electrode that is used to produce electric field.LCD is by putting on voltage electric field generating electrode to produce electric field and display image in liquid crystal layer.This electric field determined the orientation of liquid crystal molecule in the liquid crystal layer and controlled polarization of incident light, thereby control sees through the brightness of the light behind the Polarizer on the colored optical filtering substrates, realizes different demonstration contrasts.
Fig. 1 shows the structure of existing liquid crystal indicator.Liquid crystal indicator comprises liquid crystal display board component 10, is connected in a pair of gate drivers 20 and the data driver 30 of liquid crystal display board component 10, is integrated in the gray scale voltage generator of data driver 30, and the timing controller that is used to control above-mentioned parts.
As what seen in the equivalent electrical circuit of Fig. 1, liquid crystal display board component 10 comprises a plurality of pixel Pixel, and described pixel is connected in many display signal lines and with arranged.Display panels also comprises opposed facing lower panel array base palte and top panel colored filter substrate in addition, and is clipped in two liquid crystal layers between the substrate.
Scan signal line is to be used to transmit many gate lines G L1 of signal to GLn, many data line DL1 that also are useful on transmission of data signals are to DLm, gate lines G L1 extends parallel to each other on the substrate first direction to GLn, and data line DL1 extends parallel to each other on DLm is substantially perpendicular to second direction on the first direction.
In the equivalent circuit diagram synoptic diagram that display signal line and pixel are shown of Fig. 1, except gate line and data line, shows signal also comprises the storage electrode line VCom that is arranged essentially parallel to gate line.The VCom storage electrode line generally is parallel to gate line line (being exactly GL1-GLn), is the metal wire that plays the reference voltage effect, has only a kind of voltage above it, is equivalent to the triangle below the electric capacity that the TFT switch connects in Fig. 1.Because the function class of VCom is similar to the ground connection in the circuit, so adopted in the similar circuit symbol of ground connection to represent.
Each pixel Pixel comprises pixel electrode (pixel electrode is equivalent to the top electrode of the liquid crystal capacitance Clc that links to each other with the TFT switch), and the switching element T FT that is connected in pixel electrode, many gate lines, and the first grid polar curve of described gate line is connected in pixel electrode; And many data lines, described data line intersects with gate line and transmits data voltage, and one of described data line is connected in switching device, and the memory capacitance Cst of storage electrode line VCom, also have liquid crystal capacitance Clc, wherein memory capacitance and storage electrode line can be omitted as required.
Switching device in the pixel can be constructed with thin film transistor (TFT), each switching device is three port devices, and it has the control port that is connected in gate line, is connected in the input port of data line and is connected in liquid crystal capacitance Clc and the output port of memory capacitance Cst.
In order to realize colored demonstration, each pixel shows the primary colors of appointment uniquely, and by the different color of being combined to form of different primary colors, primary colors generally includes red green and blue.
Thereby gate drivers 20 is connected in gate line and will be applied on the gate line with the signal that is combined to form of grid cut-in voltage and gate off voltage.
Grayscale voltage generator produces the grayscale voltage collection corresponding to the pixel transmission rate, and grayscale voltage is applied in pixel electrode.
The display operation of LCD is described below.
40 picture signal R, G that receive from the outside of timing controller and B and the input control signal that is used to control demonstration, these picture signals have been represented the monochrome information of each pixel, just specific GTG, input control signal generally comprises vertical synchronization and horizontal-drive signal, and data enable signal DE.Timing controller 40 receives these signals and produces grid control signal and data controlling signal later on, and can pass to gate drivers 20 and data driver 30 respectively.
Grid control signal comprises and is used to represent the signal that a frame scan begins and is used for the signal that control gate line is opened the time.Data controlling signal comprises the horizontal start signal of the data transmission that is used to represent delegation's sub-pixel, is used for providing to pixel the load signal of charging voltage, and data clock signal and polarity inversion signal etc.
Response is from the data controlling signal of timing controller 40, data driver 30 receives the view data that is used for one group of word pixel, and choose one of two gray scale voltage collection from the gray scale voltage generator, and therefrom choose the pairing gray scale voltage of view data, resulting voltage is applied on the relevant data line.
Occurred in order to reduce cost in recent years gate driver circuit is all accomplished way on the array base palte, but because gate driver circuit more complicated.If whole gate driver circuits are accomplished on the array base palte, can cause problems such as the area of shared glass substrate is excessive.
Summary of the invention
The purpose of this utility model is to address the above problem, and a kind of circuit that reduces gate driver circuit quantity is provided, and can reach the purpose that reduces half gate driver circuit (Gate IC).
Another purpose of the present utility model is to provide a kind of liquid crystal indicator, under the situation of gate driver circuit being accomplished on the array base palte, can reduce the gate driver circuit of half.
The technical solution of the utility model is: the utility model has disclosed a kind of circuit that reduces gate driver circuit quantity, comprising:
Many source electrode data lines;
Many gate driving lines;
First control signal wire and second control signal wire;
The first film transistor switch and second thin film transistor switch, wherein the grid of this first film transistor switch connects this first control signal wire, source electrode connects this gate driving line, drain electrode connects the source electrode of this second thin film transistor switch by a last adjacent gate driving line of this gate driving line, the grid of this second thin film transistor switch connects this second control line, and drain electrode connection one provides the signal wire of low level voltage;
Wherein in this gate driving line applies preceding half period of grid opening signal, this first control signal wire is applied in the grid opening signal, this second control signal wire is applied in the grid shutdown signal, this moment, this first film transistor switch was opened, this second thin film transistor switch is closed, make that gate driving line is applied in the grid opening signal on this, its pixel electrode of being expert at applies data voltage by this source electrode data line, make this gate driving line also be applied in the grid opening signal simultaneously, its pixel electrode of being expert at is applied in the data voltage identical with lastrow; In this gate driving line applies time second half section of grid opening signal, this second control signal wire is applied in the grid opening signal, this first control signal wire is applied in the grid shutdown signal, this moment, this first film transistor switch cut out, this second thin film transistor switch is opened, make this gate driving line be applied in the grid opening signal, its pixel electrode of being expert at is applied in data voltage, and gate driving line is applied in the grid shutdown signal on this.
The utility model has also disclosed a kind of liquid crystal indicator, comprising:
Display panels comprises:
Many source electrode data lines;
Many gate driving lines;
First control signal wire and second control signal wire;
The first film transistor switch and second thin film transistor switch, wherein the grid of this first film transistor switch connects this first control signal wire, source electrode connects this gate driving line, drain electrode connects the source electrode of this second thin film transistor switch by a last adjacent gate driving line of this gate driving line, the grid of this second thin film transistor switch connects this second control line, and drain electrode connection one provides the signal wire of low level voltage;
Time schedule controller produces timing control signal;
Source electrode driver, the source electrode data line to this display panels under the control of this timing control signal drives;
Gate drivers, the gate driving line to this display panels under the control of this timing control signal drives gating;
Wherein in this gate driving line applies preceding half period of grid opening signal, this first control signal wire is applied in the grid opening signal, this second control signal wire is applied in the grid shutdown signal, this moment, this first film transistor switch was opened, this second thin film transistor switch is closed, make that gate driving line is applied in the grid opening signal on this, its pixel electrode of being expert at applies data voltage by this source electrode data line, make this gate driving line also be applied in the grid opening signal simultaneously, its pixel electrode of being expert at is applied in the data voltage identical with lastrow; In this gate driving line applies time second half section of grid opening signal, this second control signal wire is applied in the grid opening signal, this first control signal wire is applied in the grid shutdown signal, this moment, this first film transistor switch cut out, this second thin film transistor switch is opened, make this gate driving line be applied in the grid opening signal, its pixel electrode of being expert at is applied in data voltage, and gate driving line is applied in the grid shutdown signal on this.
The utility model contrast prior art has following beneficial effect: the utility model is made in the switch of the thin film transistor (TFT) on the array base palte by control, the grid output of a passage is divided into two passages is applied on the gate line respectively.The contrast prior art, the utility model can reduce the gate driver circuit (GateIC) of half.
Description of drawings
Fig. 1 is the structural representation of traditional liquid crystal indicator.
Fig. 2 is the structural drawing of the preferred embodiment of the circuit that reduces gate driver circuit quantity of the present utility model.
Fig. 3 is the waveform synoptic diagram of gate driving line signal of the present utility model and control signal wire signal.
Fig. 4 is the equivalent circuit diagram of a certain state of Fig. 2 embodiment.
Fig. 5 is the equivalent circuit diagram of another state of Fig. 2 embodiment.
Embodiment
The utility model will be further described below in conjunction with drawings and Examples.
Fig. 2 shows the structure of the preferred embodiment of the circuit that reduces gate driver circuit quantity of the present utility model.See also Fig. 2, circuit comprises many source electrode data line SourceLine, many gate driving lines for example are G_2n-1～G_2n+2 etc., the first control signal wire Control_Signal_1, the second control signal wire Control_Signal_2, the first film transistor switch for example are TFT-nA and TFT-n+1A, and second thin film transistor switch for example is TFT-nB and TFT-n+1B.
The grid of the first film transistor switch TFT-nA connects the first control signal wire Control_Signal_1, and source electrode connects gate driving line G_2n, and drain electrode connects the source electrode of the second thin film transistor (TFT) TFT-nB by gate driving line G_2n-1.The grid of the second thin film transistor switch TFT-nB connects the second control signal wire Control_Signal_2, and drain electrode connects the signal wire VGL that low level voltage is provided.
Under the effect of control signal shown in Figure 3, in gate driving line Gn is applied in preceding half period of grid opening signal, the first control signal wire Control_singal_1 also is applied in the grid opening signal, the second control signal wire Control_singal_2 is applied in the grid shutdown signal, TFT-nA opens with the first film transistor switch, the second thin film transistor switch TFT-nB is closed, this moment, gate driving line G_2n-1 was applied in the grid opening signal, the pixel electrode of this row is applied in correct data voltage, the capable open mode that also is in of while gate driving line G_2n, the pixel electrode of this row can be applied in the capable data voltage of gate driving line G_2n-1.Fig. 4 is the equivalent electrical circuit under this state.
In gate driving line Gn is applied in time second half section of grid opening signal, the second control signal wire Control_singal_2 is applied in the grid opening signal, the first control signal wire Control_singal_1 is applied in the grid shutdown signal, this moment, the first film transistor switch TFT-nA was closed, and the second thin film transistor switch TFT-nB is opened, gate driving line G_2n-1 is applied in the grid shutdown signal, have only gate driving line G_2n to be applied in the grid opening signal this moment, and this row pixel electrode is applied in the capable correct data voltage of G_2n.The gate driving of such passage has been divided into two passages, thereby has reduced the usage quantity of Gate IC, has reduced cost.Fig. 5 is the equivalent electrical circuit under this state.
With above-mentioned circuit design in liquid crystal indicator to form new liquid crystal indicator.Liquid crystal indicator comprises traditional source electrode data line, gate driving line, time schedule controller, source electrode driver and gate drivers that is positioned on the display panels.Wherein time schedule controller produces timing control signal, source electrode driver source electrode data line to display panels under the control of this timing control signal drives, and gate drivers gate driving line to display panels under the control of this timing control signal drives gating.
Liquid crystal indicator comprises that also the first control signal wire Control_Signal_1, the second control signal wire Control_Signal_2, the first film transistor switch for example are TFT-nA and TFT-n+1A, and second thin film transistor switch for example is TFT-nB and TFT-n+1B.
The grid of the first film transistor switch TFT-nA connects the first control signal wire Control_Signal_1, and source electrode connects gate driving line G_2n, and drain electrode connects the source electrode of the second thin film transistor (TFT) TFT-nB by gate driving line G_2n-1.The grid of the second thin film transistor switch TFT-nB connects the second control signal wire Control_Signal_2, and drain electrode connects the signal wire VGL that low level voltage is provided.
Under the effect of control signal shown in Figure 3, in gate driving line Gn is applied in preceding half period of grid opening signal, the first control signal wire Control_singal_1 also is applied in the grid opening signal, the second control signal wire Control_singal_2 is applied in the grid shutdown signal, TFT-nA opens with the first film transistor switch, the second thin film transistor switch TFT-nB is closed, this moment, gate driving line G_2n-1 was applied in the grid opening signal, the pixel electrode of this row is applied in correct data voltage, the capable open mode that also is in of while gate driving line G_2n, the pixel electrode of this row can be applied in the capable data voltage of gate driving line G_2n-1.Fig. 4 is the equivalent electrical circuit under this state.
In gate driving line Gn is applied in time second half section of grid opening signal, the second control signal wire Control_singal_2 is applied in the grid opening signal, the first control signal wire Control_singal_1 is applied in the grid shutdown signal, this moment, the first film transistor switch TFT-nA was closed, and the second thin film transistor switch TFT-nB is opened, gate driving line G_2n-1 is applied in the grid shutdown signal, have only gate driving line G_2n to be applied in the grid opening signal this moment, and this row pixel electrode is applied in the capable correct data voltage of G_2n.The gate driving of such passage has been divided into two passages, thereby has reduced the usage quantity of Gate IC, has reduced cost.Fig. 5 is the equivalent electrical circuit under this state.
The foregoing description provides to those of ordinary skills and realizes or use of the present utility model; those of ordinary skills can be under the situation that does not break away from invention thought of the present utility model; the foregoing description is made various modifications or variation; thereby protection domain of the present utility model do not limit by the foregoing description, and should be the maximum magnitude that meets the inventive features that claims mention.
Claims (2)
1, a kind of circuit that reduces gate driver circuit quantity is characterized in that, comprising:
Many source electrode data lines;
Many gate driving lines;
First control signal wire and second control signal wire;
The first film transistor switch and second thin film transistor switch, wherein the grid of this first film transistor switch connects this first control signal wire, source electrode connects this gate driving line, drain electrode connects the source electrode of this second thin film transistor switch by a last adjacent gate driving line of this gate driving line, the grid of this second thin film transistor switch connects this second control line, and drain electrode connection one provides the signal wire of low level voltage;
Wherein in this gate driving line applies preceding half period of grid opening signal, this first control signal wire is applied in the grid opening signal, this second control signal wire is applied in the grid shutdown signal, this moment, this first film transistor switch was opened, this second thin film transistor switch is closed, make that gate driving line is applied in the grid opening signal on this, its pixel electrode of being expert at applies data voltage by this source electrode data line, make this gate driving line also be applied in the grid opening signal simultaneously, its pixel electrode of being expert at is applied in the data voltage identical with lastrow; In this gate driving line applies time second half section of grid opening signal, this second control signal wire is applied in the grid opening signal, this first control signal wire is applied in the grid shutdown signal, this moment, this first film transistor switch cut out, this second thin film transistor switch is opened, make this gate driving line be applied in the grid opening signal, its pixel electrode of being expert at is applied in data voltage, and gate driving line is applied in the grid shutdown signal on this.
2, a kind of liquid crystal indicator is characterized in that, comprising:
Display panels comprises:
Many source electrode data lines;
Many gate driving lines;
First control signal wire and second control signal wire;
The first film transistor switch and second thin film transistor switch, wherein the grid of this first film transistor switch connects this first control signal wire, source electrode connects this gate driving line, drain electrode connects the source electrode of this second thin film transistor switch by a last adjacent gate driving line of this gate driving line, the grid of this second thin film transistor switch connects this second control line, and drain electrode connection one provides the signal wire of low level voltage;
Time schedule controller produces timing control signal;
Source electrode driver, the source electrode data line to this display panels under the control of this timing control signal drives;
Gate drivers, the gate driving line to this display panels under the control of this timing control signal drives gating;
Wherein in this gate driving line applies preceding half period of grid opening signal, this first control signal wire is applied in the grid opening signal, this second control signal wire is applied in the grid shutdown signal, this moment, this first film transistor switch was opened, this second thin film transistor switch is closed, make that gate driving line is applied in the grid opening signal on this, its pixel electrode of being expert at applies data voltage by this source electrode data line, make this gate driving line also be applied in the grid opening signal simultaneously, its pixel electrode of being expert at is applied in the data voltage identical with lastrow; In this gate driving line applies time second half section of grid opening signal, this second control signal wire is applied in the grid opening signal, this first control signal wire is applied in the grid shutdown signal, this moment, this first film transistor switch cut out, this second thin film transistor switch is opened, make this gate driving line be applied in the grid opening signal, its pixel electrode of being expert at is applied in data voltage, and gate driving line is applied in the grid shutdown signal on this.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008200558164U CN201204027Y (en) | 2008-02-29 | 2008-02-29 | Circuit capable of reducing gate drive circuit quantity and liquid crystal display apparatus |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008200558164U CN201204027Y (en) | 2008-02-29 | 2008-02-29 | Circuit capable of reducing gate drive circuit quantity and liquid crystal display apparatus |
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| Publication Number | Publication Date |
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| CN201204027Y true CN201204027Y (en) | 2009-03-04 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNU2008200558164U Expired - Lifetime CN201204027Y (en) | 2008-02-29 | 2008-02-29 | Circuit capable of reducing gate drive circuit quantity and liquid crystal display apparatus |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101236737B (en) * | 2008-02-29 | 2010-06-02 | 上海广电光电子有限公司 | Circuit for reducing gate driver circuit quantity and LCD device |
| CN102543028A (en) * | 2012-02-16 | 2012-07-04 | 深圳市华星光电技术有限公司 | Gate driving circuit, gate driving method and liquid crystal display system |
| CN105206242A (en) * | 2015-10-28 | 2015-12-30 | 京东方科技集团股份有限公司 | Drive circuit, driving method thereof, and display panel |
-
2008
- 2008-02-29 CN CNU2008200558164U patent/CN201204027Y/en not_active Expired - Lifetime
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101236737B (en) * | 2008-02-29 | 2010-06-02 | 上海广电光电子有限公司 | Circuit for reducing gate driver circuit quantity and LCD device |
| CN102543028A (en) * | 2012-02-16 | 2012-07-04 | 深圳市华星光电技术有限公司 | Gate driving circuit, gate driving method and liquid crystal display system |
| CN105206242A (en) * | 2015-10-28 | 2015-12-30 | 京东方科技集团股份有限公司 | Drive circuit, driving method thereof, and display panel |
| CN105206242B (en) * | 2015-10-28 | 2017-11-07 | 京东方科技集团股份有限公司 | Drive circuit and its driving method, display panel |
| US10453377B2 (en) | 2015-10-28 | 2019-10-22 | Boe Technology Group Co., Ltd. | Display panel and driving method thereof, and display apparatus |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20090304 Effective date of abandoning: 20080229 |