CN1855855A - Device and method for emulated route analysis test - Google Patents
Device and method for emulated route analysis test Download PDFInfo
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- CN1855855A CN1855855A CNA2005100665805A CN200510066580A CN1855855A CN 1855855 A CN1855855 A CN 1855855A CN A2005100665805 A CNA2005100665805 A CN A2005100665805A CN 200510066580 A CN200510066580 A CN 200510066580A CN 1855855 A CN1855855 A CN 1855855A
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Abstract
A analysis testing equipment and method for the artificial route, that is: processes the abstract modeling for the route transmit chip, and summarize a current route analysis testing process, in order to the route analysis testing implement that aims at the route transmit chip can be applied the artificial analysis testing process of any transmit chip route repeatedly. The invention can improve the artificial validate efficiency and quality of the route transmit chip, and decrease the workload that aim at the route analysis testing of the transmit chip and improve the developing speed of the route transmit chip.
Description
Technical field
The present invention relates to communication equipment emulation testing technical field, relate in particular to a kind of devices and methods therefor of emulated route analysis test.
Background technology
In the network service process, be that the network switch links together various network communication equipment.As shown in Figure 1, the networks of different type communication equipment can be linked together, realize corresponding network communicating function by the network switch.
The network switch has a plurality of ports, the type of port can be different, and what have can be the twisted-pair Ethernet mouth, and what have can be the fiber port that connects SDH (Synchronous Digital Hierarchy) equipment, what have can be the fiber port that connects ATM (asynchronous transfer mode) equipment, or the like.According to the difference of the function of the network switch, port number and kind that it provides also have nothing in common with each other.A critical function of the network switch be exactly with the packet of coming from certain equipment correct be forwarded to destination device.
Simultaneously,, make it can carry more business, can on the same line cable, mark off a plurality of transmission channels in order to make full use of the connection cable between network communication equipment.The method of dividing can be according to the different different business datums of time transmission, also can be according to the different different business of transmission frequency transmission, on a physics cable, divide the different transmission channels of coming out like this, here be called Virtual Channel, can be with many Virtual Channel groupings, the sign of such Virtual Channel is unique definite by group number and the numbering in group.
The core component of the network switch is the routing forwarding chip, is a large scale digital logic chip, and the correct forwarding of message is all finished in the routing forwarding chip.From the angle of routing forwarding chip, the external connection apparatus of the network switch all is connected with it, and the routing forwarding chip also has many ports, is called physical port, and its physical port line is one group of lead on the printed circuit board (PCB).The routing forwarding chip could be connected with the external connection apparatus of the network switch by interface chip, and interface chip is the reflection of the external connection apparatus of the network switch, and as shown in Figure 2, interface chip can equivalently representedly be a corresponding interface equipment.
Some physical port of routing forwarding chip can connect a plurality of external equipments simultaneously, and the type of these equipment is identical certainly, and such as all being atm device, each equipment is shared the physical port of same routing forwarding chip.This is because one group of lead on the printed panel can be with very high speed transmission data, more than the speed height of the transmission data of cable, so low-speed peripheral can timesharing be shared a physical port of routing forwarding chip.
One of mission critical of routing forwarding chip is that the packet with certain interface equipment (as the service message on certain Virtual Channel) is forwarded to miscellaneous equipment (on certain Virtual Channel), promptly realizes route forwarding function.For guaranteeing the reliable in function of routing forwarding chip, when the routing forwarding chip design, needs adopt the mode of simulating, verifying to verify the reliability of its forwarding packet function.
At present, the conventional method of carrying out simulating, verifying is that the tester writes complicated test program and tests, and perhaps tests on the exploitation model machine.As shown in Figure 3, in existing routing forwarding chip emulation verification method, give the routing forwarding chip by excited message producer dateout bag, also a copy of packet is outputed to routing forwarding chip reference model simultaneously, routing forwarding chip reference model is finished the function similar to the routing forwarding chip.Routing forwarding chip and routing forwarding chip reference model all with oneself output data packet delivery in the data packet queue of target physical port, described data packet queue is stored in the packet comparison module, and be responsible for the packet of the two output of comparison, thereby carry out the test of router chip route forwarding function by the packet comparison module.
At method shown in Figure 3, in the specific implementation process, usually the corresponding packet comparison module of interface equipment that needs each to receive routing forwarding chip dateout bag, each sends corresponding excited message producer of interface equipment of packet to the routing forwarding chip.Therefore, such scheme has verification technique and realizes that difficulty and workload are bigger, and each functional module of needing of the checking that generates of exploitation such as is difficult to be reused at shortcoming.
Summary of the invention
In view of above-mentioned existing in prior technology problem, the devices and methods therefor that the purpose of this invention is to provide a kind of emulated route analysis test, thereby convenient functional module at the route analysis test development can be repeated in the various route analysis test processs, to improve the effect that realizes the route analysis test, reduce the realization difficulty of route analysis test.
The objective of the invention is to be achieved through the following technical solutions:
The invention provides a kind of device of emulated route analysis test, comprising:
Excited message producer: be used for generating message and send to routing forwarding chip and routing forwarding chip reference model according to route analysis test needs;
Routing forwarding chip: be entity to be tested, be used for receiving described message and go forward side by side walking along the street, export to the route analysis test module from a port of routing forwarding chip then by transmitting processing from excited message producer;
Routing forwarding chip reference model: realize identical route forwarding function with the routing forwarding chip, receive described message from excited message producer and go forward side by side walking along the street by transmitting processing, the outlet that reinforms the described message of route analysis test module is by port information, as the expection outlet of described message by port information;
The route analysis test module; Determine that according to the message that the routing forwarding chip sends the actual outlet of this message on the routing forwarding chip is by port information, and itself and the expection outlet obtained from routing forwarding chip reference model compared by port information, obtain route analysis test result at described routing forwarding chip.
Described route analysis test module further comprises:
The packet parsing module: receive the message that the routing forwarding chip sends, the actual outlet of obtaining message is by port information, and notice routing forwarding analysis module;
The routing forwarding analysis module: be connected with routing forwarding chip reference model with the packet parsing module respectively, the expection outlet of obtaining described message by port information, and is determined the route analysis test result according to described information by port information and actual outlet.
Comprise in the described routing forwarding analysis module:
The expection outlet is by port list: the expection outlet that is used to write down each message is by port information, and described expection outlet can be for one or more by port.
Described excited message producer and packet parsing module are corresponding one by one with the physical port of routing forwarding chip.
The present invention also provides a kind of method of emulated route analysis test, comprising:
A, generate message to be sent, and send to routing forwarding chip and routing forwarding chip reference model respectively by excited message producer;
B, described routing forwarding chip carry out routing forwarding to described message to be handled, and determines that according to the routing forwarding result the actual outlet of described message is by port information; Described routing forwarding chip reference model carries out routing forwarding to described message to be handled, and the expection outlet of exporting described message is by port information;
C, determine route analysis test result by port information and expection outlet by port information at the routing forwarding chip according to the actual outlet of described message.
In the method for the present invention:
Described steps A also comprises:
Message to be sent at each generation inserts a package identification;
Described step C also comprises:
The actual outlet of determining same message according to described package identification by port information and expection outlet by port information.
Described step C further comprises:
Expection outlet according to the definite message of routing forwarding chip reference model is set up the expection outlet by port list by port information, and the expection outlet of preserving this message in the table is by port information, and each expection outlet is distinguished with package identification by port list;
Obtain described routing forwarding chip and transmit the package identification of the message of handling and actual outlet, and search according to described package identification and to determine that corresponding expection outlet is by port list by port information;
Described expection outlet compared by port information by the actual outlet of port information and this message by the expection outlet of this message that writes down in the port list obtain the route analysis test result.
Described expection outlet can be for one or more by port by the expection outlet of the message that writes down in the port list.
Described step C also comprises:
The package identification of C1, message that transmit to handle according to the routing forwarding chip is searched corresponding expection outlet by port list, judges whether to find, if find, and execution in step C2, otherwise, reporting errors;
Whether C2, the actual outlet of checking described message are stored in the expection outlet by in the port list by port, if, effective packet output identification then is set, and execution in step C3, otherwise reporting errors;
C3, check described expection outlet by whether the expection outlet that effective packet output identification is not set being arranged in the port list, and determine according to check result whether the routing forwarding chip packet loss takes place by port.
Described step C2 also comprises:
When the actual outlet of checking described message be stored in by port the expection outlet by port list in, and this port has been provided with active data bag output identification, then reporting errors.
Described routed port information comprises:
The physical port of routing forwarding chip is numbered, is connected in device numbering, Virtual Channel number information on the routing forwarding chip, and comprises fictitious channel number information alternatively.
As seen from the above technical solution provided by the invention, the invention provides a kind of device that can be repeated to be applied in the various route analysis test processs, can be applied to the emulation testing checking of various routing forwarding chips.Therefore, the present invention can improve the simulating, verifying efficient and the quality of routing forwarding chip, and can effectively reduce the workload of realization at the route analysis test of routing forwarding chip, improves routing forwarding chip development speed.
Description of drawings
Fig. 1 is the syndeton schematic diagram of the network switch and network communication equipment;
Fig. 2 is the applied environment schematic diagram of routing forwarding chip;
Fig. 3 is existing routing forwarding chip fax proof scheme schematic diagram;
Fig. 4 is a routing forwarding chip fax proof scheme schematic diagram provided by the invention;
Fig. 5 is an internal structure schematic diagram of transmitting analysis module among Fig. 4 on the road;
Fig. 6 and Fig. 7 are the type schematic diagram of two kinds of expection routed ports.
Embodiment
Core concept of the present invention is that the route forwarding chip is carried out abstract modeling, and sum up a general route analysis test process, so that a kind of route analysis testing tool at the routing forwarding chip of exploitation can be repeated to be applied to the emulation testing process at various routing forwarding chips.
The present invention at first provides a kind of device of emulated route analysis test, and the specific implementation of described device comprises as shown in Figure 4:
Excited message producer: be used for generating message to be sent according to route analysis test needs, send to routing forwarding chip and routing forwarding chip reference model afterwards respectively, so that analytical test is carried out in the route forwarding function of route forwarding chip according to the routing forwarding disposition of described message; The excited message producer that the present invention uses is identical with the excited message producer function that prior art relates to;
The routing forwarding chip: described routing forwarding chip is an entity to be tested, be used for receiving described message and go forward side by side walking along the street by transmitting processing from excited message producer, export to the route analysis test module from some definite port of routing forwarding chip then, so that described route analysis test module can know that the routing forwarding chip pins is to this message forwarding disposition; It is to determine corresponding outbound port according to the message loaded information on the routing forwarding chip that described routing forwarding is handled;
Routing forwarding chip reference model: realize identical route forwarding function with the routing forwarding chip, be used for receiving described message and go forward side by side walking along the street by transmitting processing from excited message producer, the outlet that reinforms the described message of route analysis test module is by port information, as the expection outlet of described message by port information; Described routing forwarding chip reference model is a kind of routing forwarding processing module according to routing forwarding chip design to be tested, is used for whether accurately handling standard as routing forwarding chip routing forwarding;
The route analysis test module; This module is core of the present invention place, the effect of this module is to determine that according to the message that the routing forwarding chip sends the actual outlet of this message on the routing forwarding chip is by port information, and itself and the expection outlet obtained from routing forwarding chip reference model compared by port information, acquisition is at the route analysis test result of described routing forwarding chip, if described actual outlet is consistent by port information with the expection outlet by port information, determine that then this routing forwarding chip route forwarding function is normal, otherwise, determine that the route forwarding function of described routing forwarding chip is wrong;
In concrete implementation procedure, described route analysis test module further comprises:
Packet parsing module: receive the message that the routing forwarding chip sends, obtain packet ID (sign) information of the actual outlet of message by port information and message, and notice routing forwarding analysis module, be specially the packet ID of message and actual outlet be registered in the routing forwarding analysis module by port information and go;
The routing forwarding analysis module: be connected with routing forwarding chip reference model with the packet parsing module respectively, the expection outlet of obtaining described message by port information, and is determined the route analysis test result according to described information by port information and actual outlet;
Be provided with the expection outlet in the described routing forwarding analysis module by port list, this table is used to write down the expection outlet of each message by port information, described expection outlet can be for one or more by port, the packet ID of message and actual outlet are registered to the packet ID that is in the routing forwarding analysis module according to message by port information search corresponding expection outlet by port list, and the actual outlet of whether preserving this message in the look-up table is by port information, if have, dateout bag sign in then showing is set to effectively, like this, after message is transmitted the processing procedure end, just can determine by port list whether the route forwarding function of described routing forwarding chip is normal according to the expection outlet;
The outlet of the packet that is provided by routing forwarding chip reference model is the anticipatory export tabulation by port (tabulation), and each outlet in the tabulation also can be called the expection outlet by port by port.
Excited message producer described in the present invention and packet parsing module be with the physical port of routing forwarding chip one to one.The reference model of described routing forwarding chip and routing forwarding analysis module respectively are provided with one and get final product when a kind of routing forwarding chip of test, be used for outlet by message by the ownership of port identification packet.
Under simulated environment, the routing forwarding chip typically uses hardware design language HDL description, and described routing forwarding chip is meant the logical design code, can make chip according to this logical design code, the logical design code can be used for the function of emulation chip.The reference model of routing forwarding chip typically uses the high-level language description, such as C++.The reference model of routing forwarding chip is finished the similar function of routing forwarding chip, and it calculates the outlet of input packet by port (for multicast, being that outlet is by port list), and it is registered in the routing forwarding analysis module.
The present invention also provides a kind of method of emulated route analysis test, below in conjunction with accompanying drawing method of the present invention is described in detail.
If the route forwarding chip is carried out the route analysis test, at first need to know source and the whereabouts of packet with respect to the routing forwarding chip, in order to describe source and the whereabouts of a packet well, need know physical port numbering, device numbering, the Virtual Channel numbering of packet Inbound and Outbound Route forwarding chip based on described routing forwarding chip;
The physical port numbering increases progressively each physical port of sign routing forwarding chip since 0;
Device numbering increases progressively since 0, and sign is connected to all devices of same physical port; If a physical port has only an equipment, device numbering is exactly 0; Device numbering and physical port numbering are combined, and could determine a physical equipment;
The Virtual Channel numbering in order to support the Virtual Channel grouping, needs two numberings could uniquely determine a Virtual Channel, empty group channel number and empty subchannel numbering; The situation that does not have Virtual Channel grouping can be thought all Virtual Channels all in a Virtual Channel group, and this moment, empty group channel number was 0;
So far, the source of packet and whereabouts just can represent that 4 numerals of this group are called routed port information with physical port numbering, device numbering, empty group channel number and four numerals of empty subchannel numbering; Under the situation of not using Virtual Channel, empty group channel number and empty subchannel numbering can be set to-1, and perhaps other are different from the Digital ID of channel number.
Described routing forwarding chip is handled message following three kinds of modes usually:
1, unicast packet: a packet is from certain routed port input, and unique exports from certain routed port;
2, multicast packet: a packet copies many parts from different routed port output from certain routed port input;
3, in order to improve data throughput rate, can also design several physical ports " binding " and transmit data together, outgoing message any one port can the physical port of several from this " bindings " comes out, but can not come out to form many parts of copies from wherein 2 or a plurality of physical port.This routed port is called as " binding " routed port.
The specific implementation of the method for the invention specifically may further comprise the steps:
Step 1: generate message to be sent by excited message producer, and send to routing forwarding chip and routing forwarding chip reference model respectively;
Message to be sent at each generation also needs to insert a unique packet ID, so that discern different messages, and carry out route analysis respectively based on different messages and test, described packet ID is a data numbering, and this package identification can be extracted by the packet parsing module; Described packet ID is of overall importance, and promptly the packet of all excited message producer outputs is numbered together, does not have the packet of identical numbering.
Step 2: described excited message producer generate corresponding message and send to the routing forwarding chip and routing forwarding chip reference model after, just respectively it is carried out routing forwarding and handles by described routing forwarding chip and routing forwarding chip reference model;
Described routing forwarding chip carries out routing forwarding to described message to be handled, and sends to the packet parsing module;
Described routing forwarding chip reference model carries out routing forwarding to described message to be handled, and the expection outlet of exporting described message is given the routing forwarding analysis module by port information.
Step 3: in the routing forwarding analysis module, set up the expection outlet by port list by port information according to the expection outlet of the definite message of routing forwarding chip reference model; Promptly as shown in Figure 5, an anticipatory export tabulation of routing forwarding analysis module storage inside formation, each anticipatory export tabulation is an index with packet ID, during beginning emulation, anticipatory export tabulation formation is empty; The expection outlet of preserving this message in the table is by port information, and the corresponding expection outlet of each message also comprises dateout bag flag information by port list in the described tabulation, and whether the corresponding port that is used to write down the routing forwarding chip dateout message; Described expection outlet can be for one or more by port by the expection outlet of the message that writes down in the port list;
Described routed port can be " binding " routed port, also can be single routed port, as shown in Figure 6 and Figure 7.
Simultaneously, the routing forwarding analysis module also obtains described routing forwarding chip from the packet parsing module and transmits the package identification of the message of handling and actual outlet by port information, and searches according to described package identification and to determine that corresponding expection outlet is by port list; Described packet parsing module is used to receive the message that the routing forwarding chip is sent, and extracts the packet ID of message, and the actual outlet with described message sends to the routing forwarding analysis module by port information afterwards.
Step 4: the routing forwarding chip that the routing forwarding analysis module is sent according to the packet parsing module is transmitted the package identification of the message of handling and is searched corresponding expection outlet by port list, judge whether to find, if find, execution in step 5, otherwise mistake appears in report;
Step 5: whether the actual outlet of checking described message is stored in the expection outlet by in the port list by port, if, then corresponding packet output identification is set for effectively in by port list in described expection outlet, and execution in step 6, otherwise mistake appears in report;
In this step, if the actual outlet of checking described message has been stored in the expection outlet by in the port list by port, and the list item of this port correspondence has been provided with active data bag output identification, and then mistake appears in report;
Step 6: after the message forwarding processing procedure finishes, check that described expection outlet is by whether the expection outlet that effective packet output identification is not set being arranged by port in the port list, and determine according to check result whether the routing forwarding chip packet loss takes place, promptly determine by the content information that writes down in the port list whether the route forwarding function of described routing forwarding chip is normal, to obtain the route analysis test result of described routing forwarding chip according to the expection outlet in the routing forwarding analysis module;
In step 6, if the expection outlet is " binding " routed port by port, then the actual outlet of the message that provides when the packet parsing module expects that by in port and " binding " routed port certain outlet is consistent by port, promptly think the expection outlet of at this " binding " by packet output is arranged on the port, it is effective that corresponding dateout bag sign is set;
Can adopt automatic method that it is checked at the expection outlet in the described routing forwarding analysis module by port list, automatic inspection can check out that as yet the expection outlet of outgoing message not is by port, thereby determine whether the routing forwarding chip has abandoned packet, promptly by just can know the routing forwarding handling property of routing forwarding chip by the automatic inspection of port list to the expection outlet.
The above; only for the preferable embodiment of the present invention, but protection scope of the present invention is not limited thereto, and anyly is familiar with those skilled in the art in the technical scope that the present invention discloses; the variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claims.
Claims (11)
1, a kind of device of emulated route analysis test is characterized in that, comprising:
Excited message producer: be used for generating message and send to routing forwarding chip and routing forwarding chip reference model according to route analysis test needs;
Routing forwarding chip: be entity to be tested, be used for receiving described message and go forward side by side walking along the street, export to the route analysis test module from a port of routing forwarding chip then by transmitting processing from excited message producer;
Routing forwarding chip reference model: realize identical route forwarding function with the routing forwarding chip, receive described message from excited message producer and go forward side by side walking along the street by transmitting processing, the outlet that reinforms the described message of route analysis test module is by port information, as the expection outlet of described message by port information;
The route analysis test module; Determine that according to the message that the routing forwarding chip sends the actual outlet of this message on the routing forwarding chip is by port information, and itself and the expection outlet obtained from routing forwarding chip reference model compared by port information, obtain route analysis test result at described routing forwarding chip.
2, the device of emulated route analysis test according to claim 1 is characterized in that, described route analysis test module further comprises:
The packet parsing module: receive the message that the routing forwarding chip sends, the actual outlet of obtaining message is by port information, and notice routing forwarding analysis module;
The routing forwarding analysis module: be connected with routing forwarding chip reference model with the packet parsing module respectively, the expection outlet of obtaining described message by port information, and is determined the route analysis test result according to described information by port information and actual outlet.
3, the device of emulated route analysis test according to claim 2 is characterized in that, comprises in the described routing forwarding analysis module:
The expection outlet is by port list: the expection outlet that is used to write down each message is by port information, and described expection outlet can be for one or more by port.
4, the device of emulated route analysis test according to claim 2 is characterized in that, described excited message producer and packet parsing module are corresponding one by one with the physical port of routing forwarding chip.
5, a kind of method of emulated route analysis test is characterized in that, comprising:
A, generate message to be sent, and send to routing forwarding chip and routing forwarding chip reference model respectively by excited message producer;
B, described routing forwarding chip carry out routing forwarding to described message to be handled, and determines that according to the routing forwarding result the actual outlet of described message is by port information; Described routing forwarding chip reference model carries out routing forwarding to described message to be handled, and the expection outlet of exporting described message is by port information;
C, determine route analysis test result by port information and expection outlet by port information at the routing forwarding chip according to the actual outlet of described message.
6, the method for emulated route analysis test according to claim 5 is characterized in that:
Described steps A also comprises:
Message to be sent at each generation inserts a package identification;
Described step C also comprises:
The actual outlet of determining same message according to described package identification by port information and expection outlet by port information.
According to the method for claim 5 or 6 described emulated route analysis tests, it is characterized in that 7, described step C further comprises:
Expection outlet according to the definite message of routing forwarding chip reference model is set up the expection outlet by port list by port information, and the expection outlet of preserving this message in the table is by port information, and each expection outlet is distinguished with package identification by port list;
Obtain described routing forwarding chip and transmit the package identification of the message of handling and actual outlet, and search according to described package identification and to determine that corresponding expection outlet is by port list by port information;
Described expection outlet compared by port information by the actual outlet of port information and this message by the expection outlet of this message that writes down in the port list obtain the route analysis test result.
8, the method for emulated route analysis test according to claim 7 is characterized in that, described expection outlet can be for one or more by port by the expection outlet of the message that writes down in the port list.
According to the method for claim 5 or 6 described emulated route analysis tests, it is characterized in that 9, described step C also comprises:
The package identification of C1, message that transmit to handle according to the routing forwarding chip is searched corresponding expection outlet by port list, judges whether to find, if find, and execution in step C2, otherwise, reporting errors;
Whether C2, the actual outlet of checking described message are stored in the expection outlet by in the port list by port, if, effective packet output identification then is set, and execution in step C3, otherwise reporting errors;
C3, check described expection outlet by whether the expection outlet that effective packet output identification is not set being arranged in the port list, and determine according to check result whether the routing forwarding chip packet loss takes place by port.
10, the method for emulated route analysis test according to claim 9 is characterized in that, described step C2 also comprises:
When the actual outlet of checking described message be stored in by port the expection outlet by port list in, and this port has been provided with active data bag output identification, then reporting errors.
According to the method for claim 5 or 6 described emulated route analysis tests, it is characterized in that 11, described routed port information comprises:
The physical port of routing forwarding chip is numbered, is connected in device numbering, Virtual Channel number information on the routing forwarding chip, and comprises fictitious channel number information alternatively.
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| CNB2005100665805A CN100366003C (en) | 2005-04-28 | 2005-04-28 | Device and method for emulated route analysis test |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101567818B (en) * | 2008-12-25 | 2011-04-20 | 中国人民解放军总参谋部第五十四研究所 | Large-scale network routing simulation method based on hardware |
| CN101183400B (en) * | 2007-12-21 | 2011-06-15 | 威盛电子股份有限公司 | Debugging and checking method and system in graph hardware design |
| CN104917628A (en) * | 2015-04-09 | 2015-09-16 | 南京邮电大学 | Automatic diagnosis method of Ethernet router/switch packet loss fault |
| CN109802864A (en) * | 2017-11-16 | 2019-05-24 | 中兴通讯股份有限公司 | Chip design and verification method, device and chip tester |
| CN110502426A (en) * | 2019-07-08 | 2019-11-26 | 中国工商银行股份有限公司 | The test method and device of distributed data processing system |
| CN111596646A (en) * | 2020-05-21 | 2020-08-28 | 中国铁道科学研究院集团有限公司 | Train safety control system and method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US5243273A (en) * | 1990-09-12 | 1993-09-07 | Hewlett-Packard Company | General purpose, reconfigurable system for processing serial bit streams |
| CN1060304C (en) * | 1996-01-25 | 2001-01-03 | 深圳市华为技术有限公司 | Device and method for whole machine testing of programable control exchange |
| US6721276B1 (en) * | 2000-06-29 | 2004-04-13 | Cisco Technology, Inc. | Automated microcode test packet generation engine |
| CN1153417C (en) * | 2002-10-25 | 2004-06-09 | 清华大学 | Simulation method and system for priority protocal of Internet large-scale route to open shortest path |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101183400B (en) * | 2007-12-21 | 2011-06-15 | 威盛电子股份有限公司 | Debugging and checking method and system in graph hardware design |
| CN101567818B (en) * | 2008-12-25 | 2011-04-20 | 中国人民解放军总参谋部第五十四研究所 | Large-scale network routing simulation method based on hardware |
| CN104917628A (en) * | 2015-04-09 | 2015-09-16 | 南京邮电大学 | Automatic diagnosis method of Ethernet router/switch packet loss fault |
| CN104917628B (en) * | 2015-04-09 | 2018-10-23 | 南京邮电大学 | A kind of ethernet router/interchanger packet loss automatic fault diagnosis method |
| CN109802864A (en) * | 2017-11-16 | 2019-05-24 | 中兴通讯股份有限公司 | Chip design and verification method, device and chip tester |
| CN110502426A (en) * | 2019-07-08 | 2019-11-26 | 中国工商银行股份有限公司 | The test method and device of distributed data processing system |
| CN111596646A (en) * | 2020-05-21 | 2020-08-28 | 中国铁道科学研究院集团有限公司 | Train safety control system and method |
| CN111596646B (en) * | 2020-05-21 | 2021-07-23 | 中国铁道科学研究院集团有限公司 | Train safety control system and method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100366003C (en) | 2008-01-30 |
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