CN1753310B - Random noise generator and a method for generating random noise - Google Patents
Random noise generator and a method for generating random noise Download PDFInfo
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- CN1753310B CN1753310B CN 200510103200 CN200510103200A CN1753310B CN 1753310 B CN1753310 B CN 1753310B CN 200510103200 CN200510103200 CN 200510103200 CN 200510103200 A CN200510103200 A CN 200510103200A CN 1753310 B CN1753310 B CN 1753310B
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Abstract
A random noise signal generator circuit comprising a random noise source that produces a random noise signal, an amplification circuit that amplifies the random noise signal to produce an amplified random noise signal, a feedback loop having a DC offset correction circuit, and a summer. The DC offset correction circuit processes a fed back portion of the amplified random noise signal to produce a DC offset correction signal. The summer sums the random noise signal produced by the random noise source and the DC offset correction signal to produce a summed signal. The summer is electrically coupled to the amplification circuit for providing the summed signal to the amplification circuitry. The amplification circuitry amplifies the summed signal to produce a random noise output signal.
Description
Technical field
The present invention relates to the generation of random number, relate in particular to the generation of random noise.
Background technology
It is the importance of many numerals and electronic application that random number produces.For example, in field of cryptography, the generation of random number is most important for AES.Random bit stream is a sequence of binary signals, and it does not have recognizable pattern or repeatability in time.
In electronic circuit, can from the source that shows stochastic behaviour naturally, produce random bit stream.For example, the thermal noise in cmos fet transistor (FET) raceway groove injects random component in the electric current that flows through this raceway groove worthwhile, and said current value can be exaggerated to obtain enough signals at random for reality is used subsequently.In general can not obtain pure random signal through actual means, though this is possible in theory.For practical application, what people sought is to produce the signal with high degree of randomness, said signal thereby have low measurable degree, and be applicable to concrete practical application.
Yet, producing based on the physical accidental phenomenon and to have enough bit streams of high degree of randomness, this possibly be problematic.Be only will disturb the degree of randomness of just measured physical phenomenon at random well known in the art to the signal This move of sampling.For example, in order to ensure high degree of randomness or unpredictability, measuring circuit should not translated into to measured value introduces any biasing in the probability of Binary Zero or binary one.For example; If sample circuit is measured the voltage level of noise at given time; And it is compared with the known threshold that this sample circuit is produced; Then processing and/or voltage and/or variation of temperature possibly cause threshold value to be drifted about in time, and this possibly make sample circuit deviation occur and more sampled value is translated into a bit value or another bit value.Therefore, because the chance of sampling " 1 " or " 0 " is no longer equal, therefore this processing no longer is a true random.
Present random bit flow generator has been injected biasing in the random bit flow generator, it has reduced the unpredictability of bit stream.Need following method and apparatus, said method and apparatus is used to produce the bit stream with the high degree of randomness (being unpredictability) that is enough to be used in concrete application.Particularly, produce bit stream in the randomness source of the Lock-in of hope within random bit produces circuit self.In addition, also need prevent the randomness or the unpredictability drift in time that cause owing to processing and/or voltage and/or variation of temperature.
Summary of the invention
The invention provides a kind of random noise signal and produce circuit; It comprises the random noise source that generates random noise signal, amplifies random noise signal with the amplifying circuit that generates the random noise signal that amplifies, the feedback control loop with direct current (DC) distortion correction circuit, and summer.The DC distortion correction circuit is handled to generate DC offset correction signal the feedback fraction of the random noise signal of amplification.Summer is sued for peace to generate summing signal to random noise signal and DC offset correction signal that random noise source generated.Summer is electrically coupled to amplifying circuit so that summing signal is provided to amplifying circuit.Amplifying circuit amplifies summing signal to generate random noise output signal.Wherein, amplifying circuit comprises first gain stage and second gain stage at least, and second gain stage has the gain higher than first gain stage, and first gain stage is corresponding to the input stage of amplifying circuit.
In one exemplary embodiment of the present invention, random noise source is a thermal noise source.
In another exemplary embodiment of the present invention, the DC distortion correction circuit is a low-pass filter circuit.
In another exemplary embodiment of the present invention, the DC distortion correction circuit is an automatic gain control circuit.
In another exemplary embodiment of the present invention, amplifying circuit also comprises the 3rd gain stage, and the 3rd gain stage has the gain higher than second gain stage.
In another exemplary embodiment of the present invention; Summer comprises capacitor that is electrically coupled to random noise source and the transistor that is electrically coupled to the DC distortion correction circuit; Transistor serves as resistor, and transistor and capacitor are electrically coupled to one another and are coupled to the input of amplifying circuit.
In another exemplary embodiment of the present invention; The DC distortion correction circuit is a low-pass filter circuit; Low-pass filter circuit comprises that the transistor that is connected with as capacitor work is connected with the transistor as resistor work with quilt, to form resistor-capacitor circuit circuit, i.e. RC circuit.
The present invention also provides a kind of method that is used to produce random noise signal.According to this method, produce random noise signal by random noise source.Then, amplify said random noise signal to produce the random noise signal that amplifies.Then, the feedback fraction of the random noise signal of amplification is handled, to generate DC offset correction feedback signal by the DC distortion correction circuit.Then, random noise signal and feedback signal that random noise source generated are sued for peace to generate summing signal.Then, amplify said summing signal to generate random noise output signal.Wherein, The step of amplifying random noise signal comprises random noise signal is input to amplifying circuit; Amplifying circuit comprises first gain stage and second gain stage at least, and second gain stage has the gain higher than first gain stage, and first gain stage is corresponding to the input stage of amplifying circuit.
In one exemplary embodiment of the present invention, random noise source is a thermal noise source.
In another exemplary embodiment of the present invention, the DC distortion correction circuit is a low-pass filter circuit, and wherein, DC offset correction signal is the signal through LPF.
In another exemplary embodiment of the present invention, amplifying circuit also comprises the 3rd gain stage, and the 3rd gain stage has the gain higher than second gain stage.
In another exemplary embodiment of the present invention; Summation step comprises utilizes summer that signal is sued for peace; Summer comprises capacitor that is electrically coupled to random noise source and the transistor that is electrically coupled to the DC distortion correction circuit; Transistor serves as resistor, and capacitor and transistor are electrically coupled to one another and form summing junction with the input at amplifying circuit.
The present invention also provides a kind of method that is used to produce a series of random bits, and this method comprises: utilize first random noise source to produce first random noise signal; Utilize second random noise source to produce second random noise signal; In first amplifying circuit, amplify first random noise signal, to generate the random noise signal of first amplification; In second amplifying circuit, amplify second random noise signal, to generate the random noise signal of second amplification; Handle the feedback fraction of first random noise signal that amplify by a DC distortion correction circuit, to generate a DC offset correction signal; Handle the feedback fraction of second random noise signal that amplify by the 2nd DC distortion correction circuit, to generate the 2nd DC offset correction signal; A random noise signal and a DC offset correction signal to first random noise source is produced are sued for peace, to generate first summing signal; Random noise signal and the 2nd DC offset correction signal to second random noise source is produced are sued for peace, to generate second summing signal; Amplify first summing signal, to generate first random noise output signal; Amplify second summing signal, to generate second random noise output signal; And first random noise output signal is exported signal with second random noise compare, and generate 0 of digital 1 or numeral according to comparative result.
In one exemplary embodiment of the present invention, first and second random noise sources are thermal noise source.
In another exemplary embodiment of the present invention, the first and second DC distortion correction circuits are low-pass filter circuits.
In another exemplary embodiment of the present invention, the first and second DC distortion correction circuits are automatic gain control circuits.
One of major advantage of using said DC offset correction feedback signal is that it has eliminated the DC bias deviation of common appearance, and this feasible gain stage by amplifying circuit will exchange (AC) noise signal amplifies, and does not amplify very big DC bias deviation.Avoided amplifying very big DC bias deviation, this has prevented to have biasing at the output of amplifying circuit, and said biasing can make the randomness of noise signal reduce.In addition; Because DC offset correction feedback signal has reduced the DC bias deviation that amplifying circuit amplified; Therefore amplifying circuit can be used bigger gain, and this makes that big must being enough to of the voltage swing that output had of amplifying circuit sampled, and does not reduce the unpredictability of signal.
From following specification, accompanying drawing and claims, these and other characteristic of the present invention will become clear.
Description of drawings
Fig. 1 shows according to an embodiment, the block diagram of random noise generator of the present invention.
Fig. 2 shows according to an embodiment, the sketch map of random noise generator shown in Figure 1.
Fig. 3 shows a sketch map, and wherein the output of two random noise generators shown in Figure 2 is coupled to the input of comparator, and said comparator becomes random bit stream with the signal resolution on its input.
Fig. 4 shows according to an embodiment, the flow chart that is used to produce the method for random noise of the present invention.
Embodiment
Noise source in the circuit such as the FET raceway groove is introduced a certain amount of unpredictability in passing through their signal.Here the meaning that employed term " unpredictability " hope to be expressed is: given perfect knowledge to circuit and the signal waveform till the time " t " also can't predict the time signal value that " t+ Δ t " locates within a certain accuracy limitations.Because when predicting, the probability of prediction error is near 50%, so this result can be regarded as the random bit string at every turn.Here the pure randomness on the representation theory meaning might not be hoped in employed term " at random ".In order to make signal useful to being enough at random, not needing it is purely at random.The required randomness or the degree of unpredictability depend on concrete application.Therefore, the unpredictability that will use term " at random " to indicate here to be enough to be used in given application or the degree of randomness.
Main purposes more of the present invention are: 1) device with following behavior is provided, and said behavior is very responsive to noise that random noise source injected, thereby the behavior is " unpredictable " or " at random " as much as possible; 2) produce following output; Embedded the unpredictability of height like this in the said output; So that this unpredictability can be tested by the circuit downstream such as comparator effectively, this means have sizable variation on the output under the rational current drives; 3) interference element of means for correcting, said interference element for example be produce the biasing will be injected among the result the DC bias deviation, destroy the high Q vibration of unpredictability, or the like; And 4) device that has enough unpredictabilities in its output is provided, under the required sample rate of the concrete application of this device, given result's to all previous outputs test complete knowledge, also unpredictable said result.To explain how these purposes of the present invention and other purposes realize with reference to Fig. 1-Fig. 4 now.
Fig. 1 shows according to an embodiment, and random noise of the present invention produces the block diagram of circuit 1.Random noise produces circuit 1 and comprises the random noise source 2 that produces random noise signal, amplifies the amplifying circuit 3 of random noise signal, in feedback control loop, handles the noise signal of amplifying producing the DC distortion correction circuit 4 of feedback signal, and the summing junction 5 that feedback signal and random noise signal 6 are sued for peace.
Amplifying circuit 3 preferably has sufficiently high gain; Enough big voltage swing to be provided to output signal 6; To be used for the circuit downstream (not shown) that random noise produces circuit, said random noise produces circuit output signal 6 is sampled to produce random bit stream.DC distortion correction circuit 4 is proofreaied and correct the DC bias deviation in feedback control loop 7.This deviation possibly produce owing to processing, temperature and/or change in voltage.As stated, said deviation possibly cause exporting the biasing in the signal 6, this stoped export 6 have hope degree of randomness.DC distortion correction circuit 4 generates feedback signal, and this feedback signal reduces the DC deviation signal of being amplified by amplifying circuit 3, thereby reduces the biasing in the output signal 6.
DC distortion correction circuit 4 generates lower gain signal, and said gain signal is provided so that preferably loop 7 just has been lower than or just has been higher than oscillation threshold.Under the situation that does not have feedback, random noise produces circuit 1 and comes down to ring oscillator.Feedback makes circuit 1 come down to just stable or just unsettled asymmetric ring oscillator.Preferably, come the regulation loop gain through DC distortion correction circuit 4, so that loop 7 is remained on neutrality/point of instability.If loop gain improves too much, then loop 7 will vibrate, and its Q value is enough high so that value that export signal 6 becomes more and more measurable, although the voltage swing of output signal 6 is big as can be used by the sampled downstream circuit completely.If loop gain reduces too much, the voltage swing of then exporting signal 6 reduces rapidly and diminishes to such an extent that can't be used by the sampled downstream circuit, although the value of output signal 6 become more and more unpredictable.DC distortion correction circuit 4 maintains loop gain and makes loop 7 remain on the level on neutrality/point of instability, and this voltage swing of having guaranteed output signal 6 is enough big, and the value of output signal 6 is enough unpredictable.
DC distortion correction circuit 4 can utilize multiple assembly, disposes in many ways.The one type of physical circuit example that can be used as DC distortion correction circuit 4 is a low pass filter.The another kind of physical circuit example that can be used as DC distortion correction circuit 4 is automatic gain control (AGC) circuit.Through under all processing and condition of work, loop gain accurately being arranged on the just stable right value, just can agc circuit be used for this purpose.Also can use other filtering techniques or transfer function to come the regulating circuit performance, to realize the object of the invention.
Fig. 2 is the sketch map that produces circuit 1 according to the random noise of an exemplary embodiment, and wherein the DC distortion correction circuit is a low pass filter.According to this embodiment, random noise source 2 is thermal noise source, for example the raceway groove of P field-effect transistor (PFET).PFET 2 serves as thermal noise source.The breadth length ratio of PFET2 for example can be 0.3/.64.Plane-parallel capacitor 12 is ac-coupled to electric current the input of amplifying circuit 3 from the drain electrode of PFET 2.Capacitor 12 for example can have the capacitance of 13 millimicro microfarads (Ff).
Preferably, amplifying circuit 3 comprises a plurality of levels of cascade, and on the direction from the input stage to the output stage, drive strength increases.Each level comprises inverter (inverter), and said inverter comprises the PFET that is connected in series with N field-effect transistor (NFET).The inverter of input stage comprises PFET 14 and NFET 15.Partial inverter comprises PFET 16 and NFET 17.The inverter of output stage comprises PFET 18 and NFET 19.Have three levels although amplifying circuit 3 is shown as, amplifying circuit 3 can have few to a level, three of as many as or more a plurality of level.
For the drive strength that increases continuously is provided to inverter, the size of inverter is increased to the large-size of output stage from the reduced size of input stage.For example, for CMOS shown in Figure 2 design, PFET14,16 and 18 breadth length ratio are respectively 0.8,1.6 and 3.2, and the breadth length ratio of NFET 15,17 and 19 is respectively 0.3,0.6 and 1.2.These FET aspect ratios provide sufficiently high drive strength to amplifying circuit 3, to guarantee that exporting signal 6 has sufficiently high voltage swing for the sampled downstream circuit.
Low-pass filter circuit 20 is the filtering high fdrequency component from random noise signal 6.Low-pass filter circuit 20 comprises NFET 21 and PFET 22, and NFET 21 and PFET 22 are connected in parallel, and its grid is connected respectively to supply voltage VDD and ground GND.NFET 21 has formed the resistor of low-pass filter circuit 20 with being connected in parallel of PFET 22.Low-pass filter circuit 20 also comprises PFET 23 and NFET 24.The source electrode of PFET 23 and drain electrode link together and are connected to VDD.The source electrode of NFET 24 and drain electrode link together and are connected to GND.The grid of PFET 23 and NFET 24 is connected to feedback control loop, and the conduction of connect with the parallel-connection structure of NFET 21 and PFET 22 is coupled.The capacitor that has been connected to form RC circuit 4 of PFET23 and NFET 24.The breadth length ratio of NFET 21 for example can be 0.3/3.The breadth length ratio of PFET 22 for example can be 0.3/1.The breadth length ratio of PFET 23 for example can be 20/.24.The breadth length ratio of NFET 24 for example can be 20/.24.
The PFET 25 that is connected in series with low-pass filter circuit 20 serves as resistor.The summing junction that has been combined to form amplifying circuit 3 input ends of PFET 25 and capacitor 12.In fact, these assemblies have constituted summing junction shown in Figure 15 together.The breadth length ratio of PFET 25 for example can be 0.3/.565.
Fig. 3 shows the sketch map that random bit produces circuit 30, and said random bit produces the random noise generation circuit 40 and 60 that circuit 30 has two types shown in Figure 2, and its output is coupled to the input of comparator 30.Comparator 30 becomes random bit stream 38 with its input 35 with signal resolution on 36.Signals sampling on clock signal 37 control input ends 35 and 36 regularly.The assembly that indicates label 32-34 and the 42-55 shown in Figure 3 assembly that indicates label 2-4 and 12-25 with shown in Figure 2 respectively is identical.Equally, the assembly that indicates label 72-74 and the 82-95 shown in Figure 3 assembly that indicates label 2-4 and 12-25 with shown in Figure 2 respectively is identical.Therefore, with the operation that assembly 32-34,42-55,72-74 and 82-95 shown in Figure 3 no longer are described.
As stated, (for example owing to processing/temperature/voltage variation produce) deviation voltage can cause the biasing in the comparator 30 in the known comparator 30, and it has reduced the randomness of the value of bit stream 38.In other words, said deviation voltage can cause comparator 30 have output numeral 1 and nonnumeric 0 tendency is perhaps opposite.According to the present invention; Comparator 30 preferably has enough big size; So that the amplitude of any bias voltage of being generated of comparator 30 all can be much littler than the swing of comparator input voltage (be between the voltage on input 35 and 36 poor), thereby bit stream 38 can or can not produce bias hardly fully.In addition; Since low- pass filter circuit 34 and 74 provide with loop just remained near the threshold level of vibrating than low gain; The gain that therefore amplifying circuit 33 and 73 is provided is bigger; So that the voltage on comparator input terminal 35 and 36 is bigger, this means that the comparator input voltage swing will be bigger.These combination of features of the present invention have guaranteed that bit stream 38 will be enough at random.
Fig. 4 shows according to an embodiment, representes the flow chart that is used to produce the method for random noise signal of the present invention.At first, generate random noise signal by random noise source, said random noise source for example is the FET raceway groove that is used as thermal noise source.This step is by square frame 101 expressions.Amplifying circuit amplifies random noise signal to produce the random noise signal that amplifies, shown in square frame 102.Then, at least a portion of the random noise signal of amplification is handled, to generate DC offset correction signal, shown in square frame 103 by the DC distortion correction circuit.Then, the random noise signal that DC offset correction signal and random noise source are generated is sued for peace, shown in square frame 104.Then, amplify with random noise signal and through the filtering signal sum, to generate random noise output signal, shown in square frame 105 by amplifying circuit.
In order to produce random bit stream; Above-mentioned processing with reference to Fig. 4 explanation is to use two identical random noises generation circuit for example shown in Figure 3 to carry out; And each random noise output signal is provided for as above with reference to the described comparison circuit of Fig. 3; Said comparison circuit comparison output signal, and according to 0 of comparative result output digital 1 or numeral.
Should be noted in the discussion above that and the present invention has been described, but the present invention is not limited to embodiment described herein with reference to specific embodiment.For example, the present invention is not limited to the concrete configuration that random noise shown in Figure 2 produces circuit.Configuration shown in Figure 2 just realizes one of many modes of circuit shown in Figure 1.Other filtering techniques or transfer function can be used to the regulating circuit characteristic, to realize the object of the invention.As stated, through under all processing and condition of work, loop gain accurately being arranged on the just stable right value, can be used for this purpose by the feedback circuit that agc circuit is regulated.In addition, although with reference to FET technology, particularly be with reference to the CMOSFET technical description the present invention, the present invention also is applicable to other IC technology and handles.It will be understood to those of skill in the art that the mode that can carry out other modifications, these modifications also are within the scope of the present invention.
Claims (16)
1. a random noise signal produces circuit, comprising:
Random noise source, it generates random noise signal;
Amplifying circuit, it amplifies said random noise signal to generate the random noise signal that amplifies;
Feedback control loop, it has the DC distortion correction circuit, and said feedback control loop makes the feedback fraction of the random noise signal of said amplification pass through said DC distortion correction circuit, to generate DC offset correction signal; And
Summer; It is sued for peace to generate summing signal to random noise signal and said DC offset correction signal that said random noise source generated; Said summer is electrically coupled to said amplifying circuit so that said summing signal is provided to said amplifying circuit; Said amplifying circuit amplifies said summing signal to generate random noise output signal
Wherein, said amplifying circuit comprises first gain stage and second gain stage at least, and said second gain stage has than the higher gain of said first gain stage, and said first gain stage is corresponding to the input stage of said amplifying circuit.
2. random noise signal as claimed in claim 1 produces circuit, and wherein said random noise source is a thermal noise source.
3. random noise signal as claimed in claim 1 produces circuit, and wherein said DC distortion correction circuit is a low-pass filter circuit.
4. random noise signal as claimed in claim 1 produces circuit, and wherein said DC distortion correction circuit is an automatic gain control circuit.
5. random noise signal as claimed in claim 1 produces circuit, and wherein, said amplifying circuit also comprises the 3rd gain stage, and said the 3rd gain stage has than the higher gain of said second gain stage.
6. random noise signal as claimed in claim 1 produces circuit; Wherein, Said summer comprises capacitor that is electrically coupled to said random noise source and the transistor that is electrically coupled to said DC distortion correction circuit; Said transistor serves as resistor, and said transistor and capacitor are electrically coupled to one another and are coupled to the input of said amplifying circuit.
7. random noise signal as claimed in claim 1 produces circuit; Wherein, Said DC distortion correction circuit is a low-pass filter circuit; Said low-pass filter circuit comprises that the transistor that is connected with as capacitor work is connected with the transistor as resistor work with quilt, to form resistor one capacitor circuit, i.e. RC circuit.
8. method that is used to produce random noise signal, this method comprises:
Utilize random noise source to produce random noise signal;
Amplify said random noise signal to generate the random noise signal that amplifies;
Handle the feedback fraction of the random noise signal of said amplification by the DC distortion correction circuit, to generate DC offset correction signal;
Random noise signal and said DC offset correction signal that said random noise source generated are sued for peace to generate summing signal; And
Amplify said summing signal and export signal to generate random noise,
Wherein, The step of said amplification random noise signal comprises said random noise signal is input to amplifying circuit; Said amplifying circuit comprises first gain stage and second gain stage at least; Said second gain stage has than the higher gain of said first gain stage, and said first gain stage is corresponding to the input stage of said amplifying circuit.
9. method as claimed in claim 8, wherein, said random noise source is a thermal noise source.
10. method as claimed in claim 8, wherein, said DC distortion correction circuit is a low-pass filter circuit, and wherein, said DC offset correction signal is the signal through LPF.
11. method as claimed in claim 8, wherein, said amplifying circuit also comprises the 3rd gain stage, and said the 3rd gain stage has than the higher gain of said second gain stage.
12. method as claimed in claim 8; Wherein, Said summation step comprises utilizes summer that said signal is sued for peace; Said summer comprises capacitor that is electrically coupled to said random noise source and the transistor that is electrically coupled to said DC distortion correction circuit, and said transistor serves as resistor, and said capacitor and transistor are electrically coupled to one another and form summing junction with the input at said amplifying circuit.
13. a method that is used to produce a series of random bits, this method comprises:
Utilize first random noise source to produce first random noise signal;
Utilize second random noise source to produce second random noise signal;
In first amplifying circuit, amplify said first random noise signal, to generate the random noise signal of first amplification;
In second amplifying circuit, amplify said second random noise signal, to generate the random noise signal of second amplification;
Handle the feedback fraction of said first random noise signal that amplify by a DC distortion correction circuit, to generate a DC offset correction signal;
Handle the feedback fraction of said second random noise signal that amplify by the 2nd DC distortion correction circuit, to generate the 2nd DC offset correction signal;
A random noise signal and a said DC offset correction signal to said first random noise source is produced are sued for peace, to generate first summing signal;
Random noise signal and said the 2nd DC offset correction signal to said second random noise source is produced are sued for peace, to generate second summing signal;
Amplify said first summing signal, to generate first random noise output signal;
Amplify said second summing signal, to generate second random noise output signal; And
Said first random noise output signal is compared with said second random noise output signal, and generate 0 of digital 1 or numeral according to comparative result.
14. method as claimed in claim 13, wherein said first and second random noise sources are thermal noise source.
15. method as claimed in claim 13, the wherein said first and second DC distortion correction circuits are low-pass filter circuits.
16. method as claimed in claim 13, the wherein said first and second DC distortion correction circuits are automatic gain control circuits.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/946,407 | 2004-09-21 | ||
| US10/946,407 US7401108B2 (en) | 2002-05-08 | 2004-09-21 | Random noise generator and a method for generating random noise |
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| CN1753310A CN1753310A (en) | 2006-03-29 |
| CN1753310B true CN1753310B (en) | 2012-02-01 |
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| CN 200510103200 Expired - Fee Related CN1753310B (en) | 2004-09-21 | 2005-09-20 | Random noise generator and a method for generating random noise |
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| CN116961590A (en) * | 2020-01-17 | 2023-10-27 | 芯海科技（深圳）股份有限公司 | True random signal generating circuit, method, spread spectrum clock generator and chip |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6459722B2 (en) * | 1998-12-29 | 2002-10-01 | Texas Instruments Incorporated | Pseudorandom noise generator for WCDMA |
| CN1483159A (en) * | 2001-01-24 | 2004-03-17 | �����ɷ� | Random number generator and method for generating a random number |
| CN101044449A (en) * | 2004-07-23 | 2007-09-26 | 高通股份有限公司 | Method and apparatus for random-number generator |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6459722B2 (en) * | 1998-12-29 | 2002-10-01 | Texas Instruments Incorporated | Pseudorandom noise generator for WCDMA |
| CN1483159A (en) * | 2001-01-24 | 2004-03-17 | �����ɷ� | Random number generator and method for generating a random number |
| CN101044449A (en) * | 2004-07-23 | 2007-09-26 | 高通股份有限公司 | Method and apparatus for random-number generator |
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