CN1627493A - 配备凸块的电子元件的安装方法及其安装结构 - Google Patents
配备凸块的电子元件的安装方法及其安装结构 Download PDFInfo
- Publication number
- CN1627493A CN1627493A CNA200410100227XA CN200410100227A CN1627493A CN 1627493 A CN1627493 A CN 1627493A CN A200410100227X A CNA200410100227X A CN A200410100227XA CN 200410100227 A CN200410100227 A CN 200410100227A CN 1627493 A CN1627493 A CN 1627493A
- Authority
- CN
- China
- Prior art keywords
- electronic component
- projection
- metal
- substrate
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 29
- 230000010355 oscillation Effects 0.000 claims abstract description 42
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 229920005989 resin Polymers 0.000 claims abstract description 22
- 239000011347 resin Substances 0.000 claims abstract description 22
- 229920001187 thermosetting polymer Polymers 0.000 claims abstract description 8
- 239000002184 metal Substances 0.000 claims description 108
- 229910052751 metal Inorganic materials 0.000 claims description 108
- 230000008878 coupling Effects 0.000 claims description 77
- 238000010168 coupling process Methods 0.000 claims description 77
- 238000005859 coupling reaction Methods 0.000 claims description 77
- 229910000679 solder Inorganic materials 0.000 claims description 27
- 238000009434 installation Methods 0.000 claims description 5
- 230000000694 effects Effects 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 9
- 239000010931 gold Substances 0.000 description 9
- 229910052737 gold Inorganic materials 0.000 description 9
- 238000003466 welding Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 2
- 230000003111 delayed effect Effects 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 238000011900 installation process Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
- B23K20/10—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating making use of vibrations, e.g. ultrasonic welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05644—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13144—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/757—Means for aligning
- H01L2224/75743—Suction holding means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
Abstract
本发明公开了一种将带有多个凸块(6)的配备凸块的电子元件(5)安装到带有多个电极(3)的衬底(2)上的安装方法中,通过将金属凸块与电极(3)对齐且热固树脂(4)夹置在电子元件(5)和衬底(2)之间,并通过在对电子元件(5)实施超声波振荡、加热和施压的同时将电子元件(5)压到衬底(2)上,而将金属凸块(6)连接到电极(3)的过程中,所有的金属凸块(6)与电极接触,以致于彼此电连接,并当金属凸块中的一些金属焊接到电极时,停止超声波振荡。因而可以防止由于对先前已经开始金属焊接的金属凸块施加过度的超声波振荡而发生损坏。
Description
技术领域
本发明涉及一种配备凸块(bump)的电子元件(electronic component)的安装方法及带有多个金属凸块的配备凸块的电子元件的安装结构,用于将带有多个金属凸块的配备凸块的电子元件安装到基底上。
背景技术
作为一项在基底上安装配备凸块的电子元件的技术,电子元件例如是配置有作为用于连接的电极的金属凸块的半导体器件,采用了超声焊接(如JP-A-10-335373和JP-A-2001-298146)。在此安装技术中,通过利用超声波振荡将配备凸块的电子元件压到衬底上,对配备凸块的电子元件释放热量和施压,经超声焊接将金属凸块金属焊接(metallic-bond)到衬底上的电极,以致于金属凸块电连接到电极。
同时,形成于配备凸块的电子元件上的金属凸块的大小上存在变化。在上述超声焊接中,凸块金属焊接到电极上,以便较大尺寸的凸块与相应的电极形成接触。在焊接过程中,金属凸块被压力轻微地挤压,使得所有金属凸块金属焊接到相应的电极上,由此完成超声焊接。
但是,在对配备凸块的电子元件的超声焊接中,因为凸块大小的不同,对每个金属凸块的超声焊接的进行程度不同。因此,先前已经启动金属焊接的金属凸块在其下端已经金属焊接到电极的情况下继续经历超声波振荡。由于凸块基部的振荡位移,过度经受超声波振荡的金属凸块受到过度的应力。这引发在完成超声焊接的状态下凸块的基部产生诸如断裂的损坏这样的问题。
发明内容
鉴于上述情况,本发明的目的在于提供一种安装配备凸块的电子元件的方法,可以防止超声焊接过程中损坏的发生,并涉及一种配备凸块的电子元件的安装结构。
根据本发明的配备凸块的电子元件的安装方法用于把具有多个金属凸块的配备凸块的电子元件安装到具有多个电极的衬底上,包括步骤:
将多个金属凸块与多个电极对齐,其中热固树脂夹置在电子元件与衬底之间;
在把超声波振荡、热量和压力施加到配备凸块的电子元件上的同时,把电子元件压向衬底;和
使所有的多个金属凸块与多个的电极接触,使得彼此之间电连接,还在多个金属凸块中的一些金属焊接到多个电极时,基本停止超声波振荡。
根据本发明的配备凸块的电子元件的安装结构是一种配备凸块的电子元件的安装结构,通过把带有多个金属凸块的配备凸块的电子元件压到带有多个电极的衬底上,同时将超声波振荡、热量和施加的压力作用在电子元件上,使金属凸块与多个电极接触,以致于彼此之间电连接,并且衬底和电子元件通过热固树脂彼此粘结,其特征在于,多个金属凸块中的一些经金属焊接连接到电极,而剩余的金属凸块通过其间的接触电连接到多个电极。
根据本发明,在对配备凸块的电子元件实施超声波振荡、热量和施压的同时把配备凸块的金属组件压到衬底上的过程中,所有的金属凸块与电极接触,以致于彼此之间电连接,并当一些金属凸块金属焊接到电极时,超声波振荡基本上停止。因而,可以防止由于在先前已经启动了金属焊接的金属凸块上过度的超声波振荡而发生的损坏。
附图说明
图1(a)-1(d)是根据本发明实施例的电子元件安装方法的步骤流程图;
图2是根据本发明实施例的电子元件安装结构的截面图;
图3是根据本发明实施例的电子元件安装方法中压载荷和超声波输出的时序图。
具体实施方式
现参见附图解释本发明实施例。图1是用来解释根据本发明实施例的电子元件安装方法的步骤的流程图。图2是根据本发明实施例的电子元件安装结构的截面图。图3是根据本发明实施例的电子元件安装方法中压载荷和超声波输出的时序图。
参见图1,将解释电子元件安装方法。电子元件安装方法是用于把带有多个金属凸块的配备凸块的电子元件安装到带有多个电极的衬底上。现假设金属凸块由金凸块形成,电极由金层形成,且它的表面镀金。
在图1(a)中,在其上表面形成有电极3的衬底2被固定在衬底支撑部分1上。在衬底2的上表面上,通过利用分配器施加热固树脂4,如环氧树脂。树脂4可以以这种方式施加,即,成为片状的树脂片4粘结到衬底2的表面上。
接下来,如图1(b)所示,使用于超声挤压的工具7固定配备凸块的电子元件5(以下简称为电子元件5),且金属凸块用作形成在下表面上的连接电极。即,电子元件5以通过吸附槽7a真空吸附的方式被吸附固定,且工具7的固定表面与后表面(与形成凸块的表面相对的表面)保持接触。
其上安装有工具7的挤压装置(未示出)配置有振荡施加装置、加热装置和施压机构。通过与电子元件5的后表面保持接触的工具7,挤压装置可以通过工具7对电子元件5发出超声波振荡、热量和压力。振荡施加装置可以选择地控制超声波振荡的开始/结束和输出。加热装置也可以选择地设置加热温度。施压机构也可以选择设置压载荷。
固定电子元件5的工具7移动到衬底2上,且树脂4已被事先施加到电极3上。通过夹置在电子元件5和衬底2之间的树脂,多个的金属凸块6与多个的电极3对齐。接下来,参见图1(c),工具7以及电子元件5降低,以促使金属凸块6的下表面着陆到电极3的表面上,由此通过超声波振荡(箭头a)、热量(箭头b)和施压(箭头c)把金属凸块6焊接到电极3。
参见图3的时序图来解释这个焊接过程。图3表示在金属凸块6开始着陆于电极3时的t1时刻之后,压载荷和超声波输出随时间的变化。此外,在图3所示的时间中,加热装置处于ON态,以致于电子元件5被工具7连续地加热。夹置在衬底2和电子元件5之间的树脂4从t1蚀刻开始加热并开始热固化。
金属凸块6的大小略有不同。在t1时刻,多个金属凸块6中的一些具有较大尺寸的金属凸块6首先着陆在电极3的表面上。t1时刻之后,通过利用工具7向下压电子元件5,随着压载荷的增加,首先与电极3接触的金属凸块6被增大的载荷轻微地挤压,以致于还未接触的凸块陆续与电极3接触。
在t2时刻,如果压载荷达到足以将金属凸块6一半超声焊接的第一预定载荷W1,振荡施加装置启动,开始以预定的输出P1施加超声波振荡。在从t2时刻到t3时刻的间隔中,在该间隔中第一预定时间周期T1消逝,第一预定载荷W1被保持。
在此期间,压载荷和超声波振荡施加在金属凸块6和电极3之间的接触面上。因而,先前已经与电极3接触的金属凸块6下端处的金被金属焊接到电极3表面上的金层。通过继续实施振荡直到超声波施加周期T2结束的t5时刻,金属凸块6以它们与电极3接触的顺序相继金属焊接到电极3的表面上。顺便说,除了同类金属如金与金之间的焊接外,本发明的金属焊接还包括不同金属之间的焊接。
在t3时刻,压载荷从第一预定压载荷W1增加。在从压载荷达到足以将金属凸块6与电极3接触的第二预定载荷W2的时刻t4到第二施加时间周期T3结束时刻t6的间隔中,保持第二预定载荷W2。因而,由金属凸块6的载荷所致的塑料变形程度增加,以致于所有的金属凸块6都与电极3接触。之后,通过提升工具7,压载荷在t7时刻变为零,由此完成焊接过程。
下面参见图3,设置超声波振荡施加时间周期T2,使得时刻t5比时刻t6更早来临以满足下面的条件。具体地说,设置超声波振荡施加时间T2,使得超声波振荡的施加在所有金属凸块6的下表面处的金被金属焊接到电极表面上的金层之前即停止,换言之,使得在只有与电极6接触的金属凸块6中的一些被金属焊接到电极3的状态下停止超声波振荡的施加,而其它剩余的金属凸块6只与电极6接触而非金属焊接。根据目标衬底2和电子元件5的种类,分别设置此超声波振荡施加时间周期T2。时间周期T2主要根据改变如超声波振荡的上述第一载荷W1、第二载荷W2和预定输出P1的条件为不同值的操作结果凭经验确定。
在超声波振荡施加时间周期T2的后半段中,继续由热固所致的树脂4的胶凝,使得经工具7传导到电子元件5的金属凸块6中的超声波振荡能量中的一部分被金属凸块6周围的树脂4吸收。因此能够防止电子元件5由于金属凸块6周围施加过度的超声波振荡被损坏。
在从时刻t5到t6的间隔中,参见图1(d),因为继续通过工具7对电子元件5施加热量和载荷,所以树脂4的热固化也继续,使得树脂4收缩。这增大了仍未金属焊接的金属凸块6与电极3之间的接触面压力,由此提高了其间的粘结性。
简言之,上述电子元件安装方法中将金属凸块6焊接到电极3的过程包括把电子元件5压到衬底2上、同时对电子元件5施加超声波振荡、热量和压力的步骤,并且将电子元件5电连接到衬底2,同时所有的金属凸块6都与电极3接触,并且还在一些金属凸块被金属焊接时基本上停止超声波振荡的施加。
另外,还在基本上停止超声波振荡时,继续对电子元件5施加热量和压力。此处,超声波振荡的基本停止意味着在金属凸块6可能被损坏的输出水平处停止施加超声波振荡。因此,t5时刻之后,在不损坏电子元件的输出水平上继续超声波振荡的情形要求基本上停止超声波振荡。
因而,不会发生下面的那种情形,即:在超过适当的超声波焊接周期的时间周期内,对于在早期启动超声焊接的焊接过程中已经与电极接触的金属凸块6发生过度地施加超声波振荡。结果,可以有效防止由于过度施加超声波振荡而发生损坏。
另外,在此电子元件安装方法中,因为多个的金属凸块6中的一些被金属焊接,所以甚至当安装过程中树脂的热固化不足时,电子元件5也可以通过这些被金属焊接的金属凸块5固定到衬底2。因此,防止安装的间歇时间(tact time)由于为了充分固化树脂4的目的而延长通过工具7施压的时间周期而被拖延,由此实现有效的安装操作。
图2表示通过上述电子元件所获得的安装结构,即配备凸块的电子元件的一部分安装结构,其中通过把带有多个金属凸块6的电子元件5压到带有多个电极3的衬底2上、同时对电子元件实施超声波振荡、热量和施压,使金属凸块6与多个电极3接触,以致于彼此电连接,并且还通过热固树脂4使衬底2与电子元件5相互焊接。
在上述安装结构中,用箭头d表示的金属凸块6经金属焊接层8连接到对应的电极3,而金属焊接层8是作为每个金属凸块6的下端处的金被金属焊接到每个电极3表面上的金层的结果而形成。除这些被如此金属焊接的金属凸块6以外的金属凸块6以它们的下端与每个电极3的表面保持接触的方式连接到对应的电极3。即,多个金属凸块6中的一些经金属焊接连接到电极3,而其余的金属凸块经其间的接触电连接到电极。
在这些配备凸块的电子元件的安装结构中,电子元件5经热固化的树脂4固定到衬底2。在此状态下,因为一些金属凸块6金属焊接到电极,所以甚至在电子元件2因为安装之后在使用状态中的热循环而与树脂分开时,也很难发生金属凸块6和电极3之间的断开。因此,可以实现高度可靠的安装结构。
根据本发明的配备凸块的电子元件的安装方法以及配备凸块的电子元件的安装结构具有这样的效果,即,它们可以防止由于对先前已经开始金属焊接的金属凸块过度施加超声波振荡而发生损坏,并且可以用在配置多个金属凸块的电子元件安装到衬底上的情况。
Claims (7)
1.一种配备凸块的电子元件的安装方法,用于把具有多个金属凸块的配备凸块的电子元件安装到具有多个电极的衬底上,包括以下步骤:
将多个金属凸块与多个电极对齐,其中热固树脂夹置在电子元件与衬底之间;
在把超声波振荡、热量和压力施加到配备凸块的电子元件上的同时,将电子元件压在衬底上;和
使所有的多个金属凸块与多个的电极接触,以致于彼此之间电连接,还在多个金属凸块中的一些金属焊接到多个电极时,基本上停止超声波振荡。
2.如权利要求1所述的配备凸块的电子元件安装方法,其中,甚至在已经基本上停止了超声波振荡之后,还持续对配备凸块的电子元件作用热量和所施加的压力。
3.如权利要求1所述的配备凸块的电子元件安装方法,其中,通过与配备凸块的电子元件接触的工具对配备凸块的电子元件作用超声波振荡、热量和所施加的压力。
4.如权利要求1所述的配备凸块的电子元件安装方法,其中,多个的金属凸块为金凸块。
5.如权利要求1所述的配备凸块的电子元件安装方法,其中,在树脂已经被提供到衬底的多个电极上之后,将多个的金属凸块与被树脂覆盖的多个电极对齐。
6.一种配备凸块的电子元件的安装结构,其中,通过在对电子元件施加超声波振荡、热量和压力的同时把带有多个金属凸块的配备凸块的电子元件压到带有多个电极的衬底上,使金属凸块与多个电极接触,以致于彼此之间电连接,并且衬底和电子元件通过热固树脂彼此粘结,
其中,多个金属凸块中的一些经金属焊接连接到电极,而剩余的金属凸块通过其间的接触而电连接到电极上。
7.如权利要求6所述的配备凸块的电子元件安装结构,其中,金属凸块为金凸块。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP414476/03 | 2003-12-12 | ||
JP2003414476A JP4507582B2 (ja) | 2003-12-12 | 2003-12-12 | バンプ付電子部品の実装方法 |
JP414476/2003 | 2003-12-12 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1627493A true CN1627493A (zh) | 2005-06-15 |
CN100382265C CN100382265C (zh) | 2008-04-16 |
Family
ID=34650534
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB200410100227XA Active CN100382265C (zh) | 2003-12-12 | 2004-12-13 | 配备凸块的电子元件的安装方法及其安装结构 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7284686B2 (zh) |
JP (1) | JP4507582B2 (zh) |
KR (1) | KR101093060B1 (zh) |
CN (1) | CN100382265C (zh) |
TW (1) | TW200527565A (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101728289B (zh) * | 2008-10-10 | 2011-12-28 | 哈尔滨工业大学深圳研究生院 | 一种面阵封装电子元件的室温超声波软钎焊方法 |
CN104409370A (zh) * | 2014-11-18 | 2015-03-11 | 南通富士通微电子股份有限公司 | 一种钉头凸点芯片的倒装装片方法及施加装片压力的方法 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7708654B2 (en) * | 2002-05-29 | 2010-05-04 | Acushnet Company | Foam-core golf balls |
US8715110B2 (en) | 2003-05-19 | 2014-05-06 | Acushnet Company | Foam-core golf balls |
JP4863746B2 (ja) * | 2006-03-27 | 2012-01-25 | 富士通株式会社 | 半導体装置およびその製造方法 |
US20130256885A1 (en) * | 2012-04-03 | 2013-10-03 | Conexant Systems, Inc. | Copper Sphere Array Package |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5192015A (en) * | 1991-11-20 | 1993-03-09 | Santa Barbara Research Center | Method for wire bonding |
JP3308855B2 (ja) * | 1997-05-27 | 2002-07-29 | 三菱電機株式会社 | 半導体装置の製造方法 |
JP3176580B2 (ja) * | 1998-04-09 | 2001-06-18 | 太陽誘電株式会社 | 電子部品の実装方法及び実装装置 |
US6926796B1 (en) * | 1999-01-29 | 2005-08-09 | Matsushita Electric Industrial Co., Ltd. | Electronic parts mounting method and device therefor |
JP2001244298A (ja) * | 2000-02-28 | 2001-09-07 | Toshiba Corp | フリップチップ接続方法 |
JP2001298146A (ja) * | 2000-04-13 | 2001-10-26 | Mitsubishi Electric Corp | 多層配線基体の製造方法および多層配線基体 |
JP3491827B2 (ja) * | 2000-07-25 | 2004-01-26 | 関西日本電気株式会社 | 半導体装置及びその製造方法 |
JP2002151551A (ja) * | 2000-11-10 | 2002-05-24 | Hitachi Ltd | フリップチップ実装構造、その実装構造を有する半導体装置及び実装方法 |
BR0105083A (pt) * | 2000-11-17 | 2002-06-25 | Goodyear Tire & Rubber | Composição de borracha leve contendo argila |
JP3891838B2 (ja) * | 2001-12-26 | 2007-03-14 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
JP3721559B2 (ja) * | 2002-03-28 | 2005-11-30 | 東レエンジニアリング株式会社 | チップ実装方法 |
US20070075436A1 (en) * | 2003-10-06 | 2007-04-05 | Nec Corporation | Electronic device and manufacturing method of the same |
-
2003
- 2003-12-12 JP JP2003414476A patent/JP4507582B2/ja not_active Expired - Lifetime
-
2004
- 2004-12-10 US US11/009,451 patent/US7284686B2/en active Active
- 2004-12-10 TW TW093138345A patent/TW200527565A/zh unknown
- 2004-12-13 KR KR1020040104962A patent/KR101093060B1/ko not_active IP Right Cessation
- 2004-12-13 CN CNB200410100227XA patent/CN100382265C/zh active Active
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101728289B (zh) * | 2008-10-10 | 2011-12-28 | 哈尔滨工业大学深圳研究生院 | 一种面阵封装电子元件的室温超声波软钎焊方法 |
CN104409370A (zh) * | 2014-11-18 | 2015-03-11 | 南通富士通微电子股份有限公司 | 一种钉头凸点芯片的倒装装片方法及施加装片压力的方法 |
CN104409370B (zh) * | 2014-11-18 | 2017-06-13 | 通富微电子股份有限公司 | 一种钉头凸点芯片的倒装装片方法及施加装片压力的方法 |
Also Published As
Publication number | Publication date |
---|---|
TW200527565A (en) | 2005-08-16 |
US7284686B2 (en) | 2007-10-23 |
JP4507582B2 (ja) | 2010-07-21 |
KR20050058985A (ko) | 2005-06-17 |
JP2005175250A (ja) | 2005-06-30 |
US20050127141A1 (en) | 2005-06-16 |
KR101093060B1 (ko) | 2011-12-13 |
CN100382265C (zh) | 2008-04-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1197681C (zh) | 超声波振动接合方法 | |
JP2000188308A (ja) | フリップチップボンディングのためのアンダ―フィル処理方法、及び、半導体装置 | |
WO2000045431A1 (en) | Method of packaging semiconductor device using anisotropic conductive adhesive | |
WO2007061125A1 (en) | Electronic component soldering structure and electronic component soldering method | |
US20040087062A1 (en) | Semiconductor device and method of manufacturing the same | |
JP3491827B2 (ja) | 半導体装置及びその製造方法 | |
CN100382265C (zh) | 配备凸块的电子元件的安装方法及其安装结构 | |
JPH11145336A (ja) | バンプ付電子部品の実装構造および実装方法 | |
JP3687280B2 (ja) | チップ実装方法 | |
JP3376861B2 (ja) | バンプ付きワークの実装方法 | |
JP3572254B2 (ja) | 回路基板 | |
JP3419398B2 (ja) | 半導体装置の製造方法 | |
JP3422312B2 (ja) | 半導体装置の実装方法 | |
JPH0774446A (ja) | プリント配線板の接続構造 | |
JP3726795B2 (ja) | バンプ付きワークの実装方法 | |
JPH11288975A (ja) | ボンディング方法及びボンディング装置 | |
JP5858600B2 (ja) | チップ実装方法 | |
JP3347911B2 (ja) | 半導体装置の実装方法 | |
JP2000174066A (ja) | 半導体装置の実装方法 | |
JP3383774B2 (ja) | 半導体素子の実装方法 | |
JP3494048B2 (ja) | バンプ付電子部品の実装構造および実装方法 | |
JP4295517B2 (ja) | 半導体チップの実装構造および半導体チップの実装方法 | |
JP2002343833A (ja) | 半導体実装装置 | |
JP2004235472A (ja) | 半導体装置の製造方法 | |
JP2004128259A (ja) | 接合構造とこの接合構造を備えた電子機器 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |