CN1454394A - Multiphase low dielectric constant material and method of deposition - Google Patents

Multiphase low dielectric constant material and method of deposition Download PDF

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Publication number
CN1454394A
CN1454394A CN00819797A CN00819797A CN1454394A CN 1454394 A CN1454394 A CN 1454394A CN 00819797 A CN00819797 A CN 00819797A CN 00819797 A CN00819797 A CN 00819797A CN 1454394 A CN1454394 A CN 1454394A
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layer
dielectric
heterogeneous
mutually
insulating material
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CN1257547C (en
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艾尔弗雷德·格里尔
维什纽拜·V·帕特尔
斯蒂芬·M·盖茨
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International Business Machines Corp
GlobalFoundries US 2 LLC
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Abstract

A low dielectric constant, multiphase material which can be used as an interconnect dielectric in IC chips is disclosed. Also disclosed is a method for fabricating a multiphase low dielectric constant film utilizing a plasma enhanced chemical vapor deposition technique. Electronic device containing insulating layers of the multiphase low dielectric constant materials that are prepared by the method are further disclosed.

Description

Heterogeneous advanced low-k materials and deposition process thereof and application
Technical field
A kind of heterogeneous material of relate generally to of the present invention with low-k, a kind of method of making the film of this material and comprising the electronic device of this kind film.Especially, the present invention relates to a kind of low-k, heterogeneous material, it is used in the layer back end of line (back-end-of-the-line) among (intralevel) or interlayer (interlevel) dielectric film, cover material or the ULSI (BEOL) the hard mask/polishing stop layer, the method that has the electronic structure of this film and make this film and structure of pin configuration.
Background technology
The size of the electronic device that uses in the ULSI circuit is dwindled has constantly in recent years not only increased layer capacitance, and has increased the resistance of the BEOL coat of metal.Its synthetic effect is the signal delay that has increased in the ULSI electronic device.In order to improve the performance of handoffs of following ULSI circuit, need utilize low-k (k) insulator, particularly the much lower dielectric material of dielectric constant ratio silicon oxide reduces electric capacity.The dielectric material of low k value can obtain from the market, is 2.0 polytetrafluoroethylene (PTFE) a kind of material that comes to this such as the k value.Yet the thermal stability of these dielectric materials under the temperature more than 300~350 ℃ is also bad.This makes and lost efficacy in these dielectric materials are being integrated into the process of ULSI chip, and this ULSI chip need be in the thermal stability under at least 400 ℃.
Considered to comprise and comprised Si, C, the polymer of O, for example methylsiloxane, methyl sesquichloride and other organic and inorganic polymers at the low-k materials that the ULSI device uses.Such as being published in Mat.Res.Soc.Symp.Proc. at N.Hacker etc., the material that is described in vol.476 (1997) P25 " Properties of new low dielectric constant spin-on silicon oxide baseddielectrics " just satisfies this thermal stability requirement, even like this, when utilizing spin coating (spin-on) technology to prepare film to connect in (interconnect) structure desired thickness in being integrated into, crackle is easy to propagate in this material.Further, this early stage material price costliness, and be difficult to realize large-scale production.Opposite with this situation is that the manufacturing step of most of VLSI and ULSI chip is all realized by plasma enhanced chemical or physical vapor deposition techniques.Utilize existing processes equipment to make low-k materials and can simplify in process of production that it is integrated, reduce production costs, and produce still less harmful waste by the PECVD technology.Quoting one here is transferred to identical with the present invention same awarding and allows the people's be used as reference for unexamined patent application (sequence number 09/107,567).This application has been described a kind of Si of containing, and C, the dielectric constant of O and H atom are not higher than 3.6 and advanced low-k materials with very low crack propagation velocity.The dielectric constant that further reduces this material will further improve the performance of the electronic device that comprises this material.
Therefore, one object of the present invention just provide a kind of comprise two or more heterogeneous, have an advanced low-k materials that is no more than 3.2 dielectric constant.
Another object of the present invention provides a kind of method of making heterogeneous material of the present invention.
The object of the invention provides a kind of method of making heterogeneous material in addition; Wherein, first of this material is a silicon hydroxide carbon film (comprise Si, C, O and H therefore are called SiCOH) mutually, and at least one second mainly comprises C and H atom mutually.
Purpose of the present invention prepares a kind of heterogeneous material that comprises the nanoscale hole in addition.
Purpose of the present invention prepares a kind of dielectric constant in addition and hangs down 10% heterogeneous material at least than single-phase SiCOH dielectric material.
Purpose of the present invention provides a kind of in addition and utilizes the previous previous mixture that comprises two kinds or the first body molecule of more differences to make the method for low-k, heat-staple heterogeneous film.
A further object of the invention provides a kind of the enhancing parallel-plate plasma and makes the method that comprises two or more heterogeneous low dielectric constant material in the CVD (Chemical Vapor Deposition) chamber.
A further object of the invention provides a kind of method that comprises two or more heterogeneous low dielectric constant material of utilizing rotating plasma to strengthen to make in the CVD (Chemical Vapor Deposition) chamber.
A further object of the invention provides in a kind of electronic structure of the BEOL of being manufactured on interconnect structure as in the layer or the method for the heterogeneous material of interlayer dielectric layer.
A further object of the invention provides the low and dielectric constant of a kind of internal stress and is not higher than 3.2 heterogeneous material.
A further object of the invention provides in a kind of BEOL of being included in line structure as in the layer or the insulation material layer of interlayer dielectric, and wherein at least one deck insulating material be a kind of electronic structure of heterogeneous material.
A further object of the invention provides in a kind of BEOL of being included in line structure as in the layer or the insulation material layer of interlayer dielectric, and wherein having a dielectric cap rock at least is to be made of different materials, and as the hard mask of a reactive ion etching, the electronic structure of a polishing stop layer or a diffusion barrier.
Summary of the invention
According to the present invention, a kind of comprise two or more heterogeneous novel dielectric material have been proposed, wherein first mutually for to be made of SiCOH.This invention further provides a kind of and comprised Si by making in plasma enhanced chemical vapor deposition chamber, C, a kind of first precursor gas of O and H and at least a C, the H of mainly comprising, with optional F, the second precursor gas precursor reactant of N and O is made the method for this heterogeneous material.The present invention also provides in a kind of BEOL of being included in linear structure as in the layer or the electronic structure of the insulation material layer of interlayer dielectric.
In a preferred embodiment, a kind of method of making the two-phase film has been described.First is made of the hydroxide silicon-carbon in this two-phase film, and second mutually mainly by C and H atomic building.The step of implementing this method is: at first, a plasma enhanced chemical vapor deposition chamber is provided, electronic structure is inserted in the settling chamber, to contain Si, C, first precursor gas of O and H atom is injected this settling chamber, to contain C, H and optional F, the second precursor gas mixture of N and O atom injects in the settling chamber, and deposits one deck two-phase film on substrate.Also the film that deposition can be obtained carries out at least 0.25 hour heat treatment being not less than under 300 ℃ the condition.This method can also comprise following steps: provide one to have area between 300cm 2And 700cm 2The substrate chuck of conductive region, and, substrate to the 1cm of top electrodes to the gap between the 10cm.Apply RF power therein at least one.Substrate can be placed on the electrode that has applied power or on the electrode of ground connection.
Employed this first presoma can be from comprising Si at least, and C selects in the molecule of some in O and the H atom.The oxidation molecule is such as O 2And N 2O be introduced in this first presoma.Preferably, this first presoma is selected from the molecule with loop configuration, as methyl-monosilane and such as O 2And N 2Oxidants such as O are composite 1,3,5,7-tetramethyl-ring tetrasiloxane (TMCTS or C 4H 16O 4Si 4), tetraethyl cyclotetrasiloxane (C 8H 24O 4Si 4), the last of the ten Heavenly stems methyl cyclotetrasiloxane (C 10H 30O 5Si 5), perhaps comprise Si, the mixture of the presoma of O and C.This presoma as gas by direct transmission transport to reactor, as directly transmission or transport in reactor of gasified liquid, such as helium or argon by inert carrier gas.This precursor mixture can also comprise such as nitrogen, elements such as fluorine and germanium.
Employed this second precursor gas mixture can be selected from the molecule that comprises C and H atom at least.Alternatively, O, N or F atom can be involved in this molecule, and the molecule that perhaps comprises these atoms be introduced in this precursor mixture.In one embodiment, this second presoma from one group by circulus, and comprise C, select in the molecule of H atom, such as ring hydrocarbon, cyclic alcohol, cyclic ethers, ring aldehyde, cyclic ketones, cyclic ester, phenol, ring (or dicyclo [2..1.] heptan-2, the 5-diene), norborene 2,5-norbornadiene (or dicyclo [2.2.1] heptan-2, the 5-diene), norbornane (or dicyclo [2.2.1] heptane).Other example also has three ring [3.2.1.0] octanes, spiral shell [5.6] decane and similar material.Perhaps, also can use ring hydrocarbon (pentamethylene, cyclohexane and similar substance) that comprises 5-12 carbon atom or the aromatic cyclic hydrocarbon (benzene, toluene, dimethylbenzene and similar substance) that comprises 6-12 carbon atom.Alternatively, O or F atom also can be contained in this molecule, and the molecule that perhaps contains these atoms be introduced in the precursor mixture.
In another embodiment, introduce a kind of manufacturing and comprised the method that hydroxide silicon-carbon, second mainly comprises the two-phase film of C and H atom mutually.The concrete grammar step is for providing a parallel-plate settling chamber; Electronic structure is inserted the settling chamber; A remote plasma source is provided; Injection comprises Si, C, and first precursor gas of O and H atom and is injected in the settling chamber through the source in plasma source; Directly will comprise C, second kind of admixture of gas of H and optional O atom is injected in the settling chamber; The heterogeneous film of deposition on substrate.
In another embodiment, a kind of heterogeneous film has been described.The preparation method of this heterogeneous film is identical with the operation of preparation two-phase film above-mentioned, but comprises C, H and optional F, and second precursor gas of N and O is made of two kinds of molecules at least.Comprise at least a above-mentioned toroidal molecule and from by alkane such as, this mixture, alkene, alkynes, ether, alcohol, ester, ketone, aldehyde, amine, perhaps other comprise O, at least a molecule of selecting in a group that the acyclic hydrocarbon of N or F constitutes.
The deposition of heterogeneous material of the present invention comprises that also step is set in underlayer temperature between about 25 ℃ to about 400 ℃, is arranged on about 0.02W/cm with the RF power density 2To about 5.0W/cm 2Between, first precursor flow rate is arranged on about 5sccm between about 1000sccm, the flow velocity of first kind of gas in second presoma is arranged on about 5sccm between about 1000sccm, the flow velocity of second kind of gas in second presoma is arranged on about 5sccm between about 1000sccm, air pressure in the settling chamber is arranged on about 50m Torr between about 10Torr, and the DC bias voltage is arranged on about 0VDC between the pact-400VDC.
The present invention has also drawn a kind ofly to has in comprising pretreated Semiconductor substrate BEOL interconnection structure as in the layer or the electronic structure of the insulation material layer of interlayer dielectric.This BEOL structure has first metal area that embeds the ground floor megohmite insulant, embedding comprises first conductor region of the second layer insulating material of heterogeneous material, this second layer insulating material forms tight the contact with this ground floor insulating material, this first conductor region forms with this first metal area and is electrically connected, form second conductor region that point is connected and embeds the three-layer insulated material that comprises heterogeneous material with this first metal area, wherein this three-layer insulated material forms the tight dielectric cap rock that contacts with second layer insulating material, and also can comprise a dielectric cap rock between second layer insulating material and three-layer insulated material, and one second dielectric layer that is positioned at three-layer insulated material top.
The optional autoxidation silicon of this dielectric cap layer material, silicon nitride, silicon oxynitride, refractory metal silicon nitride (this refractory metal is Ta, Zr, Hf or W), carborundum is selected in silicon oxide carbide and their hydrogen-containing compound.This first and second dielectrics cap rock can be selected from identical with dielectric material one group.The ground floor insulating material can be the various doping of silica, carborundum or these materials, such as PSG or BPSG.This electronic structure can further include the diffusion impervious layer by forming at least one in a kind of dielectric deposition to the second or the three-layer insulated material.This electronic structure can also comprise that one is positioned at second layer insulating material top last dielectric layer and a dielectric diffusion barriers layer that is positioned on the hard mask of RIE/polishing stop layer top as the hard mask of RIE/polishing stop layer.This electronic structure can further include the hard mask of the first a dielectric RIE/polishing stop layer that is positioned at second layer insulating material top, a first dielectric RIE diffusion impervious layer that is positioned at ground floor dielectric polishing stop layer top, the hard mask of the second a dielectric RIE/polishing stop layer and second a dielectric RIE diffusion impervious layer that is positioned at second layer dielectric polishing stop layer top that is positioned at three-layer insulated material top.This electronic structure can further include an identical dielectric cap rock with previous materials between heterogeneous interlayer dielectric material and heterogeneous interlayer dielectric material.
Description of drawings
Above-mentioned and other purpose of the present invention, feature and advantage will become apparent by following detailed description and attached becoming.
Fig. 1 is the sectional view of parallel-plate CVD (Chemical Vapor Deposition) chamber among the present invention.
Fig. 2 A is the amplification sectional view of binary phase materials among the present invention.
Fig. 2 B is the illustrative of the covalent structure at random of first phase in the binary phase materials of the present invention.
Fig. 3 is the amplification sectional view of three phase materials among the present invention.
Fig. 4 is FTIR (multiple sharp leaf transformation is an infrared) spectrum of utilizing the single-phase SiCOH film that the mixture deposition of tetramethyl-ring tetrasiloxane (TMCTS) and helium obtains.
Fig. 5 utilizes TMCTS+He and 2, the FTIR spectrum of the binary phase materials of the present invention that the mixture deposition of 5-norbornadiene (or dicyclo [2.2.1] heptan-2,5-diene) obtains.
Fig. 6 has in the layer that is made of heterogeneous material and the electronic device amplification sectional view of interlayer dielectric layer among the present invention.
Fig. 7 has the amplification sectional view that the added diffusion that is deposited on the heterogeneous material top stops the electronic structure of dielectric cap rock among Fig. 6 of the present invention.
Fig. 8 is the amplification sectional view that has the electronic structure of the hard mask of an additional RIE/polishing stop layer dielectric cap rock that is deposited on the polishing stop layer top and a dielectric cap rock diffusion impervious layer among Fig. 7 of the present invention.
Fig. 9 has the amplification sectional view that the hard mask of the additional RIE that is deposited on the heterogeneous material top/polishing stops the electronic structure of dielectric layer among Fig. 8 of the present invention.
Embodiment
The invention discloses and a kind ofly have the novel heterogeneous material of low-k, and the method for preparing the film of this material.Disclosed in a preferred embodiment material comprises two-phase at least, and wherein first mutually for a kind of Si that is included in the covalency keyed jointing network, and C, O and H and dielectric constant are not more than " main (host) " matrix of a kind of hydroxide silicon-carbon (SiCOH) material of 3.6.Another of material of the present invention mainly comprises C and H atom mutually.This heterogeneous material also can comprise the hole of molecular scale, such as diameter greatly between 0.5 to 20 nanometer.The invention also discloses a kind of method that in a parallel-plate plasma strengthens CVD (Chemical Vapor Deposition) chamber, prepares a kind of heterogeneous material.Can use to comprise Si C, O and H atom and optionally have first precursor gas of molecule of loop configuration and second precursor gas or the admixture of gas that comprises one or more molecules that are made of carbon and hydrogen atom forms this heterogeneous film.The heterogeneous film of low-k among the present invention can also reduce its dielectric constant being not less than the heat treatment that is no less than 0.5 hour under 300 ℃ the environment.
In this heat treatment step, pyrolysis can take place and can be converted into littler molecule in the molecule fragment that derives from second precursor gas (perhaps admixture of gas) that mainly comprises carbon and hydrogen atom, discharges from film.Alternatively, utilize this molecule fragment to transform and dispose procedure, in film, hole may further develop.Therefore the density of film can reduce.
The invention discloses a kind of preparation and comprise two kinds or more heterogeneous, have low-k,, be suitable for being integrated in the method for the material in the BEOL pin configuration such as being lower than 3.2.The mould of PECVD reactor 10 preparations that are used to process the 200mm wafer is shown.Gas precursor (GDP) 14 is introduced in the reactor 10 by the gas distribution grid (gas distribution plate) that separates with substrate chuck 12,, and can be drawn out of by air pump port one 8.RF power 20 is connected on the substrate chuck 12 and is transferred on the substrate 22.For the practical application purpose, the equal ground connection of all other reactor parts.Therefore substrate 22 has obtained a back bias voltage, and its size depends on the physical dimension and the plasma parameter of reactor.In a different embodiment, RF power 20 can be added on the GDP14 with settling chamber's electrical insulation, and with substrate chuck 12 ground connection.In another embodiment, can use more than the power supply of one power supply.Such as two power supplys that can under identical RF frequency, move, perhaps one can under low frequency, move, two RF power supplys that one can be moved under high frequency.These two power supplys can be connected on the same electrode or be connected on the discrete electrode.In another embodiment, in deposition process the RF power supply can by pulsed open and close.Controlled parameter has pressure and the underlayer temperature in RF power, precursor mixture and flow velocity, the reactor in the deposition process of low-k film.Be to utilize first presoma (TMCTS) and a kind of second presoma 2 below, the 5-norbornadiene (is also referred to as dicyclo [2.2.1] heptan-2,5-diene, perhaps BCHD) obtain first embodiment of the deposition of film of the present invention.In this embodiment, the utilization of TMCTS precursor vapor is transferred in the middle of the reactor as the He of carrier gas.Alternatively, the heat treatment of after deposition is finished film being carried out under 400 ℃ reduces k.
With reference now to Fig. 2,, this amplification sectional view shows is binary phase materials among the present invention.It first 31 is a kind of Si of comprising mutually, C, O and H hydroxide silicon-carbon (SiCOH) material " master " matrix in a kind of covalency keyed jointing network, and have and be not more than 3.6 dielectric constant.What Fig. 2 B showed is the covalency keyed jointing network configuration of this first phase.
With reference now to Fig. 2 B,, concealed wire is represented Si, C, the covalent bond between O and the H atom.This is a random network, so there is not basic repetitive in the structure.Hydrogen atom is represented with H, is labeled as 1.Oxygen atom in the network is represented with O, is labeled as 2.Carbon atom in the network is represented with C, is labeled as 3.Silicon atom in the network is expressed as the intersection point of four lines, is labeled as 4.Oxygen atom 2 is between two C atoms or Si atom.Be arranged in material of the present invention first mutually be second mutually 32 of material of the present invention.This second mainly comprises C and H atom mutually.This heterogeneous material further can also comprise a plurality of pore of nanometer, such as diameter greatly between 0.5 to 200 nanometer.The covalency keyed jointing network configuration of this first phase, or " master " matrix are shown in Fig. 2 B.
With reference to Fig. 3, the sectional view of this amplification shows is three phase materials among the present invention.It first 33 is a kind ofly to comprise Si, C, O and H in covalency keyed jointing network mutually, and dielectric constant is not more than " master " matrix of 3.6 silicon hydroxide material with carbon element (SiCOH).The structure of its first phase is shown in Fig. 2 B.First inner mutually be second mutually 34 and the third phase 35 of material of the present invention of material of the present invention.This second mainly comprises C and H atom mutually, and a large amount of nano-scales are arranged, as diameter greatly between 0.5 to 200 nanometer, hole.
This third phase 35 can be the room (open region) that forms owing to the existence of " visitor (guest) " molecule in the matrix.This room can be that the existence of enclosed molecule is introduced, and has destroyed the space of the random network (Fig. 2 B) of first phase of heterogeneous material of the present invention.Perhaps, this third phase comprises C and H atom, and has a large amount of pore of nanometer.The size of this hole can be bigger than the pore-size in the two-phase thing.Specifically, the pore diameter in the third phase is between 0.5 to 100nm.
Embodiment 1
In the present embodiment, in the film deposition process, use a kind of plasma with continuous mode.This admixture of gas comprises that by flow velocity be the mixture that the TMCTS+He of 30sccm and BCHD that flow velocity is 3sccm form.Pressure in the reactor remains 500m Torr.Substrate is placed on the powered electrode, and the RF power that adds on the electrode is 15W, and frequency is 13.56MHz.Substrate obtains-17VDC from (self) back bias voltage.Therefore the dielectric constant at this film of this sedimentary condition deposit is k=3.13.400 ℃ carry out 4 hours annealing after, the dielectric constant of this film is k=2.91.
The result of first embodiment is discussed referring now to Figure 4 and 5.Fig. 4 is the multiple sharp leaf transformation of a typical SiCOH film infrared (FTIR) spectrum.This spectral line is presented at 1000-1100cm -1There is a strong Si-O absorption band at the place, at 1275cm -1A Si-CH is arranged 3Absworption peak is at 2150-2250cm -1A Si-H absorption band is arranged, at 2900-3000cm -1The weak absworption peak of a C-H is arranged.In table 1, contrasted CH in the SiCOH film, SiH and Si-CH 3The peak-to-peak relative intensity of peak and SiO.
Fig. 5 is the FTIR spectrum of heterogeneous film of utilizing the mixture preparation of (TMCTS+He)+BCHD.As Fig. 4, this spectral line has shown Si-O, Si-CH3, the absworption peak of Si-H and C-H.Yet heterogeneous film is at 2900-3000cm -1Strong a lot of than the SiCOH film that shows among Fig. 4 of the intensity of C-H absorption band.CH in this film, SiH and SiCH kind have been contrasted at table 1 3The peak-to-peak relative intensity of peak and SiO.As can be seen from the table, the integral area at heterogeneous film C-H peak is 40% of a Si-CH3 peak integral area, and have only the SiCOH film the Si-CH3 peak integral area 2%.This clearly illustrates that heterogeneous film except the SiCOH phase, also a considerable amount of secondary CHx of tool (hydrocarbon) phase.The splitting at Si-O peak in the collection of illustrative plates of this heterogeneous material film that another evidence that has the secondary phase is Fig. 5.
Table one FTIR absworption peak relative integral density
Material ?CH/SiO(%) ?SiH/SiO(%) ?SiCH/SiO(%)
???SiCOH ????2 ????8 ????6
Heterogeneous material ????40 ????6 ????3
Embodiment 2
In this embodiment, in the film deposition process, use plasma with continuous mode.This admixture of gas comprises that flow velocity is the mixture of the TMCTS+He of 30sccm and the BCHD formation that flow velocity is 1sccm.Pressure in the reactor remains 500m Torr.Substrate is placed on the powered electrode, and the RF power that adds on the electrode is 6W, and frequency is 13.56MHz.Substrate obtains-25VDC from back bias voltage.Dielectric constant k=2.82 at this film of this sedimentary condition deposit.After carrying out 4 hours annealing under 400 ℃, the dielectric constant of this film is k=2.81.
Embodiment 3
In this embodiment, in the film deposition process, use plasma with pulse mode.For example each cycle period ionic medium body is opened 18ms, and plasma is closed 182ms.Other condition is identical with embodiment 2.
Embodiment 4
In this embodiment, in the film deposition process, use plasma, use different trimethyl silane presomas simultaneously with continuous mode.Pressure in the reactor remains 200m Torr.Substrate is placed on the powered electrode, and the RF power that adds on the electrode is 9W, and frequency is 13.56MHz.Substrate obtains-200VDC from back bias voltage.The principal phase that so deposits the two-phase film that obtains comprises Si, C and H, but there is not O.
Embodiment 5
In this embodiment, the similar method of the method for describing in use and the example 1 prepares heterogeneous film, and unique difference is that the acyclic hydrocarbon of extra tertbutyl ether (TEB) is added in the middle of the admixture of gas.Zhi Bei film comprises a SiCOH matrix like this, CHx with CH ring structure mutually with a CHy with CH line structure mutually.If ring-type hydrocarbon precursor compound body comprises the phenol ring, then the CHx in the film comprises aromatic series CH structure mutually.
New material among the present invention comprises two kinds or more heterogeneous.This first phase constituent comprises Si, C, O and H atom.Suitable concentrated scope can be selected from following data easily: the Si between about 40 atomic percents of about 5-(atomic percent), C between about 45 atomic percents of about 5-, O between about 50 atomic percents of about 0-, the H between about 55 atomic percents of about 10-.It should be noted that when the atomic percent of O is 0, will produce kin SiCH synthetic, therefore also can be used as synthetic of the present invention and use with SiCOH.For example, the film of first phase of introducing among the embodiment 4 that comprises the SiCH that does not have oxygen.This SiCH film can be by comprising Si to the indoor injection of plasma reinforced chemical vapour deposition, and the method deposition of the precursor gas of C and H obtains.Second phase constituent comprises C, H and optional F and O atom.Suitable concentrated scope can be selected from following data easily: the C between about 45 atomic percents of about 90-, the H between about 55 atomic percents of about 10-.Material of the present invention also comprises the hole that is dispersed in the molecular dimension in the heterogeneous material.Material synthetic of the present invention also can comprise at least a as F, and the element of N or Ge produces the result who similarly needs simultaneously.
As above the feature of the FTIR of Chen Ji film spectrum is similar to situation as shown in Figure 5.This spectral line has at 1000-1100cm -1A strong Si-O absorption band at place is at 1275cm -1A Si-CH at place 3Absworption peak is at 2150-2250cm -1A Si-H absorption band at place is at 2900-3000cm -1A strong C-H absorption band at place.CH in the SiCOH film, SiH and SiCH kind have been contrasted at table 1 3The peak-to-peak relative intensity of peak and SiO.The relative intensity of absworption peak can change along with the change of sedimentary condition and precursor gas.The absorption band of SiO can turn to by deconvolution and be positioned at 1070cm -1And 1030cm -1Two discrete peaks.Wherein first peak shows and has a kind of nanoporous (nanoporous), Si-O cagelike structure.The ratio (40% of C-H peak integral area and Si-CH3 peak integral area in the heterogeneous film, as shown in table 1) with the SiCOH film in numerical value only be that this ratio of 2% forms sharp contrast, it clearly illustrates that in the heterogeneous film and also comprises a large amount of secondary CHx (hydrocarbon) phase mutually except SiCOH.
Other gas, such as Ar, H 2And N 2Can be used as transport gas.If this presoma has enough strong vapour pressure, then without any need for transport gas.The another kind of method that liquid precursor is transferred in the plasma reactor is to utilize liquid transmission system.Adjust the character of low-k film if desired, nitrogen, hydrogen, germanium or the fluorine that contains gas can be joined in the mist in the reactor.Thereby just can contain such as Ge the atom of N and F in the heterogeneous film.
If desired, the heterogeneous film that deposition can also be obtained is before carrying out integrated technique, and by the size of evaporation residue volatile component and stabilising membrane, perhaps just the size of stabilising membrane is adjusted in addition.This process for stabilizing is set between 300 ℃ to 400 ℃ by the temperature in stove, and the annealing of time between 0.25 hour to 4 hours realizes.This process for stabilizing can also be realized by the rapid thermal anneal process more than 300 ℃.Utilize the dielectric constant of the heterogeneous film that new technology of the present invention obtains not to be higher than 3.2.Utilize the thermal stability of the heterogeneous film that technology of the present invention obtains to reach 350 ℃ at least.
Utilize heterogeneous film dielectric constant k<3.2 of prepared of the present invention, and in the BEOL interconnection structure integrated technique of typical temperature, can show good thermal stability up to 400 ℃.And this heterogeneous film has low-down crack growth rate (crack propagation) in water, such as being lower than 10 -9M/s even 10 -11M/s.Therefore, new material of the present invention and technology can be applied to simply as in the layer of the BEOL that is used for logic and memory spare and in the middle of the production of the heterogeneous film of interlayer dielectric material.
The electronic device that is to use novel method of the present invention to obtain of expression among Fig. 6-9.It is pointed out that just several embodiment of the inventive method of Fig. 6-9 expression, and in fact other device of countless versions can obtain by novel method of the present invention.
What represent in Fig. 6 is an electronic device 30 that is based upon on the silicon substrate 32.On silicon substrate 32 tops, at first made an insulation material layer 34 that is embedded with first metal area 36 therebetween.After first metal area 36 has passed through the CMP PROCESS FOR TREATMENT, deposit one deck heterogeneous film 38 of the present invention at this ground floor insulating material 34 with above first metal area 36.Ground floor insulating material 34 can be suitably by silica, silicon nitride, and the various doping of these materials or any other suitable insulation material are suitably made.Utilize photoetching process that heterogeneous film 38 is formed figure then, and deposit one deck conductor layer 40 in the above.After first conductor layer 40 has passed through the CMP PROCESS FOR TREATMENT, use plasma enhanced chemical vapor deposition technology to cover one second heterogeneous rete 44 at the first heterogeneous film 38 with above first conductor layer 40.Conductor layer 40 can be obtained by metal material or non-metallic conducting material deposition.Such as this metal material can be aluminium or copper, and these nonmetallic materials can be nitride or polysilicon.First conductor layer 40 forms with first metal area 36 and is electrically connected.
After the photoetching process of carrying out on the second heterogeneous rete 44 was finished, the depositing operation by second conductor material formed second conductor region 50.Second conductor region 50 also can be obtained by metal material or nonmetal conductor material deposition, and is similar with the deposition process of first conductor layer 40.Second conductor region 50 forms with first conductor region 40 and is electrically connected, and embeds in the second heterogeneous separator 44.The heterogeneous film of the second layer forms with ground floor insulating material 38 and closely contacts.In this embodiment, the heterogeneous insulating material 38 of ground floor is dielectric materials in a kind of layer, and this second layer insulating material, such as heterogeneous film 44 be in the layer dielectric material be again interlayer dielectric material.Based on the low-k of heterogeneous film, utilize first insulating barrier 38 and second insulating barrier 44 can obtain outstanding insulating property (properties).
Fig. 7 shows be with Fig. 6 in electronic device 30 similar electronic devices 60 of the present invention, just have the dielectric cap rock 62 of additional one deck between first insulation material layer 38 and second insulation material layer 44.This dielectric cap rock 62 can be suitably by silica, silicon nitride, silicon oxynitride, refractory metal silicon nitride (this metal is Ta, Zr, Hf or W), and carborundum, silicon oxide carbide (SiCO) and their hydrogen-containing compound form.The function of the dielectric cap rock 62 that this is extra is to stop first conductor layer 40 to diffuse into second insulation material layer 44 or enter lower layer as diffusion impervious layer, particularly enters 34 layers and 32 layers.
Fig. 8 illustrates the electronic device 70 of another alternative of the present invention.In electronic device 70, two extra dielectric cap rocks 72 and 74 have been adopted as RIE mask and CMP (chemico-mechanical polishing) polishing stop layer.The first dielectric cap rock 72 is deposited on the top of the first heterogeneous insulation material layer 38, as the RIE mask.The CMP technology that second dielectric layer 74 is utilized for the first conductor layer complanation provides a terminating point.Polishing stop layer 74 can suitably utilize silica, silicon nitride, silicon oxynitride, refractory metal silicon nitride (this refractory metal is Ta, Zr, Hf or W), and carborundum, silicon oxide carbide (SiCO) and their hydrogen-containing compound obtain through deposition.The upper surface of dielectric layer 72 and first conductor layer 40 are in same plane.Can on the top of the second heterogeneous insulation material layer 44, increase by second dielectric layer 74 and reach same purpose.
Fig. 9 is another alternative electronic device 80 of the present invention.In this alternative, deposited extra dielectric materials layer 82 second insulation material layer 44 is divided into two discrete layers 84 and 86.Therefore the interior and interlayer dielectric layer 44 of the layer that forms by heterogeneous material among Fig. 8 passage 92 and in the boundary that connects between (interconnect) 94 be divided into a layer inner-dielectric-ayer 84 and an interlayer dielectric layer 86.Extra diffusion impervious layer 96 also is deposited on the top of upper dielectric layer 74.The additional advantage of this alternative electronic structure 80 is can provide as the dielectric layer 82 that the RIE etching stops and connects degree of depth control in outstanding.
Another alternative can comprise having as in the layer of the pin configuration that comprises the Semiconductor substrate of anticipating or a kind of electronic structure of the insulating material of interlayer dielectric.This electronic structure comprises: first metal area that embeds the ground floor insulating material; Embed first conductor region of second layer insulating material, wherein, the insulating material in this second layer insulating material forms tight the contact with the ground floor insulating material; And first conductor region forms with first metal area and is electrically connected; Second conductor region and first conductor region form and are electrically connected, and quilt and embedding in the three-layer insulated material, and wherein this three-layer insulated material forms tight the contact with this second layer insulating material; One first dielectric cap rock is between second layer insulating material and three-layer insulated material; One second dielectric cap rock is positioned on the three-layer insulated material top; Wherein first second dielectric cap rock is by comprising Si, C, and the material of O and H atom perhaps preferably contains multi-phase components.
Another alternative of the present invention comprises having as in the layer of the pin configuration that comprises the Semiconductor substrate of anticipating or a kind of electronic structure of the insulating material of interlayer dielectric.This electronic structure comprises: one first metal area that embeds a ground floor insulating material; Embed one first conductor region that forms tight one second insulation material layer that contacts with this first insulation material layer, this first conductor region forms with this first metal area and is electrically connected; Form one second conductor region that is electrically connected and is embedded into one the 3rd insulation material layer with this first conductor region, the 3rd insulation material layer forms tight the contact with this second insulation material layer; Be deposited on this second and three-layer insulated material at least one, by comprising Si, C, the diffusion impervious layer that the heterogeneous material of O and H atom constitutes.
Another alternative comprises having as in the layer of the pin configuration that comprises the Semiconductor substrate of anticipating or a kind of electronic structure of the insulating material of interlayer dielectric.This electronic structure comprises: embed one first metal area in one first insulation material layer; Embed one first conductor region that forms tight one second insulation material layer that contacts with this first insulation material layer, this first conductor region forms with this first metal area and is electrically connected; Be electrically connected with this first conductor region formation, and be embedded into one second conductor region of one the 3rd insulation material layer, the 3rd insulation material layer forms tight the contact with this second insulation material layer; Be positioned at the hard mask of a reactive ion etching (the RIE)/polishing stop layer on this second insulation material layer top; And, be positioned at the diffusion impervious layer on the hard mask of this RIE/polishing stop layer top, wherein the hard mask of this RIE/polishing stop layer and this diffusion impervious layer are by comprising Si, C, the heterogeneous material formation of O and H atom.
Another alternative comprises having as in comprising the linear structure internal layer of the Semiconductor substrate of anticipating or a kind of electronic structure of the insulating material of interlayer dielectric.This electronic structure comprises: one first metal area that embeds one first insulation material layer inside; Embed one first conductor region that forms tight one second insulation material layer that contacts with this first insulation material layer; Be electrically connected with this first conductor region formation, and be embedded into one second conductor region of one the 3rd insulation material layer, the 3rd insulation material layer closely contacts with this second insulation material layer; Be positioned at the hard mask of one the one RIE/polishing stop layer on this second insulation material layer top; Be positioned at one first diffusion impervious layer on the hard mask of this first dielectric RIE/polishing stop layer top; Be positioned at the hard mask of the one second dielectric RIE/polishing stop layer on this three-layer insulated material top; And, be positioned at one second diffusion impervious layer on the hard mask of this second dielectric RIE/polishing stop layer top, wherein the hard mask of this RIE/polishing stop layer and this diffusion impervious layer are by comprising Si, C, the heterogeneous material formation of O and H atom.
Another alternative of the present invention comprises an a kind of electronic structure with multi-layer insulation of or interlayer dielectric interior as the layer of pin configuration, this structure is similar to aforementioned structure, this structure also comprises by comprising Si, the dielectric cap rock between an interlayer dielectric layer and layer inner-dielectric-ayer that C, the heterogeneous material of O and H atom constitute.
By above description and with reference to accompanying drawing 1 to 9, the electronic structure that describes novel method of the present invention in detail and utilize this method to prepare.The embodiments of the invention that it is emphasized that Fig. 6-9 expression just are used for new method of the present invention is described, and this method can be used to make in the middle of the various electronic devices.
It is to be noted that the description of this invention is an illustrative, all terms all are not have any limitation according to the purpose of description use.
In addition, though explanation of the present invention carry out according to preferred and indivedual alternatives,, fairly obvious, those skilled in the art can be applied to others with present technique.
Therefore, scope of the present invention should be as the criterion with claims.

Claims (60)

1. the dielectric material with two or more phases comprises
One first phase mainly comprises Si, C, O and H; And
At least a second phase, be dispersed in described first mutually in, described at least a second mainly comprises C mutually, H and a large amount of pore of nanometer, described dielectric material has and is no more than 3.2 dielectric constant.
2. according to a kind of dielectric material of claim 1, it is characterized in that described first is a kind of Si-O of comprising mutually, Si-C, the covalent bond structure of Si-H and c h bond.
3. according to a kind of dielectric material of claim 1, it is characterized in that, at least a second is a kind of covalent bond structure that comprises c h bond mutually, described at least a second phase, by described at least a second the C atom and described first the Si in mutually in mutually, C and the interatomic covalent bond of O and the described first covalency keyed jointing mutually.
4. according to a kind of dielectric material of claim 1, it is characterized in that described at least a second of the c h bond that comprises with covalent bond structure is surrounded mutually by described first.
5. according to a kind of dielectric material of claim 1, it is characterized in that, a heterogeneous material by with described first mutually with described at least a second mutually covalent bond be connected into three-dimensional network and form.
6. according to a kind of dielectric material of claim 1, it is characterized in that described first comprises about 5 Si to about 40 atomic percents mutually; About 5 C to about 45 atomic percents; 0 O to about 50 atomic percents; And about 10 H to about 55 atomic percents.
7. according to a kind of dielectric material of claim 1, it is characterized in that described at least a second comprises about 45 C to about 90 atomic percents mutually, and about 10 H to about 55 atomic percents.
8. according to a kind of dielectric material of claim 1, it is characterized in that, the diameter of described a large amount of pore of nanometer at about 0.5nm between about 100nm.
9. according to a kind of dielectric material of claim 1, it is characterized in that, the diameter of described a large amount of pore of nanometer preferably at about 0.5nm between about 20nm.
10. according to a kind of dielectric material of claim 1, it is characterized in that described a large amount of pore of nanometer occupy about 0.5% to about 50% of described material cumulative volume.
11. a film that is formed by the dielectric material according to claim 1 is characterized in that the thickness of described film is no more than 1.3 microns, and the crack growth rate in the water is less than 10 -9M/s.
12. a kind of film according to claim 11 is characterized in that the crack growth rate in the described water is preferably less than 10 -10M/s.
13. the synthetic according to the dielectric material of claim 1 is characterized in that, is replaced by the Ge atom to the described Si atom of small part.
14. the synthetic according to the dielectric material of claim 1 also comprises and is selected from F, at least a element in the group that N and Ge constitute.
15. a method of making heterogeneous film having low dielectric constant comprises step:
A plasma enhanced chemical vapor deposition (PECVD) chamber is provided;
A substrate is placed in the described chamber;
Inject and mainly to contain Si and by C, O, one first precursor gas of at least two kinds of elements selecting in the group that Hl constitutes is in described PECVD chamber;
Inject at least a second precursor gas of the molecule that mainly comprises carbon containing and hydrogen, described at least a second precursor gas is mixed with a kind of inert carrier gas alternatively; And
Deposition comprises and mainly contains Si on described substrate, C, and one first of O and H contains C mutually and mainly, H and at least a second mutually the heterogeneous film of nano-scale holes in a large number.
16. the method according to claim 15 is characterized in that, described plasma-enhanced vapor deposition chamber is the plasma reactor of a parallel-plate-type.
17., also comprise with the step of continuous mode at the described heterogeneous film of the indoor deposition of described PECVD according to the method for claim 15.
18., also comprise with the step of pulse mode at the described heterogeneous film of the indoor deposition of described PECVD according to the method for claim 15.
19., comprise that also the condition of regulating this plasma is to minimize the step of decomposition of this second precursor molecule according to the method for claim 15.
20., also comprise described film is being not less than the optional step of heat-treating under 200 ℃ the condition according to a kind of method of making heterogeneous film having low dielectric constant of claim 15.
21. a kind of method according to claim 15 is characterized in that, described at least a second precursor gas comprises the molecule with loop configuration.
22. a kind of method according to claim 15 is characterized in that, described first precursor gas also comprises methyl-monosilane.
23. a kind of method according to claim 15 is characterized in that, the step of described first precursor gas of described injection also comprises from 1,3,5,7-tetramethyl-ring tetrasiloxane (TMCTS or C 4H 16O 4Si 4), tetraethyl cyclotetrasiloxane (C 8H 24O 4Si 4), the last of the ten Heavenly stems methyl cyclotetrasiloxane (C 10H 30O 5Si 5), the methyl-monosilane molecule with comprise O 2Or N 2The mixture of the oxidant of O, and comprise Si selects to have the step of presoma of the molecule of loop configuration in the group that the precursor mixture of O and C constitutes.
24. a kind of method according to claim 15 is characterized in that, the described second at least a precursor gas mainly comprises hydrocarbon, ether, and alcohol, ester, ketone, aldehyde, amine or other contain O, the hydrocarbon of N or F.
25. a kind of method according to claim 15, also comprise from by 2,5-norbornadiene (or dicyclo [2.2.1] heptan-2, the 5-diene), norborene 2, the 5-norbornadiene (or dicyclo [2.2.1] heptan-2, the 5-diene), norbornane (or dicyclo [2.2.1] heptane), three ring [3.2.1.0] octanes, three ring [3.2.2.0] nonanes, spiral shell [3.4] octane, spiral shell [4.5] nonane, spiral shell [5.6] decane, benzene, toluene, dimethylbenzene, and the step of choosing described at least a second precursor gas that mainly comprises hydrocarbon molecules in the group of methyl phenyl ethers anisole formation.
26. a kind of method according to claim 21 is characterized in that, described at least a second precursor gas is dicyclo [2.2.1] hept-2-ene".
27. a kind of method according to claim 15 is characterized in that, described at least a second precursor gas also comprises from hydrocarbon ether, alcohol, ester, ketone, aldehyde, amine or other contain O, at least two kinds of different carbon containings selecting in the group that the hydrocarbon of N or F constitutes and the molecule of hydrogen.
28. according to a kind of method of claim 15, also comprise with described first and described at least a second precursor gas with from containing hydrogen, oxygen, germanium, the step of at least a mixed gases of selecting in the group that the gas of nitrogen or fluorine constitutes.
29. a method of making heterogeneous film having low dielectric constant comprises step:
A settling chamber is provided;
At substrate of described indoor placement;
Provide one arranged side by side with described settling chamber, and the plasma source chamber that is communicated with described settling chamber fluid;
Injection comprises Si and from C, one first precursor gas of at least two kinds of elements selecting in the group that O and H constitute is decomposed and the described presoma of ionization, and is injected in the described settling chamber to described plasma source chamber;
Injection comprises the molecule that contains carbon and hydrogen, perhaps contain carbon and hydrogen and by at least a second precursor gas of the molecule of inert carrier gas dilution to described settling chamber; And
Deposition comprises and mainly contains Si on described substrate, C, and one first of O and H contains C mutually and mainly, H and at least a second mutually the heterogeneous film of nano-scale holes in a large number.
30. a kind of method of making heterogeneous film having low dielectric constant according to claim 29 also comprises the step of moving described plasma source chamber with continuous mode.
31. a kind of method of making heterogeneous film having low dielectric constant according to claim 29 also comprises the step of moving described plasma source chamber with pulse mode.
32., comprise that also the condition of regulating this plasma is to minimize the hydrocarbon molecules step of decomposition according to a kind of method of making heterogeneous film having low dielectric constant of claim 29.
33. a kind of method of making heterogeneous film having low dielectric constant according to claim 29 also is included in the optional step of under the temperature that is not less than 200 ℃ described film being heat-treated.
34. a kind of method of making heterogeneous film having low dielectric constant according to claim 29 is characterized in that, described at least a second precursor gas comprises the molecule with loop configuration.
35. a kind of method of making heterogeneous film having low dielectric constant according to claim 29 is characterized in that described first precursor gas also comprises methyl-monosilane.
36. a kind of method of making heterogeneous film having low dielectric constant according to claim 29 is characterized in that, the step of described first precursor gas of described injection also comprises from 1,3,5,7-tetramethyl-ring tetrasiloxane (TMCTS or C 4H 16O 4Si 4), tetraethyl cyclotetrasiloxane (C 8H 24O 4Si 4), the last of the ten Heavenly stems methyl cyclotetrasiloxane (C 10H 30O 5Si 5), and comprise Si, select to have a kind of step of presoma of the molecule of loop configuration in the group that the precursor mixture of O and C constitutes.
37. according to a kind of method of making heterogeneous film having low dielectric constant of claim 29, comprise that also selection mainly contains hydrocarbon, ether, alcohol, ester, ketone, aldehyde, amine or other contain O, the step of described at least a second precursor gas of the hydrocarbon of N or F.
38. a kind of method of making heterogeneous film having low dielectric constant according to claim 29, also comprise the step of from following group, choosing described at least a second precursor gas that mainly comprises hydrocarbon molecules, this group comprises 2, the 5-norbornadiene dicyclo film of claim 29 (or according to), it is characterized in that described at least a second precursor gas is dicyclo [2.2.1] hept-2-ene".
40. a kind of method of making heterogeneous film having low dielectric constant according to claim 29, it is characterized in that, described at least a second precursor gas also comprises from hydrocarbon, ether, alcohol, ester, ketone, aldehyde, amine or other contain O, at least two kinds of different carbon containings selecting in the group that the hydrocarbon of N or F constitutes and the molecule of hydrogen.
41. a kind of method of making heterogeneous film having low dielectric constant according to claim 29, also comprise with described first and described at least a second precursor gas with from containing hydrogen, oxygen, germanium, the step of at least a mixed gases of selecting in the group that the gas of nitrogen or fluorine constitutes.
42. one kind has in pin configuration as in the layer or the electronic structure of the insulation material layer of interlayer dielectric, comprising:
Pretreated Semiconductor substrate with one first metal area of embedding in the ground floor insulating material;
One first conductor region in the second layer insulating material that embedding is formed by heterogeneous material, described heterogeneous material comprises and mainly contains Si, C, O and H one first mutually be dispersed in described first at least a second phase in mutually, described at least a second mainly contains C mutually, H and a large amount of pore of nanometer, the dielectric constant of described heterogeneous material is no more than 3.2, described second layer insulating material closely contacts with described ground floor insulating material, and described first conductor region is electrically connected with described first metal area; And
Be electrically connected with described first conductor region, and be embedded in one second conductor region in the three-layer insulated material that contains described heterogeneous material, described three-layer insulated material closely contacts with described second layer insulating material.
43. according to claim 42 a kind of have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, also comprise the dielectric cap rock between described second layer insulating material and described three-layer insulated material,
44. according to claim 42 a kind of have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, also comprise:
One first dielectric cap rock between described second layer insulating material and described three-layer insulated material; And
Be positioned at one second dielectric cap rock on the described three-layer insulated material top,
45. according to claim 43 a kind of have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, it is characterized in that, described dielectric cap rock is by from silica, silicon nitride, silicon oxynitride, refractory metal is Ta, Zr, the refractory metal silicon nitride of Hf or W, carborundum, silicon oxide carbide, a kind of material of choosing in the group that their hydrogen-containing compound and modification SiCOH constitute forms.
46. according to claim 44 a kind of have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, it is characterized in that, described first and the described second dielectric cap rock from by silica, silicon nitride, silicon oxynitride, refractory metal is Ta, Zr, the refractory metal silicon nitride of Hf or W, carborundum, silicon oxide carbide, a kind of material of choosing in the group that their hydrogen-containing compound and modification SiCOH constitute forms.
47. according to claim 42 a kind of have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, it is characterized in that, described ground floor insulating material is a silica, silicon nitride, phosphosilicate glass (PSG), other various doped products of boron phosphoric acid silicate glass (BPSG) or these materials.
48. according to claim 42 a kind of have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, also comprise:
The diffusion impervious layer of a dielectric material that deposits at least one in described second layer insulating material and described three-layer insulated material.
49. according to claim 42 a kind of have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, also comprise:
Be positioned at the hard mask of a dielectric reactive ion etching (the RIE)/polishing stop layer on the described second layer insulating material top; And
Be positioned at the dielectric diffusion barriers layer on the hard mask of described RIE/polishing stop layer top.
50. according to claim 42 a kind of have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, also comprise:
Be positioned at the hard mask of the one first dielectric RIE/polishing stop layer on the described second layer insulating material top;
Be positioned at one first dielectric diffusion barriers layer on the hard mask of the described first dielectric RIE/polishing stop layer top;
Be positioned at the hard mask of the one second dielectric RIE/polishing stop layer on the described three-layer insulated material top; And
Be positioned at one second dielectric diffusion barriers layer on the hard mask of the described second dielectric RIE/polishing stop layer top.
51. according to claim 50 a kind of have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, also comprise the dielectric cap rock between the dielectric in heterogeneous material interlayer dielectric and heterogeneous material layer.
52. one kind have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, comprising:
Pretreated Semiconductor substrate with one first metal area of embedding in the ground floor insulating material; And
At least one first conductor region at least one second layer insulating material that embedding is made of heterogeneous material, described heterogeneous material comprises and mainly contains Si, C, O and H one first mutually be dispersed in described first at least a second phase in mutually, described at least a second mainly contains C mutually, H and a large amount of pore of nanometer, the dielectric constant of described heterogeneous material is no more than 3.2, in described at least one second layer insulating material one closely contacts with described ground floor insulating material, and in described at least one first conductor region one is electrically connected with described first metal area.
53. have in pin configuration as in the layer and the electronic structure of the insulation material layer of interlayer dielectric according to claim 52 a kind of, also comprise a dielectric cap rock that is positioned at each described at least one second layer insulating material centre,
54. according to claim 52 a kind of have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, also comprise:
One first dielectric cap rock between each described at least one second layer insulating material,
Be positioned at one second dielectric cap rock on second insulation material layer top at place, described top.
55. according to claim 54 a kind of have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, it is characterized in that, described first and the described second dielectric cap rock constitute by heterogeneous material or modification heterogeneous material,
56. according to claim 53 a kind of have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, it is characterized in that, the material of described dielectric cap rock is by from silica, silicon nitride, silicon oxynitride, refractory metal is Ta, Zr, the refractory metal silicon nitride of Hf or W, carborundum, silicon oxide carbide, a kind of selected materials of choosing in the group that their hydrogen-containing compound and modification heterogeneous material constitute forms.
57. one kind have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, comprising:
A pretreated Semiconductor substrate that comprises one first metal area that embeds in the ground floor insulating material;
Embed one first conductor region of a second layer insulating material, described second layer insulating material closely contacts with described ground floor insulating material, and described first conductor region is electrically connected with described first metal area;
Be electrically connected and embed one second conductor region in the three-layer insulated material with described first conductor region, described three-layer insulated material closely contacts with described second layer insulating material;
One first dielectric cap rock between described second layer insulating material and described three-layer insulated material; And
Be positioned at one second dielectric cap rock on the described three-layer insulated material top, it is characterized in that, the described first and second dielectric cap rocks are made of heterogeneous dielectric material, described heterogeneous material comprises and mainly contains Si, C, O and H one first mutually be dispersed in described first at least a second phase in mutually, described at least a second mainly contains C mutually, H and a large amount of pore of nanometer, the dielectric constant of described heterogeneous material is no more than 3.2.
58. one kind have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, comprising:
A pretreated Semiconductor substrate that comprises one first metal area that embeds in the ground floor insulating material;
Embed one first conductor region in the second layer insulating material, described second layer insulating material closely contacts with described ground floor insulating material, and described first conductor region is electrically connected with described first metal area;
Be electrically connected and embed one second conductor region in the three-layer insulated material with described first conductor region, described three-layer insulated material closely contacts with described second layer insulating material; And
Be deposited on the diffusion impervious layer that the material by comprising heterogeneous dielectric material at least one in the described second layer and the described three-layer insulated material forms, described heterogeneous material comprises and mainly contains Si, C, O and H one first mutually be dispersed in described first at least a second phase in mutually, described at least a second mainly contains C mutually, H and a large amount of pore of nanometer, the dielectric constant of described heterogeneous material is no more than 3.2.
59. one kind have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, comprising:
A pretreated Semiconductor substrate that comprises one first metal area that embeds in the ground floor insulating material;
Embed one first conductor region of a second layer insulating material, described second layer insulating material closely contacts with described ground floor insulating material, and described first conductor region is electrically connected with described first metal area;
Be electrically connected and embed one second conductor region in the three-layer insulated material with described first conductor region, described three-layer insulated material closely contacts with described second layer insulating material;
Be positioned at the hard mask of a reactive ion etching (the RIE)/polishing stop layer on the described second layer insulating material top; And
Be positioned at the diffusion impervious layer on the hard mask of described RIE/polishing stop layer top, it is characterized in that, the hard mask of described RIE/polishing stop layer and described diffusion impervious layer are made of one first mutually the heterogeneous dielectric material that comprises that described heterogeneous material constitutes, comprise and mainly contain Si, C, O and H one first mutually be dispersed in described first at least a second phase in mutually, described at least a second mainly contains C mutually, H and a large amount of pore of nanometer, the dielectric constant of described heterogeneous material is no more than 3.2.
60. one kind have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, comprising:
A pretreated Semiconductor substrate that comprises one first metal area that embeds in the ground floor insulating material;
Embed one first conductor region in the described second layer insulating material, described second layer insulating material closely contacts with described ground floor insulating material, and described first conductor region is electrically connected with described first metal area;
Be electrically connected and embed one second conductor region in the three-layer insulated material with described first conductor region, described three-layer insulated material closely contacts with described second layer insulating material;
Be positioned at the hard mask of one the one RIE/polishing stop layer on the described second layer insulating material top;
Be positioned at one first diffusion impervious layer on the hard mask of the described first dielectric RIE/polishing stop layer top;
Be positioned at the hard mask of one the 2nd RIE/polishing stop layer on the described three-layer insulated material top; And
Be positioned at one second diffusion impervious layer on the hard mask of the described second dielectric RIE/polishing stop layer top, it is characterized in that, the hard mask of described RIE/polishing stop layer and described diffusion impervious layer are made of heterogeneous dielectric material, this heterogeneous material comprises and mainly contains Si, C, O and H one first mutually be dispersed in described first at least a second phase in mutually, described at least a second mainly contains C mutually, H and a large amount of pore of nanometer, the dielectric constant of described heterogeneous material is no more than 3.2.
61. according to claim 58 a kind of have in pin configuration as in the layer with the electronic structure of the insulation material layer of interlayer dielectric, also comprise the dielectric cap rock between an interlayer dielectric layer and layer inner-dielectric-ayer that constitutes by the material that comprises described heterogeneous dielectric material.
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