CN1288452C - Disc chip testing board and phase-shift radio-frequency signal generating circuit thereof - Google Patents
Disc chip testing board and phase-shift radio-frequency signal generating circuit thereof Download PDFInfo
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- CN1288452C CN1288452C CN 03147278 CN03147278A CN1288452C CN 1288452 C CN1288452 C CN 1288452C CN 03147278 CN03147278 CN 03147278 CN 03147278 A CN03147278 A CN 03147278A CN 1288452 C CN1288452 C CN 1288452C
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Abstract
The present invention relates to a CD (Compact Disk) chip testing board and a phase-shift radio-frequency signal generating circuit thereof. The phase-shift radio-frequency signal generating circuit which comprises a signal level voltage divider, a high-pass filter and a phase shifter is utilized to generate a phase-shift radio-frequency signal needed for testing an analog circuit block of a CD chip according to a digital input signal which has a variable frequency and is provided by a testing device so as to realize the test of the high-temperature operation life of the CD chip.
Description
Technical field
The present invention is relevant for a kind of test board, and particularly relevant for a kind of CD chip testing plate and phase shift radiofrequency signal generation circuit wherein.
Background technology
All the time, medium is all being played the part of indispensable role in computer system.Therefore, scientific and technological circle constantly drop into the research of medium, have also obtained huge progress.It not only relates to the kind of medium, also comprises its stability and memory capacity etc.Recently, because the high stability of CD and the advantage of high storage capacity, so the optical disc product of various different qualities is constantly weeded out the old and bring forth the new, its range of application is universal day by day especially.
Generally speaking, the Drive and Control Circuit of optical disc apparatus all can be made into the CD chip, to save volume and cost, and in the test process of CD chip, serviceable life and fiduciary level in order to ensure the CD chip, then the CD chip can be inserted on the CD chip testing plate, be positioned over then as in the test cavity under the hot environment of 125 degree Celsius, and connection can provide the testing apparatus of required test signal, to carry out the high-temperature operation life-span (High Temperature Operating Life is called for short HTOL) test.
In the testing apparatus of similar HTOL, its institute can the supplier mostly be digital input signals, receive as digital multifunctional optical disk device (Digital Versatile Disc for needs, there is the CD chip of a plurality of phase shift radiofrequency signals of a phase shift at the peak of optical read head (pick up head) output abbreviation DVD) to each other for peak value 75mV and its, obviously can not satisfy the demand, and cause the difficulty of test.
Summary of the invention
In view of this, the invention provides a kind of CD chip testing plate and phase shift radiofrequency signal generation circuit wherein, be beneficial to use the HTOL test, assess the fiduciary level of CD chip.
For realizing above-mentioned and other purpose, the invention provides a kind of CD chip testing plate and phase shift radiofrequency signal generation circuit wherein, it is applicable to the high-temperature operation life test of CD chip, with the fiduciary level of assessment CD chip.This CD chip testing plate comprises: test base and phase shift radiofrequency signal generation circuit.Test base wherein has at least one chip pocket, the CD chip will test to plant, but and the connector with testing apparatus of connection testing optical disk chip, and testing apparatus can provide the digital input signals that changes according to a frequency.The digital input signals that phase shift radiofrequency signal generation circuit then provides in order to the foundation testing apparatus, produce the first required phase shift radiofrequency signal of testing optical disk chip, the second phase shift radiofrequency signal, the 3rd phase shift radiofrequency signal and the 4th phase shift radiofrequency signal, wherein the phase place of the first phase shift radiofrequency signal and the second phase shift radiofrequency signal is identical, and and the 3rd phase shift radiofrequency signal and the 4th phase shift radiofrequency signal between have a phase differential.
In one embodiment, the phase shift radiofrequency signal generation circuit of this CD chip testing plate comprises: the first signal level voltage divider, first Hi-pass filter, second Hi-pass filter, phase shifter, secondary signal level voltage divider, the 3rd Hi-pass filter and the 4th Hi-pass filter.
Wherein, the digital input signals that the first signal level voltage divider provides in order to acceptance test equipment, and export after the dividing potential drop of peek word input signal.The first Hi-pass filter coupled with first signal level voltage divider is in order to the flip-flop of the digital input signals after the elimination dividing potential drop, to produce the first phase shift radiofrequency signal.Second Hi-pass filter is coupled with first signal level voltage divider also, in order to the flip-flop of the digital input signals after the elimination dividing potential drop, to produce the second phase shift radiofrequency signal.The digital input signals that phase shifter provides in order to acceptance test equipment, and will export after the digital input signals phase shift.Secondary signal level voltage divider couples phase shifter, in order to receiving the digital input signals after the phase shift, and exports after the digital input signals after the phase shift got dividing potential drop.The 3rd Hi-pass filter couples secondary signal level voltage divider, in order to the flip-flop of the digital input signals after elimination phase shift and the dividing potential drop, to produce the 3rd phase shift radiofrequency signal.And the 4th Hi-pass filter couples secondary signal level voltage divider, in order to the flip-flop of the digital input signals after elimination phase shift and the dividing potential drop, to produce the 4th phase shift radiofrequency signal.
In one embodiment, first signal level voltage divider of this phase shift radiofrequency signal generation circuit and secondary signal level voltage divider are made up of the resistance of two series connection.
In one embodiment, first Hi-pass filter, second Hi-pass filter, the 3rd Hi-pass filter and the 4th Hi-pass filter of this phase shift radiofrequency signal generation circuit comprise a capacitor.
In one embodiment, the phase shifter of this phase shift radiofrequency signal generation circuit comprises: operational amplifier, first resistance, capacitor, second resistance and the 3rd resistance.Wherein, operational amplifier has a positive input terminal, a negative input end and an output terminal, and its output terminal is in order to the digital input signals of output after the phase shift.One end of first resistance couples digital input signals, and the other end couples the positive input terminal of operational amplifier.One end of capacitor is coupled to the positive input terminal of operational amplifier, other end ground connection.One end of second resistance couples digital input signals, and the other end couples the negative input end of operational amplifier.One end of the 3rd resistance couples the negative input end of operational amplifier, and the other end then couples the output terminal of operational amplifier.
In one embodiment, second resistance of this phase shift radiofrequency signal generation circuit is identical with the resistance of the 3rd resistance.
In one embodiment, the yield value of the phase shifter of this phase shift radiofrequency signal generation circuit is 1 and its phase shift 40 degree.
In one embodiment, the digital input signals that this phase shift radiofrequency signal generation circuit provides according to testing apparatus, and the peak of the first phase shift radiofrequency signal, the second phase shift radiofrequency signal, the 3rd phase shift radiofrequency signal and the 4th phase shift radiofrequency signal that produce is 75mv and frequency is 5MHz to peak value.
The present invention provides a kind of phase shift radiofrequency signal production method in addition, digital input signals applicable to according to a frequency change produces the first required phase shift radiofrequency signal of testing optical disk chip, the second phase shift radiofrequency signal, the 3rd phase shift radiofrequency signal and the 4th phase shift radiofrequency signal.This phase shift radiofrequency signal production method comprises the following steps: to receive digital input signals, and exports after the dividing potential drop of peek word input signal; The flip-flop of the digital input signals after the elimination dividing potential drop is to produce the first phase shift radiofrequency signal and the second phase shift radiofrequency signal; To export after the digital input signals phase shift; Receive the digital input signals after the phase shift, and export after the digital input signals after the phase shift got dividing potential drop; And the flip-flop of eliminating the digital input signals after phase shift and the dividing potential drop, to produce the 3rd phase shift radiofrequency signal and the 4th phase shift radiofrequency signal.
Wherein, the phase place of phase shift is 40 degree.And the peak of the first phase shift radiofrequency signal, the second phase shift radiofrequency signal, the 3rd phase shift radiofrequency signal and the 4th phase shift radiofrequency signal that produce is 75mv, frequency 5MHz to peak value.
By in the above-mentioned explanation as can be known, with a kind of phase shift radiofrequency signal generation circuit provided by the invention, be applied in the CD chip testing plate, then can realize the demand of CD chip in HTOL test.
Description of drawings
For above-mentioned and other purposes of the present invention, feature and advantage can be become apparent, hereinafter special with preferred embodiment, and conjunction with figs., be described in detail as follows:
Fig. 1 represents the CD chip analog circuit test connection diagram of digital versatile disc device;
Fig. 2 represents the phase shift radiofrequency signal oscillogram that the phase shift radiofrequency signal generation circuit of the preferred embodiment according to the present invention is produced;
Fig. 3 represents the phase shift radiofrequency signal generation circuit diagram of the preferred embodiment according to the present invention;
Fig. 4 represents the frequency response analysis curve map of the phase shift radiofrequency signal generation circuit of the preferred embodiment according to the present invention;
Fig. 5 represents the CD chip testing plate synoptic diagram of the preferred embodiment according to the present invention;
Fig. 6 is the phase shift radiofrequency signal oscillogram of actual measurement input CD chip;
Fig. 7 is the signal output waveform figure when the phase place neck of the first phase shift radiofrequency signal and the second phase shift radiofrequency signal is preceding; And
Fig. 8 is the signal output waveform figure when the phase lag of the first phase shift radiofrequency signal and the second phase shift radiofrequency signal.
Graphic sign explanation:
100 CD chips
300 phase shift radiofrequency signal generation circuit
310,330 signal level voltage dividers
311,312,321,324,325,331,332 resistance
320 phase shifters
322 capacitors
323 operational amplifiers
340,350,360,370 Hi-pass filters
500 CD chip testing plates
510 test bases
511,512,513,514,515,516 chip pocket
517 connectors
Embodiment
Please refer to shown in Figure 1ly, it is the CD chip analog circuit test connection diagram of digital versatile disc device.Represent among the figure, when the mimic channel of the test as the CD chip 100 of digital multifunctional optical disk device (DVD), need simulation by the peak of the optical read head output of digital versatile disc device a plurality of radiofrequency signals such as the first phase shift radiofrequency signal DVDA, the second phase shift radiofrequency signal DVDC, the 3rd phase shift radiofrequency signal DVDB and the 4th phase shift radiofrequency signal DVDD to peak value 75mV.
Wherein, the first phase shift radiofrequency signal DVDA is identical with the phase place of the second phase shift radiofrequency signal DVDC, and the 3rd phase shift radiofrequency signal DVDB is also identical with the phase place of the 4th phase shift radiofrequency signal DVDD, and have a phase differential A between the first phase shift radiofrequency signal DVDA and the second phase shift radiofrequency signal DVDC and the 3rd phase shift radiofrequency signal DVDB and the 4th phase shift radiofrequency signal DVDD, its waveform is shown in the oscillogram of Fig. 2.
The mimic channel of CD chip 100 can be according to phase differential A therebetween, to produce output signal TEO.As the first phase shift radiofrequency signal DVDA and the second phase shift radiofrequency signal DVDC during as illustrated in fig. 2 for preceding the 3rd phase shift radiofrequency signal DVDB of neck and the 4th phase shift radiofrequency signal DVDD, the level of output signal TEO will be between 1.5V and 2.1V.Otherwise, when the first phase shift radiofrequency signal DVDA and the second phase shift radiofrequency signal DVDC when falling behind the 3rd phase shift radiofrequency signal DVDB and the 4th phase shift radiofrequency signal DVDD, the level of output signal TEO is then between 0.8V and 1.5V.Therefore, can be by the level that measures output signal TEO, whether the mimic channel of judging CD chip 100 is in the operate as normal.
Please refer to shown in Figure 3ly, it is the phase shift radiofrequency signal generation circuit diagram of the preferred embodiment according to the present invention.Represent among the figure that this phase shift radiofrequency signal generation circuit 300 comprises: the first signal level voltage divider (firstsignal level divider), 310, first Hi-pass filter 340, second Hi-pass filter 350, phase shifter (phase shifter) 320, secondary signal level voltage divider 330, the 3rd Hi-pass filter 340 and the 4th Hi-pass filter 350.
Wherein, the first signal level voltage divider 310 is made up of with resistance 322 resistance 311 of series connection, and the digital input signals Vi dividing potential drop that changes in order to the 5MHz that testing apparatus (not illustrating) is provided is to obtain the signal of level reduction after the dividing potential drop.Because of testing apparatus can only provide digital signal, and the required peak of the mimic channel square that does not have the testing optical disk chip is to a plurality of radiofrequency signals with phase shift such as the first phase shift radiofrequency signal DVDA, the second phase shift radiofrequency signal DVDC, the 3rd phase shift radiofrequency signal DVDB and the 4th phase shift radiofrequency signal DVDD of peak value 75mV, so this place sets testing apparatus, make peak that its output can provide digital input signals Vi to the square wave of peak value 600mV.
The digital input signals Vi of square wave is after the first signal level voltage divider, 310 dividing potential drops, input to first Hi-pass filter 340 and second Hi-pass filter 350 that constitute by capacitor more respectively, so that the flip-flop of the signal after the elimination dividing potential drop, and produce first phase shift radiofrequency signal DVDA and the second phase shift radiofrequency signal DVDC of required peak respectively to peak value 75mV.
In addition, because of required peak to the 3rd phase shift radiofrequency signal DVDB of peak value 75mV and the 4th phase shift radiofrequency signal DVDD must and the first phase shift radiofrequency signal DVDA and the second phase shift radiofrequency signal DVDC between to have for example be the phase differential of 40 degree.So as shown in the figure, using secondary signal level voltage divider 330, the 3rd Hi-pass filter 340 and the 4th Hi-pass filter 350, before obtaining the 3rd required phase shift radiofrequency signal DVDB and the 4th phase shift radiofrequency signal DVDD, must use a phase shifter 320, to obtain to have the output signal Vo of required phase differential with digital input signals Vi.
As shown in Figure 3, the digital input signals Vi that phase shifter 320 acceptance test equipment (not illustrating) are provided, and with digital input signals Vi phase shift for example be 40 the degree phase places after output signal Vo.Wherein, phase shifter 320 comprises: operational amplifier 323, first resistance 321, capacitor 322, second resistance 324 and the 3rd resistance 325.Its annexation is: an end of first resistance 321 couples digital input signals Vi, and the other end couples the positive input terminal of operational amplifier 323; One end of capacitor 322 is coupled to the positive input terminal of operational amplifier 323, other end ground connection; One end of second resistance 324 couples digital input signals Vi, and other end coupling is pressed the negative input end of operational amplifier 323; One end of the 3rd resistance 325 couples the negative input end of operational amplifier 323, and the other end then couples the output terminal of operational amplifier 323.The value of supposing capacitor 322 is C, and the resistance of first resistance 321, second resistance 324 and the 3rd resistance 325 is R, and then its phase shift relation is described as follows:
The voltage Vp of the positive input terminal of operational amplifier 323 is
Vp＝Vi{(1/jwC)/[R+(1/jwC)]}＝Vi/(1+jwCR)…(1)
In ideal operational amplificr, the voltage of the negative input end of operational amplifier 323 equals the voltage Vp of its positive input terminal, therefore
Vo＝[(Vp-Vi)/R]*R+Vp＝2Vp-Vi＝Vi(1-jwCR)/(1+jwCR).(2)
So
Vo/Vi＝(1-jwCR)/(1+jwCR)＝1∠-2tan
-1wCR…….(3)
By equation (3) as can be known, the yield value of phase shifter 320 is 1, and the phase shift value then can be by suitably selecting R, C value to decide, to produce the output signal Vo that has required phase differential with digital input signals Vi.
As shown in Figure 3, the secondary signal level voltage divider of being made up of the resistance 331 and the resistance 332 of series connection 330 is coupled to phase shifter 320, in order to the signal Vo after the reception phase shift, and export after the signal Vo after the phase shift got dividing potential drop, input to the 3rd Hi-pass filter 360 and the 4th Hi-pass filter 370 that constitute by capacitor more respectively, so that the flip-flop of the signal Vo after the elimination dividing potential drop, and produce three phase shift radiofrequency signal DVDB and the four phase shift radiofrequency signal DVDD of required peak respectively to peak value 75mV.The old friend has a phase differential that is determined by R, C value between the 3rd phase shift radiofrequency signal DVDB and the 4th phase shift radiofrequency signal DVDD and the first phase shift radiofrequency signal DVDA and the second phase shift radiofrequency signal DVDC.
Please refer to shown in Figure 4ly, it is the frequency response analysis curve map of the phase shift radiofrequency signal generation circuit of the preferred embodiment according to the present invention, this figure be to use Star-HSPICE 2001.4 come sunykatuib analysis Fig. 3 phase shift radiofrequency signal generation circuit 300 design and get.By among Fig. 4 as can be known, phase shift radiofrequency signal generation circuit 300 as Fig. 3, self-testing device receives the peak to peak value 600mV, and during the digital input signals Vi that changes with frequency 5MHz, then exportable peak is a plurality of radiofrequency signals such as the first phase shift radiofrequency signal DVDA, the second phase shift radiofrequency signal DVDC, the 3rd phase shift radiofrequency signal DVDB and the 4th phase shift radiofrequency signal DVDD of 75mv, frequency 5MHz to peak value.And has a phase differential between the first phase shift radiofrequency signal DVDA wherein and the second phase shift radiofrequency signal DVDC and the 3rd phase shift radiofrequency signal DVDB and the 4th phase shift radiofrequency signal DVDD.
Please refer to Fig. 5, it is the CD chip testing plate synoptic diagram of the preferred embodiment according to the present invention.This CD chip testing plate 500 is to make for the high-temperature operation life test of CD chip, so that use the high-temperature operation life test of CD chip, assesses the fiduciary level of CD chip.
As shown in the figure, this CD chip testing plate 500 comprises: test base 510 and 6 phase shift radiofrequency signal generation circuit 300, and so that the ability that can test 6 CD chips simultaneously to be provided.Wherein match for a plurality of radiofrequency signals such as the first phase shift radiofrequency signal DVDA, the second phase shift radiofrequency signal DVDC, the 3rd phase shift radiofrequency signal DVDB and the 4th phase shift radiofrequency signal DVDD with 300 generations of 6 phase shift radiofrequency signal generation circuit, 6 chip pocket such as 511,512,513,514,515 and 516 also have been installed simultaneously, for the CD chip of planting and to test on test base 510.
In addition, also has the connector 517 that can connect the testing apparatus (not shown) on the test base 510, so that connect the testing apparatus that Vi to 6 phase shift radiofrequency signal of digital input signals generation circuit 300 can be provided, then, 300 digital input signals Vi that provide according to testing apparatus of 6 phase shift radiofrequency signal generation circuit, produce the first phase shift radiofrequency signal DVDA required as the testing optical disk chip of Fig. 2, the second phase shift radiofrequency signal DVDC, a plurality of radiofrequency signals such as the 3rd phase shift radiofrequency signal DVDB and the 4th phase shift radiofrequency signal DVDD, and input to respectively and be inserted in 511,512,513,514, CD chip on 6 chip pocket such as 515 and 516, measure its output signal TEO more respectively, to judge the working condition of CD chip.
Please in the lump with reference to figure 6, shown in 7 and 8, Fig. 6 is the first phase shift radiofrequency signal DVDA of actual measurement input CD chip, the second phase shift radiofrequency signal DVDC, the waveform of the 3rd phase shift radiofrequency signal DVDB and the 4th phase shift radiofrequency signal DVDD, Fig. 7 is the waveform of the output signal TEO when the first phase shift radiofrequency signal DVDA and the second phase shift radiofrequency signal DVDC preceding the 3rd phase shift radiofrequency signal DVDB of neck and the 4th phase shift radiofrequency signal DVDD, and Fig. 8 then is the waveform of the output signal TEO when the first phase shift radiofrequency signal DVDA and backward the 3rd phase shift radiofrequency signal DVDB of the second phase shift radiofrequency signal DVDC and the 4th phase shift radiofrequency signal DVDD.By among Fig. 7 and Fig. 8 as can be known, when the first phase shift radiofrequency signal DVDA and the second phase shift radiofrequency signal DVDC preceding the 3rd phase shift radiofrequency signal DVDB of neck and the 4th phase shift radiofrequency signal DVDD, the level of output signal TEO is between between 1.5V and 2.1V.And when the first phase shift radiofrequency signal DVDA and the second phase shift radiofrequency signal DVDC when falling behind the 3rd phase shift radiofrequency signal DVDB and the 4th phase shift radiofrequency signal DVDD, the level of output signal TEO is then between 0.8V and 1.5V.Therefore, expression CD chip operation is normal.
Other it should be noted that, the signal that produces because of the phase shift radiofrequency signal generation circuit 300 of Fig. 3 is that the first phase shift radiofrequency signal DVDA leads preceding the 3rd phase shift radiofrequency signal DVDB and the 4th phase shift radiofrequency signal DVDD with the second phase shift radiofrequency signal DVDC, so when testing the first phase shift radiofrequency signal DVDA and the second phase shift radiofrequency signal DVDC, as long as with the first phase shift radiofrequency signal DVDA for backward the 3rd phase shift radiofrequency signal DVDB and the 4th phase shift radiofrequency signal DVDD, the second phase shift radiofrequency signal DVDC and the 3rd phase shift radiofrequency signal DVDB, the 4th phase shift radiofrequency signal DVDD exchanges and inputs to the CD chip and get final product.In addition, above-mentioned preferred embodiment and the CD chip testing plate 500 made according to the present invention, though be provided with 6 chip pocket such as 511,512,513,514,515 and 516, for testing 6 CD chips simultaneously, but the actual chip pocket number that should install can change according to the size of actual demand and test base 510.
By concluding a kind of phase shift radiofrequency signal production method in the above-mentioned explanation, the digital input signals that it is applicable to according to a frequency change produces the first required phase shift radiofrequency signal of testing optical disk chip, the second phase shift radiofrequency signal, the 3rd phase shift radiofrequency signal and the 4th phase shift radiofrequency signal.This phase shift radiofrequency signal production method comprises the following steps: to receive digital input signals, and exports after the dividing potential drop of peek word input signal; The flip-flop of the digital input signals after the elimination dividing potential drop is to produce the first phase shift radiofrequency signal and the second phase shift radiofrequency signal; To export after the digital input signals phase shift; Receive the digital input signals after the phase shift, and export after the digital input signals after the phase shift got dividing potential drop; And the flip-flop of eliminating the digital input signals after phase shift and the dividing potential drop, to produce the 3rd phase shift radiofrequency signal and the 4th phase shift radiofrequency signal.
Wherein, the phase place of phase shift is 40 degree.And the peak of the first phase shift radiofrequency signal, the second phase shift radiofrequency signal, the 3rd phase shift radiofrequency signal and the 4th phase shift radiofrequency signal that produce is 75mv, frequency 5MHz to peak value.
In sum as can be known, use a kind of phase shift radiofrequency signal generation circuit provided by the present invention in CD chip testing plate, then can use the testing apparatus that digital input signals only is provided, realize the demand of CD chip in the HTOL test.
Though the present invention with preferred embodiment openly as above; right its is not in order to limit the present invention; any those skilled in the art; under the situation that does not break away from the spirit and scope of the present invention; can carry out various changes and modification, so protection scope of the present invention is as the criterion with the claim restricted portion that is proposed.
Claims (10)
1. phase shift radiofrequency signal generation circuit, be applicable to a digital input signals according to a frequency change, produce one first required phase shift radiofrequency signal of testing optical disk chip, one second phase shift radiofrequency signal, one the 3rd phase shift radiofrequency signal and one the 4th phase shift radiofrequency signal, this circuit comprises:
One first signal level voltage divider in order to receiving this digital input signals, and is exported after getting the dividing potential drop of this digital input signals;
One first Hi-pass filter couples this first signal level voltage divider, in order to the flip-flop of this digital input signals after the elimination dividing potential drop, to produce this first phase shift radiofrequency signal;
One second Hi-pass filter couples this first signal level voltage divider, in order to the flip-flop of this digital input signals after the elimination dividing potential drop, to produce this second phase shift radiofrequency signal;
One phase shifter in order to receiving this digital input signals, and will be exported after this digital input signals phase shift;
One secondary signal level voltage divider couples this phase shifter, in order to receiving this digital input signals after the phase shift, and exports after this digital input signals after the phase shift got dividing potential drop;
One the 3rd Hi-pass filter couples this secondary signal level voltage divider, in order to the flip-flop of this digital input signals after elimination phase shift and the dividing potential drop, to produce the 3rd phase shift radiofrequency signal; And
One the 4th Hi-pass filter couples this secondary signal level voltage divider, in order to the flip-flop of this digital input signals after elimination phase shift and the dividing potential drop, to produce the 4th phase shift radiofrequency signal.
2. phase shift radiofrequency signal generation circuit as claimed in claim 1, wherein this first signal level voltage divider and this secondary signal level voltage divider are made up of two resistance in seriess.
3. phase shift radiofrequency signal generation circuit as claimed in claim 1, wherein this first Hi-pass filter, this second Hi-pass filter, the 3rd Hi-pass filter and the 4th Hi-pass filter respectively comprise a capacitor.
4. phase shift radiofrequency signal generation circuit as claimed in claim 1, wherein this phase shifter comprises:
One operational amplifier has a positive input terminal, a negative input end and an output terminal, and this output terminal is in order to output this digital input signals after the phase shift;
One first resistance, an end couples this digital input signals, and the other end couples this positive input terminal;
One capacitor, an end is coupled to this positive input terminal, other end ground connection;
One second resistance, an end couples this digital input signals, and the other end couples this negative input end; And
One the 3rd resistance, an end couples this negative input end, and the other end couples this output terminal.
5. a CD chip testing plate is applicable to the high-temperature operation life test of a CD chip, comprising:
One test base has at least one chip pocket, with this CD chip of planting, and the connector of a testing apparatus of this CD chip of connection test, this testing apparatus can provide a digital input signals that changes according to a frequency; And
One phase shift radiofrequency signal generation circuit, in order to according to this digital input signals, produce required one first phase shift radiofrequency signal, one second phase shift radiofrequency signal, one the 3rd phase shift radiofrequency signal and one the 4th phase shift radiofrequency signal of this CD chip of test, wherein this first phase shift radiofrequency signal and this second phase shift radiofrequency signal same-phase, and and the 3rd phase shift radiofrequency signal and the 4th phase shift radiofrequency signal between have a phase differential.
6. CD chip testing plate as claimed in claim 5, wherein this phase shift radiofrequency signal generation circuit comprises:
One first signal level voltage divider in order to receiving this digital input signals, and is exported after getting the dividing potential drop of this digital input signals;
One first Hi-pass filter couples this first signal level voltage divider, in order to the flip-flop of this digital input signals after the elimination dividing potential drop, to produce this first phase shift radiofrequency signal;
One second Hi-pass filter couples this first signal level voltage divider, in order to the flip-flop of this digital input signals after the elimination dividing potential drop, to produce this second phase shift radiofrequency signal;
One phase shifter in order to receiving this digital input signals, and will be exported after this digital input signals phase shift;
One secondary signal level voltage divider couples this phase shifter, in order to receiving this digital input signals after the phase shift, and exports after this digital input signals after the phase shift got dividing potential drop;
One the 3rd Hi-pass filter couples this secondary signal level voltage divider, in order to the flip-flop of this digital input signals after elimination phase shift and the dividing potential drop, to produce the 3rd phase shift radiofrequency signal; And
One the 4th Hi-pass filter couples this secondary signal level voltage divider, in order to the flip-flop of this digital input signals after elimination phase shift and the dividing potential drop, to produce the 4th phase shift radiofrequency signal.
7. CD chip testing plate as claimed in claim 6, wherein this first signal level voltage divider and this secondary signal level voltage divider are made up of two resistance in seriess.
8. CD chip testing plate as claimed in claim 6, wherein this first Hi-pass filter, this second Hi-pass filter, the 3rd Hi-pass filter and the 4th Hi-pass filter respectively comprise a capacitor.
9. CD chip testing plate as claimed in claim 6, wherein this phase shifter comprises:
One operational amplifier has a positive input terminal, a negative input end and an output terminal, and this output terminal is in order to output this digital input signals after the phase shift;
One first resistance, an end couples this digital input signals, and the other end couples this positive input terminal;
One capacitor, an end is coupled to this positive input terminal, other end ground connection;
One second resistance, an end couples this digital input signals, and the other end couples this negative input end; And
One the 3rd resistance, an end couples this negative input end, and the other end couples this output terminal.
10. phase shift radiofrequency signal production method, be applicable to a digital input signals according to a frequency change, produce one first required phase shift radiofrequency signal of testing optical disk chip, one second phase shift radiofrequency signal, one the 3rd phase shift radiofrequency signal and one the 4th phase shift radiofrequency signal, this method comprises the following steps:
Receive this digital input signals, and export after getting the dividing potential drop of this digital input signals;
The flip-flop of this digital input signals after the elimination dividing potential drop is to produce this first phase shift radiofrequency signal and this second phase shift radiofrequency signal;
To export after this digital input signals phase shift;
Receive this digital input signals after the phase shift, and export after this digital input signals after the phase shift got dividing potential drop; And
The flip-flop of this digital input signals after elimination phase shift and the dividing potential drop is to produce the 3rd phase shift radiofrequency signal and the 4th phase shift radiofrequency signal.
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| CN 03147278 CN1288452C (en) | 2003-07-11 | 2003-07-11 | Disc chip testing board and phase-shift radio-frequency signal generating circuit thereof |
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| CN 03147278 CN1288452C (en) | 2003-07-11 | 2003-07-11 | Disc chip testing board and phase-shift radio-frequency signal generating circuit thereof |
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| US9866336B2 (en) | 2015-06-17 | 2018-01-09 | Google Llc | Phased array antenna self-calibration |
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