The objective of the invention is to propose a kind of method of discrimination of the WCDMA of being used for Cell searching scrambler group number and make a kind of circuit structure in this way simple, the frame-synchronizing device that acquisition speed is fast.
The method of discrimination of the scrambler group number in a kind of WCDMA Cell searching frame-synchronizing device is to utilize continuous any 3~5 sign indicating numbers receive number to differentiate the scrambler group number.
Can get continuous three sign indicating numbers of frame head and number differentiate the scrambler group number.
Also can get continuous three sign indicating numbers number of frame head and continuous three sign indicating numbers behind 5~9 time slots of anchor-frame biasing and number differentiate the scrambler group number jointly.
Get in concrete the application continuous three sign indicating numbers number of frame head and continuous three sign indicating numbers behind 7 time slots of anchor-frame biasing number promptly the 8th, 9,10 3 sign indicating number number carry out the differentiation of scrambler group number.
In order further to reduce frame error rate, in n time slot, the scrambler group number that identifies is counted; Whenever identify a scrambler group number, just the number of times that this scrambler group number is occurred adds 1, and the occurrence number of all scrambler group numbers relatively; If the occurrence number of this scrambler group number correspondence is maximum, then export this scrambler group number and frame synchronizing signal, otherwise that maximum scrambler group number and frame synchronizing signal of output occurrence number; When arriving the time span of setting,, and restart counting with all counter O resets.
The differentiation flow process of scrambler group number is as follows: (1) extracts three continuous input codes number; (2) judge whether to be continuous three sign indicating numbers of frame head number; (3), then determine this scrambler group number and the occurrence number of this scrambler group number is added 1 if continuous three sign indicating numbers of frame head number; (4) judge whether the number of times that the scrambler group number obtain occurs is maximum, if, then export this scrambler group number and frame synchronizing signal, otherwise maximum block number and the frame synchronizing signals of output occurrence number; (5), then continue to judge whether to be continuous three sign indicating numbers behind n time slot of anchor-frame biasing number if not continuous three sign indicating numbers of frame head number; (6), then determine this scrambler group number and the occurrence number of this scrambler group number is added 1 if continuous three sign indicating numbers behind n time slot of anchor-frame biasing number; (7) judge whether the number of times that the scrambler group number obtain occurs is maximum, if, then export this scrambler group number and frame synchronizing signal, otherwise maximum block number and the frame synchronizing signals of output occurrence number; (8) continuous three sign indicating numbers behind n time slot of anchor-frame biasing number then return the first step, extract new three continuous input codes and number differentiate.
Frame-synchronizing device in a kind of WCDMA Cell searching is characterized in that: comprises the A/D modular converter, goes Z sequence multiplication module, and vectorial compressed transform module, thresholding is judging module and finite state machine module relatively; Described vectorial compressed transform module comprises vectorial compression module and fast hadamard transform module; Described finite state machine module uses method recited above to carry out the differentiation of scrambler group number; Base-band analog signal enters multiplier after the A/D conversion and the Z sequence multiplies each other, and then enters the finite state machine module through after vectorial compression module, fast hadamard transform module and the thresholding comparison judging module successively, exports scrambler group number and frame synchronizing signal at last.
Described vectorial compression module is the sequence that hadamard (Hadamard) sequence of 256 samplings is compressed into 16 samplings, and concrete grammar is that an average calculating operation is carried out in per 16 samplings, obtains 16 mean values.
The sampling rate of described A/D modular converter is 1 times of spreading rate.
The present invention is described in further detail below in conjunction with accompanying drawing.
At first introduce the auxiliary synchronization channel sign indicating number.The auxiliary synchronization channel sign indicating number has 16 kinds of code words, so have 16 kinds of code words available when sending each time slot, 64 kinds of permutation and combination methods of actual use in each frame (15 time slots) are corresponding to the auxiliary synchronization channel block number, also just corresponding to 64 scrambler groups.It should be noted that: these 64 groups of sequences are custom-designed in order to shorten search time, each the group cyclic shift after, with other 63 groups of sequences can be not identical.
16 kinds of concrete code words of auxiliary synchronization channel sign indicating number come from hadamard matrix { C
1..., C
16, add generation by Hadamard sequences and Z sequence mould 2.
The Z sequence is described earlier.If a=<X
1, X
2, X
3..., X
16〉=<0,0,0,0,0,0,1,1,0,1,0,1,0,1,1,0 〉
b=<x
1,x
2,…,x
8, x
9, x
10,…, x
16>
Sequence z={b then, b, b, b, b, b, b, b, b, b, b, b, b, b, b, b} Hadamard sequences (OK) can be by matrix H
8Recurrence obtains:
The 0th row is positioned at the top layer (full null sequence) of matrix
h
nThe capable sequence of expression hadamard matrix n.
The code word of auxiliary synchronization channel is by matrix H
8Per 16 the row in choose one, so 16 kinds of possible code words can be arranged altogether, its yard sequence number is: n=0,16,32,48,64,80,96,112,128,144,160,176,192,208,224,240.
If, h
n(i) and z (i) represent sequences h respectively
nAnd z, i symbol, n represents n synchronous code.
C
SCH,n=<h
n(0)+z(0),h
n(1)+z(1),h
n(2)+z(2),…,h
n(255)+z(255)>(2)
More than all computings all adopt mould 2 to add.
The binary code word of synchronizing channel is converted into the real number value sequence when reality sends:
‘0’->‘+1’,????‘1’->‘-1’。
The auxiliary synchronization channel code word is defined as:
C
SCH, n, i.e. { C
1..., C
16}:
C
i=C
SCH,i,i=1,…,16
Finite state machine is the core component of frame-synchronizing device, and main effect is in the short period of time, and by correlation ratio method, differentiation obtains the scrambler group number.The auxiliary synchronization channel sign indicating number has 16 kinds of code words, and each time slot is used one of them, can repeat.Each group number is corresponding one by one with this subzone main scramble place scrambler group group number, and 64 * 15 the code table of pressing the 3GPP standard formulation is as follows:
The scrambler group number | Timeslot number |
?#1 | ?#2 | ?#3 | ?#4 | ?#5 | ?#6 | ?#7 | ?#8 | ?#9 | ?#10 | ?#11 | ?#12 | ?#13 | ?#14 | ?#15 |
????Group1 | ?1 | ?1 | ?2 | ?8 | ?9 | ?10 | ?15 | ?8 | ?10 | ?16 | ?2 | ?7 | ?15 | ?7 | ?16 |
????Group2 | ?1 | ?1 | ?5 | ?16 | ?7 | ?3 | ?14 | ?16 | ?3 | ?10 | ?5 | ?12 | ?14 | ?12 | ?10 |
????Group3 | ?1 | ?2 | ?1 | ?15 | ?5 | ?5 | ?12 | ?16 | ?6 | ?11 | ?2 | ?16 | ?11 | ?15 | ?12 |
????Group4 | ?1 | ?2 | ?3 | ?1 | ?8 | ?6 | ?5 | ?2 | ?5 | ?8 | ?4 | ?4 | ?6 | ?3 | ?7 |
?Group5 | ?1 | ?2 | ?16 | ?6 | ?6 | ?11 | ?15 | ?5 | ?12 | ?1 | ?15 | ?12 | ?16 | ?11 | ?2 |
?Group6 | ?1 | ?3 | ?4 | ?7 | ?4 | ?1 | ?5 | ?5 | ?3 | ?6 | ?2 | ?8 | ?7 | ?6 | ?8 |
?Group7 | ?1 | ?4 | ?11 | ?3 | ?4 | ?10 | ?9 | ?2 | ?11 | ?2 | ?10 | ?12 | ?12 | ?9 | ?3 |
?Group8 | ?1 | ?5 | ?6 | ?6 | ?14 | ?9 | ?10 | ?2 | ?13 | ?9 | ?2 | ?5 | ?14 | ?1 | ?13 |
?Group9 | ?1 | ?6 | ?10 | ?10 | ?4 | ?11 | ?7 | ?13 | ?16 | ?11 | ?13 | ?6 | ?4 | ?1 | ?16 |
?Group10 | ?1 | ?6 | ?13 | ?2 | ?14 | ?2 | ?6 | ?5 | ?5 | ?13 | ?10 | ?9 | ?1 | ?14 | ?10 |
?Group11 | ?1 | ?7 | ?8 | ?5 | ?7 | ?2 | ?4 | ?3 | ?8 | ?3 | ?2 | ?6 | ?6 | ?4 | ?5 |
?Group12 | ?1 | ?7 | ?10 | ?9 | ?16 | ?7 | ?9 | ?15 | ?1 | ?8 | ?16 | ?8 | ?15 | 2 | ?2 |
?Group13 | ?1 | ?8 | ?12 | ?9 | ?9 | ?4 | ?13 | ?16 | ?5 | ?1 | ?13 | ?5 | ?12 | ?4 | ?8 |
?Group14 | ?1 | ?8 | ?14 | ?10 | ?14 | ?1 | ?15 | ?15 | ?8 | ?5 | ?11 | ?4 | ?10 | ?5 | ?4 |
?Group15 | ?1 | ?9 | ?2 | ?15 | ?15 | ?16 | ?10 | ?7 | ?8 | ?1 | ?10 | ?8 | ?2 | ?16 | ?9 |
?Group16 | ?1 | ?9 | ?15 | ?6 | ?16 | ?2 | ?13 | ?14 | ?10 | ?11 | ?7 | ?4 | ?5 | ?12 | ?3 |
?Group17 | ?1 | ?10 | ?9 | ?11 | ?15 | ?7 | ?6 | ?4 | ?16 | ?5 | ?2 | ?12 | ?13 | ?3 | ?14 |
?Group18 | ?1 | ?11 | ?14 | ?4 | ?13 | ?2 | ?9 | ?10 | ?12 | ?16 | ?8 | ?5 | ?3 | ?15 | ?6 |
?Group19 | ?1 | ?12 | ?12 | ?13 | ?14 | ?7 | ?2 | ?8 | ?14 | ?2 | ?1 | ?13 | ?11 | ?8 | ?11 |
?Group20 | ?1 | ?12 | ?15 | ?5 | ?4 | ?14 | ?3 | ?16 | ?7 | ?8 | ?6 | ?2 | ?10 | ?11 | ?13 |
?Group21 | ?1 | ?15 | ?4 | ?3 | ?7 | ?6 | ?10 | ?13 | ?12 | ?5 | ?14 | ?16 | ?8 | ?2 | ?11 |
?Group22 | ?1 | ?16 | ?3 | ?12 | ?11 | ?9 | ?13 | ?5 | ?8 | ?2 | ?14 | ?7 | ?4 | ?10 | ?15 |
?Group23 | ?2 | ?2 | ?5 | ?10 | ?16 | ?11 | ?3 | ?10 | ?11 | ?8 | ?5 | ?13 | ?3 | ?13 | ?8 |
?Group24 | ?2 | ?2 | ?12 | ?3 | ?15 | ?5 | ?8 | ?3 | ?5 | ?14 | ?12 | ?9 | ?8 | ?9 | ?14 |
?Group25 | ?2 | ?3 | ?6 | ?16 | ?12 | ?16 | ?3 | ?13 | ?13 | ?6 | ?7 | ?9 | ?2 | ?12 | ?7 |
?Group26 | ?2 | ?3 | ?8 | ?2 | ?9 | ?15 | ?14 | ?3 | ?14 | ?9 | ?5 | ?5 | ?15 | ?8 | ?12 |
?Group27 | ?2 | ?4 | ?7 | ?9 | ?5 | ?4 | ?9 | ?11 | ?2 | ?14 | ?5 | ?14 | ?11 | ?16 | ?16 |
?Group28 | ?2 | ?4 | ?13 | ?12 | ?12 | ?7 | ?15 | ?10 | ?5 | ?2 | ?15 | ?5 | ?13 | ?7 | ?4 |
?Group29 | ?2 | ?5 | ?9 | ?9 | ?3 | ?12 | ?8 | ?14 | ?15 | ?12 | ?14 | ?5 | ?3 | ?2 | ?15 |
?Group30 | ?2 | ?5 | ?11 | ?7 | ?2 | ?11 | ?9 | ?4 | ?16 | ?7 | ?16 | ?9 | ?14 | ?14 | ?4 |
?Group31 | ?2 | ?6 | ?2 | ?13 | ?3 | ?3 | ?12 | ?9 | ?7 | ?16 | ?6 | ?9 | ?16 | ?13 | ?12 |
?Group32 | ?2 | ?6 | ?9 | ?7 | ?7 | ?16 | ?13 | ?3 | ?12 | ?2 | ?13 | ?12 | ?9 | ?16 | ?6 |
?Group33 | ?2 | ?7 | ?12 | ?15 | ?2 | ?12 | ?4 | ?10 | ?13 | ?15 | ?13 | ?4 | ?5 | ?5 | ?10 |
?Group34 | ?2 | ?7 | ?14 | ?16 | ?5 | ?9 | ?2 | ?9 | ?16 | ?11 | ?11 | ?5 | ?7 | ?4 | ?14 |
?Group35 | ?2 | ?8 | ?5 | ?12 | ?5 | ?2 | ?14 | ?14 | ?8 | ?15 | ?3 | ?9 | ?12 | ?15 | ?9 |
?Group36 | ?2 | ?9 | ?13 | ?4 | ?2 | ?13 | ?8 | ?11 | ?6 | ?4 | ?6 | ?8 | ?15 | ?15 | ?11 |
?Group37 | ?2 | ?10 | ?3 | ?2 | ?13 | ?16 | ?8 | ?10 | ?8 | ?13 | ?11 | ?11 | ?16 | ?3 | ?5 |
?Group38 | ?2 | ?11 | ?15 | ?3 | ?11 | ?6 | ?14 | ?10 | ?15 | ?10 | ?6 | ?7 | ?7 | ?14 | ?3 |
?Group39 | ?2 | ?16 | ?4 | ?5 | ?16 | ?14 | ?7 | ?11 | ?4 | ?11 | ?14 | ?9 | ?9 | ?7 | ?5 |
?Group40 | ?3 | ?3 | ?4 | ?6 | ?11 | ?12 | ?13 | ?6 | ?12 | ?14 | ?4 | ?5 | ?13 | ?5 | ?14 |
?Group41 | ?3 | ?3 | ?6 | ?5 | ?16 | ?9 | ?15 | ?5 | ?9 | ?10 | ?6 | ?4 | ?15 | ?4 | ?10 |
?Group42 | ?3 | ?4 | ?5 | ?14 | ?4 | ?6 | ?12 | ?13 | ?5 | ?13 | ?6 | ?11 | ?11 | ?12 | ?14 |
?Group43 | ?3 | ?4 | ?9 | ?16 | ?10 | ?4 | ?16 | ?15 | ?3 | ?5 | ?10 | ?5 | ?15 | ?6 | ?6 |
?Group44 | ?3 | ?4 | ?16 | ?10 | ?5 | ?10 | ?4 | ?9 | ?9 | ?16 | ?15 | ?6 | ?3 | ?5 | ?15 |
?Group45 | ?3 | ?5 | ?12 | ?11 | ?14 | ?5 | ?11 | ?13 | ?3 | ?6 | ?14 | ?6 | ?13 | ?4 | ?4 |
?Group46 | ?3 | ?6 | ?4 | ?10 | ?6 | ?5 | ?9 | ?15 | ?4 | ?15 | ?5 | ?16 | ?16 | ?9 | ?10 |
?Group47 | ?3 | ?7 | ?8 | ?8 | ?16 | ?11 | ?12 | ?4 | ?15 | ?11 | ?4 | ?7 | ?16 | ?3 | ?15 |
?Group48 | ?3 | ?7 | ?16 | ?11 | ?4 | ?15 | ?3 | ?15 | ?11 | ?12 | ?12 | ?4 | ?7 | ?8 | ?16 |
?Group49 | ?3 | ?8 | ?7 | ?15 | ?4 | ?8 | ?15 | ?12 | ?3 | ?16 | ?4 | ?16 | ?12 | ?11 | ?11 |
?Group50 | ?3 | ?8 | ?15 | ?4 | ?16 | ?4 | ?8 | ?7 | ?7 | ?15 | ?12 | ?11 | ?3 | ?16 | ?12 |
?Group51 | ?3 | ?10 | ?10 | ?15 | ?16 | ?5 | ?4 | ?6 | ?16 | ?4 | ?3 | ?15 | ?9 | ?6 | ?9 |
?Group52 | ?3 | ?13 | ?11 | ?5 | ?4 | ?12 | ?4 | ?11 | ?6 | ?6 | ?5 | ?3 | ?14 | ?13 | ?12 |
?Group53 | ?3 | ?14 | ?7 | ?9 | ?14 | ?10 | ?13 | ?8 | ?7 | ?8 | ?10 | ?4 | ?4 | ?13 | ?9 |
?Group54 | ?5 | ?5 | ?8 | ?14 | ?16 | ?13 | ?6 | ?14 | ?13 | ?7 | ?8 | ?15 | ?6 | ?15 | ?7 |
?Group55 | ?5 | ?6 | ?11 | ?7 | ?10 | ?8 | ?5 | ?8 | ?7 | ?12 | ?12 | ?10 | ?6 | ?9 | ?11 |
?Group56 | ?5 | ?6 | ?13 | ?8 | ?13 | ?5 | ?7 | ?7 | ?6 | ?16 | ?14 | ?15 | ?8 | ?16 | ?15 |
?Group57 | ????5 | ????7 | ????9 | ????10 | ????7 | ????11 | ????6 | ????12 | ????9 | ????12 | ????11 | ????8 | ????8 | ????6 | ????10 |
?Group58 | ????5 | ????9 | ????6 | ????8 | ????10 | ????9 | ????8 | ????12 | ????5 | ????11 | ????10 | ????11 | ????12 | ????7 | ????7 |
?Group59 | ????5 | ????10 | ????10 | ????12 | ????8 | ????11 | ????9 | ????7 | ????8 | ????9 | ????5 | ????12 | ????6 | ????7 | ????6 |
?Group60 | ????5 | ????10 | ????12 | ????6 | ????5 | ????12 | ????8 | ????9 | ????7 | ????6 | ????7 | ????8 | ????11 | ????11 | ????9 |
?Group61 | ????5 | ????13 | ????15 | ????15 | ????14 | ????8 | ????6 | ????7 | ????16 | ????8 | ????7 | ????13 | ????14 | ?????5 | ????16 |
?Group62 | ????9 | ????10 | ????13 | ????10 | ????11 | ????15 | ????15 | ????9 | ????16 | ????12 | ????14 | ????13 | ????16 | ????14 | ????11 |
?Group63 | ????9 | ????11 | ????12 | ????15 | ????12 | ????9 | ????13 | ????13 | ????11 | ????14 | ????10 | ????16 | ????15 | ????14 | ????16 |
?Group64 | ????9 | ????12 | ????10 | ????15 | ????13 | ????14 | ????9 | ????14 | ????15 | ????11 | ????11 | ????13 | ????12 | ????16 | ????10 |
Number 1~16 is the sequence number of auxiliary synchronization channel code word among the figure.
As can be seen from the above table, through specially designed 64 groups of scramblers is different in twos, so the work of finite state machine is exactly by the comparison of tabling look-up (hardware realizes being called finite state machine), to determine the block number of present frame and to finish frame synchronization according to the result of fast hadamard transform.
It is the easiest that what expect also is that the simplest implementation algorithm is that whole code table is stored away, then one by one with the result of fast hadamard transform relatively, the record comparative result is judged block number then.Consider from the angle of hardware resource, do like this and need do a large amount of computings, and speed relatively is slow.Best algorithm should be that hardware spending is little, and number of comparisons is few, the algorithm that recognition speed is fast.
With test, we find that the sign indicating number sequence of at least three continuous arbitrarily in code table sign indicating numbers number composition is less than repeating by analysis.For example, the second group code sequence is: C1, C1, C5, C16, C7, C3, C14, C16, C3, C10, C5, C12, C14, C12, C10, continuous three sign indicating numbers that wherein begin number are: C1, C1, secondly C5 is: C1, C5, C16, these two sign indicating number sequences do not have in other code character, that is to say, and any one that occurs in these two sign indicating number sequences can determine that block number is " two ".Therefore, minimum continuous three sign indicating numbers number wanted just can determine block number.But, this need store all possible continuous three sign indicating number sequences, resource requirement is still very big, and relatively the time also can be very long (because relatively being with all sign indicating number sequences of three continuation code sequences that receive and storage relatively), the more important thing is and can't determine frame synchronization.But we can number judge three continuation codes of frame head, the as above C1 in the example, C1, C5.Like this, Bi Jiao number of times is just much few with the content that needs storage.Whenever obtain three sign indicating numbers number, just 64 sequences with storage compare successively, if two sequences equate, just obtain corresponding block number, obtained the position of frame head simultaneously, also promptly finished frame synchronization; If unequal, be taken into a new sign indicating number number, form new continuous trigram sequence with this and compare.
The advantage of this method is that compare operation is simple, and the comparison time is few, and required hardware resource is few.But shortcoming is arranged also: 1. identification code group number and to catch time of frame synchronization long for the first time.Because when the biasing of frame head reaches 15 time slots (first sign indicating number of a frame number occur) at the 15th time slot, then ensuing two sign indicating numbers number occur in second frame, at this moment block number identification is the longest wants 17 time slots just can finish, and same frame synchronization is also wanted 17 time slots.2. discerning and catching is subjected to the channel influence of fading big.When three continuation codes of frame head number occur when decline is big, i.e. the amplitude of the FHT conversion of sign indicating number correspondence output peak value is very little, and then system fails to judge easily or misjudges, thereby directly causes the elongated or frame error rate rising of recognition time.This influence is less when mobile at a slow speed, but particularly evident under situation fast.
Therefore, remove to judge three continuation code extras of frame head, can be simultaneously three continuation codes in the middle of the frame number be judged.Generally get is that continuous three sign indicating numbers behind 5~9 time slots of anchor-frame biasing number are judged.In actual applications, we selected for use 7 time slots of anchor-frame biasing promptly the 8th, 9,10 3 sign indicating numbers number judge whether to be sign indicating number sequence in the middle of the frame.When three sign indicating numbers of input, judge whether this sequence is the sequence of frame head earlier; Being, then obtaining block number and frame synchronization, is not the sequence that then judges whether in the middle of the frame; Be, then obtain block number and frame synchronization, be not, then be taken into a new sign indicating number number, form a new sequence and compare judgement again.This method and preceding a kind of method are relatively operated complexity slightly, and relatively the time has also been grown one times, and the memory space that needs is also many one times; But the identification code group number has shortened half with the time of catching frame synchronization, and be subjected to the influence of channel fading also little, because under the situation of fast moving, big decline is if appear at the position of frame head, (two places are 7 time slots at interval but in the middle of not necessarily also appearing at simultaneously frame, be 4.67ms, when rapid fading, the decline size can change to some extent).It seems that comprehensively this method is equivalent to that the pluses and minuses of preceding a kind of method have been done compromise and handles.
In order further to reduce frame error rate, we have also adopted following method: the block number that identifies is counted in certain hour (n time slot).Whenever identify a block number, just the number of times that this block number is occurred adds 1, and the occurrence number of all block numbers relatively; If the number of times maximum of the block number correspondence that has just obtained, just with the output of gained block number, otherwise the maximum block number of output occurrence number.When arriving setting-up time length,, and restart counting with all counter O resets.Generally speaking, because the result of the misjudgement that noise or decline cause is at random, the probability that a certain misjudgement value repeats within a certain period of time is very little, and when signal to noise ratio is enough big, the correct result who judges is the same, therefore right value will occur often than misjudgement value, thereby has significantly reduced because the misjudgement of the scrambler group number of a certain frame causes full frame all is the situation of error code.
Fig. 1 has represented the differentiation flow process of scrambler group number, just the whole workflow of finite state machine: (1) extracts three continuous input codes number; (2) judge whether to be continuous three sign indicating numbers of frame head number; (3), then determine this scrambler group number and the occurrence number of this scrambler group number is added 1 if continuous three sign indicating numbers of frame head number; (4) judge whether the number of times that the scrambler group number obtain occurs is maximum, if, then export this scrambler group number and frame synchronizing signal, otherwise maximum block number and the frame synchronizing signals of output occurrence number; (5), then continue to judge whether to be continuous three sign indicating numbers behind n time slot of anchor-frame biasing number if not continuous three sign indicating numbers of frame head number; (6), then determine this scrambler group number and the occurrence number of this scrambler group number is added 1 if continuous three sign indicating numbers behind n time slot of anchor-frame biasing number; (7) judge whether the number of times that the scrambler group number obtain occurs is maximum, if, then export this scrambler group number and frame synchronizing signal, otherwise maximum block number and the frame synchronizing signals of output occurrence number; (8) continuous three sign indicating numbers behind n time slot of anchor-frame biasing number then return the first step, extract new three continuous input codes and number differentiate.
Fig. 2 is the general structure block diagram of frame-synchronizing device, and as shown in Figure 2, frame-synchronizing device comprises A/D modular converter 11, goes Z sequence multiplication module 12, vectorial compressed transform module 13, and thresholding is judging module 14 and finite state machine module 15 relatively.What import is base-band analog signal, output scrambler group number and frame synchronizing signal.
Fig. 3 is the detailed structure schematic diagram of frame-synchronizing device, as shown in Figure 3, base-band analog signal is divided into I, Q two-way, and handle respectively and computing on each road, and vectorial compressed transform module 13 comprises vectorial compression module and fast hadamard transform module (FHT) two parts.A/D modular converter 11 is responsible for base-band analog signal is converted to digital signal; Multiplier is removed the Z sequence that is added in the auxiliary synchronization channel sign indicating number, reverts to Hadamard sequences; The vector compression module adopts a kind of compression algorithm, with 16 long vectors of its boil down to the hadamard vector of 256 length of input; Fast hadamard transform module (FHT) is carried out fast hadamard transform for 16 long vectors, obtains one 16 * 1 column matrix at last; The row of threshold judgement module selected absolute value maximum from 16 * 1 column matrix (by relatively obtaining with the thresholding of setting) writes down its capable number; Comparator compares the court verdict of I, Q two-way, and frame synchronization is confirmed; Finite state machine carries out the code tree search, obtains the scrambler group number of this sub-district.
Concrete signal processing is as follows: at first, the I that receives, Q two-way serial base-band analog signal after the A/D conversion, are become digital signal, enter multiplier then and the Z sequence multiplies each other.When the auxiliary synchronization channel sign indicating number forms, Hadamard sequences be multiply by the Z sequence to be produced later on, the purpose of adding the Z sequence is the cross correlation that reduces Hadamard sequences and basic synchronization channel code, make and can not cause and to adjudicate or to judge by accident by the cross correlation that wireless channel forms, so must will remove the Z sequence earlier at receiving terminal because of two kinds of sign indicating number sequences at receiving terminal.Because the Z sequence is "+1 " or " 1 " entirely, so only need simple phase multiplication can remove the Z sequence.Then, signal enters vectorial compression module, promptly with slot synchronization as time reference, compaction algorithms is carried out in 256 samplings that enter.The compression algorithm main purpose is with 16 of the Hadamard sequences boil down tos of 256 length, is in order to reduce the operand of later process, directly 256 samplings to be asked relevant like this, and its operand is than greatly almost 16 times of the operands of 16 samplings.Compression algorithm is as follows:
h16(n)=(1/16)(sigma(h256n(16n+k)
*h16m(k))
n=0,1,2,…15,k=0,1,2,…15,m=1
N element of the Hadamard sequences that h16 (n) expression compression is later, h256n represents that the n of the 256 rank hadamard matrixs that receive is capable, h16m is that the m of hadamard matrix on 16 rank is capable, the actual m=1 that gets, in fact it is the sequence of complete " 1 ", so when realizing, do not need real phase multiplication.By above-mentioned compression algorithm as can be seen, be actually an average calculating operation is carried out in per 16 samplings, after 256 samplings are imported so, will obtain 16 mean values.Vector after the compression is carried out fast hadamard transform.Fast hadamard transform is a kind of fast algorithm that matrix multiplication (asking relevant) is reduced to add operation, can effectively reduce operand.Need make plus and minus calculation 256 * (256-1)=65280 times for the directly related computing of 256 samplings, and adopt the FHT algorithm only to need (256-1) * 8=2040 signed magnitude arithmetic(al), obviously greatly reduce operand, make hardware consumption become seldom.
Through fast hadamard transform later on the correlation peak of output enter the thresholding judging module, obtain the auxiliary synchronization channel sign indicating number (c1~c16) of current time slots.The court verdict of I, the output of Q two-way is compared, if the result is inequality in two-way output, then think and adjudicate failure, output is invalid, have only when two-way output comes to the same thing and just think effective result, number give finite state machine with this auxiliary synchronization channel sign indicating number and differentiate, obtain scrambler group number and frame synchronizing signal at last
Because finite state machine makes full use of the characteristic of auxiliary synchronization channel sign indicating number, carries out the differentiation of scrambler group number with continuous three sign indicating number sequences, has significantly reduced operand, hardware resource consumption is few, thus apparatus of the present invention to implement circuit structure simple; The employing of compression algorithm and fast hadamard transform has guaranteed that more apparatus of the present invention have acquisition speed faster.