CN1235411C - Flow-line-based frame predictive mode coding acceleration method - Google Patents

Flow-line-based frame predictive mode coding acceleration method Download PDF

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CN1235411C
CN1235411C CN 200310101445 CN200310101445A CN1235411C CN 1235411 C CN1235411 C CN 1235411C CN 200310101445 CN200310101445 CN 200310101445 CN 200310101445 A CN200310101445 A CN 200310101445A CN 1235411 C CN1235411 C CN 1235411C
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subprocess
sub
piece
block
coding
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CN1529512A (en
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彭聪
黄晁
李锦涛
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Institute of Computing Technology of CAS
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Institute of Computing Technology of CAS
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Abstract

The present invention relates to a pipeline based block coding acceleration method of an intraframe predictive pattern, which belongs to the technical field of network media propagation. The method comprises the following steps: firstly, a video frame is divided into macro blocks (such as 16*16); secondly, the macro blocks are divided into subblocks (such as 4*4), and each subblock is respectively and predictively coded in the intraframe predictive pattern. The method can be used for greatly accelerating intraframe coding on the premise of no increase of resource consumption so that the video coding speed is improved. The present invention has the characteristics of pipeline architecture basis, no increase of resource consumption, high applicability and coding speed improvement. The present invention is suitable for any subblock based intraframe predictive coding and is suitable for video coding design. The subblock coding sequence is adjusted according to pipeline requirements.

Description

Intra prediction mode block encoding accelerated method based on streamline
Technical field
The present invention relates to network media ASCII stream, particularly a kind of intra prediction mode block encoding accelerated method based on streamline.
Technical background
Along with multimedia technology and rapid development of network technology and extensive use, propagate various video datas by network and obtain more and more widely application.Because the required bandwidth of original video data is very big, have very big redundancy simultaneously again, therefore transmit again by encoding compression usually.In real time or under nearly real-time environment (as video conference etc.), require encoder to reach sufficiently high coding rate at some.And the video coding amount of calculation is huge, just requires cataloged procedure is adopted accelerating algorithm.
Video coding is since the end of the eighties, from MPEG-1, H.261 till now MPEG-4, H.264 very long research history has been arranged, proposed a lot of international standards, but basic thought remains piecemeal compression and motion prediction.On the basis of the intra-frame macro block prediction mode in the H.264 former standard, a kind of new intra prediction mode---4*4 infra-frame prediction has been proposed, it is divided into the sub-piece of 16 4*4 with the macro block of a 16*16, and each sub-piece carries out infra-frame prediction respectively, each has independently predictive mode.This pattern has improved the efficient of coding, has also brought the raising of computation complexity and slowing down of coding rate, can greatly quicken intraframe coding speed by the accelerated method based on streamline that adopts the present invention to propose.
Summary of the invention
The object of the present invention is to provide a kind of intra prediction mode block encoding accelerated method based on streamline.The present invention includes following feature:
The technical scheme of invention
A kind of intra prediction mode block encoding accelerated method based on streamline, the intraframe coding process is divided into prediction, dct transform and quantification, inverse quantization and anti-dct transform and four subprocess of reconstruction, data dependence according to the intraframe coding of macro block neutron piece, will be from left to right, sub-piece intraframe coding is from top to bottom adjusted in proper order, make and do not have data dependence between coded sequence neutron piece and subsequent sub-block, thereby make between the subprocess of sub-piece intraframe coding and form pile line operation, do not need to wait for that whole subprocess of last sub-piece finish just can carry out the subprocess of subsequent sub-block, under the situation that does not increase resource consumption, the dct transform of last sub-piece and quantification subprocess can carry out simultaneously with the predictor process of subsequent sub-block, inverse quantization and anti-dct transform subprocess can carry out simultaneously with the dct transform and the quantification subprocess of subsequent sub-block, rebuilding subprocess can carry out simultaneously with the inverse quantization and the anti-dct transform subprocess of subsequent sub-block, and the like.
Description of drawings
Fig. 1 is a MPEG-4AVC/H.264 intra-frame 4 * 4 block encoding precedence diagram.
Fig. 2 is a MPEG-4AVC/H.264 prediction reference point diagram.
Fig. 3 is an intraframe coding streamline schematic diagram.
Fig. 4 is that order is carried out sequence chart.
Fig. 5 is that ideally streamline is carried out sequence chart.
Fig. 6 is that streamline is carried out sequence chart under the actual conditions.
The embodiment of invention
Among Fig. 1, be example with the MPEG-4AVC/H.264 infra-frame prediction:
MPEG-4AVC/H.264 is divided into the macro block of 16*16 with frame of video, is the sub-piece of 4*4 with macroblock partitions again, in intra prediction mode to each sub-piece predictive coding respectively.Fig. 1 is a coded sequence,
Fig. 2 is that forecasting institute needs reference point.
As Fig. 3,4x4 block encoding process can be divided into prediction, dct transform and quantification, inverse quantization and anti-dct transform and rebuild four subprocess in the frame, establishes four subprocess required times and is respectively T 1, T 2, T 3, T 4, then required total time is carried out in 16 sub-piece intraframe codings of a macro block in proper order
T seq=16*(T 1+T 2+T 3+T 4)
Carry out sequence as shown in Figure 4.
Can notice, prediction, dct transform and quantification, inverse quantization and anti-dct transform and rebuild four subprocess and all have only one carrying out at any time, therefore caused the waste of resource and the prolongation of computing time, can adopt pipelining to make full use of computational resource and reduce computing time.As shown in Figure 5, in the ideal case to time of implementation of 16 sub-piece intraframe coding streamlines of a macro block
T pipeline_ideal=T 1+max(T 1+T 2)+max((T 1+T 2+T 3)
+max(T 1+T 2+T 3+T 4)*13
+max(T 2+T 3+T 4)+max(T 3+T 4)+T 4
But owing to have data dependence between each sub-piece, can not reach perfect condition, need the data reconstruction of block 0 as the prediction of sub-piece 1, the prediction of sub-piece 2 needs the data reconstruction of sub-piece 0 and sub-piece 0.According to data dependence, the subblock coding order to be adjusted to give full play to pipeline efficiency, coded sequence is adjusted as follows:
0,1,4,2,5,3,6,8,7,9,12,10,13,11,14,15 carry out sequence chart as shown in Figure 6.
Required total time is carried out in 16 sub-piece intraframe codings to a macro block
T pipeline_real=(T 1+T 2+T 3+T 4)*4+{T 1+T 4+[max(T 1,T 2)+max(T 2
T 3)+max(T 3,T 4)+max(T 4,T 1)]*2}*3
Speed-up ratio λ=T Seq/ T Pipeline_real
In FPGA realizes with reference to hardware, T 1=20cycle, T 2=T 3=16cycle, T 4=18cycle, can draw speed-up ratio is 1.3365, performance has improved 33.65% under the situation that does not increase hardware resource consumption.

Claims (1)

1. intra prediction mode block encoding accelerated method based on streamline, the intraframe coding process is divided into prediction, dct transform and quantification, inverse quantization and anti-dct transform and four subprocess of reconstruction, data dependence according to the intraframe coding of macro block neutron piece, will be from left to right, sub-piece intraframe coding is from top to bottom adjusted in proper order, make and do not have data dependence between coded sequence neutron piece and subsequent sub-block, thereby make between the subprocess of sub-piece intraframe coding and form pile line operation, do not need to wait for that whole subprocess of last sub-piece finish just can carry out the subprocess of subsequent sub-block, under the situation that does not increase resource consumption, the dct transform of last sub-piece and quantification subprocess can carry out simultaneously with the predictor process of subsequent sub-block, inverse quantization and anti-dct transform subprocess can carry out simultaneously with the dct transform and the quantification subprocess of subsequent sub-block, rebuilding subprocess can carry out simultaneously with the inverse quantization and the anti-dct transform subprocess of subsequent sub-block, and the like.
CN 200310101445 2003-10-17 2003-10-17 Flow-line-based frame predictive mode coding acceleration method Expired - Fee Related CN1235411C (en)

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Cited By (1)

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WO2006052399A1 (en) * 2004-11-04 2006-05-18 Thomson Licensing Fast intra mode prediction for a video encoder
US7830960B2 (en) * 2005-01-13 2010-11-09 Qualcomm Incorporated Mode selection techniques for intra-prediction video encoding
CN100413344C (en) * 2006-10-20 2008-08-20 清华大学 Method for realizing high-parallel frame predicator
JP5082548B2 (en) * 2007-03-30 2012-11-28 富士通株式会社 Image processing method, encoder and decoder
CN100542298C (en) * 2007-09-29 2009-09-16 中国科学院计算技术研究所 A kind of block size computing method of cylinder panorama video code and transmission method
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US20110116544A1 (en) * 2009-07-02 2011-05-19 Chih-Ming Fu Methods of intra prediction, video encoder, and video decoder thereof
WO2012046435A1 (en) 2010-10-04 2012-04-12 パナソニック株式会社 Image processing device, image coding method and image processing method
CN102143361B (en) * 2011-01-12 2013-05-01 浙江大学 Video coding method and video coding device
CN102420989B (en) * 2011-12-07 2014-03-19 中国航空无线电电子研究所 Intra-frame prediction method and device
WO2013108330A1 (en) * 2012-01-18 2013-07-25 パナソニック株式会社 Image decoding device, image encoding device, image decoding method, and image encoding method
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