CN1222014C

CN1222014C - Method of forming TiN barrier by chemical rapour phase deposition

Info

Publication number: CN1222014C
Application number: CN 02137189
Authority: CN
Inventors: 徐小诚; 缪炳有
Original assignee: Shanghai Huahong Group Co Ltd
Current assignee: Shanghai Huahong Group Co Ltd; Shanghai Integrated Circuit Research and Development Center Co Ltd
Priority date: 2002-09-27
Filing date: 2002-09-27
Publication date: 2005-10-05
Anticipated expiration: 2022-09-27
Also published as: CN1414603A

Abstract

The present invention relates to an integrated circuit manufacture process by the CVD deposition of TiN films, which uses the chemical vapor phase deposition (CVD) method to deposit a TiN film by using a chemical substance of TDMA containing Ti and carries out H2-N2 radio frequency plasma processing. The deposition process of the first step aims to prepare uniform TiM films with high step coverage, and the H2-N2 radio frequency plasma processing of the second step aims to decrease the content of impurities of carbon, oxygen, hydrogen, etc. in the TiN films of CVD deposition, reduce the resistivity, cause the uniform growth of TiN grains and densify the TiN films. TiN deposited in the method has the advantages of favorable step coverage and uniform resistance and film thickness, and can obviously improve the electromigration performance of Al metal conducting wires. The Tin is also a blocking layer of Cu and can be applied to Cu metallization processes to realize the Cu metal Damascus interconnection technology.

Description

Method for forming TiN barrier layer by chemical vapor deposition

Technical Field

The invention belongs to the technical field of semiconductor integrated circuit manufacturing processes, and particularly relates to a method for depositing a TiN film by TAMAT chemical vapor deposition.

Background

With the continuous progress of advanced Dynamic Random Access Memory (DRAM), logic circuit, and System On Chip (SOC) manufacturing technologies, the processing feature size is continuously reduced, the device packaging density is continuously increased, especially the RC delay caused by the lengthening of the multi-layer metal interconnection line has a serious influence on the device performance, and is a main limiting factor for scaling down of integrated circuits in the future. Therefore, reducing RC interconnect delay has become a dominant direction in the semiconductor industry in recent years. On one hand, a Cu process is introduced into a post process of a semiconductor production line, and a Cu wiring with low resistivity is adopted to replace an Al wiring with high resistivity, so that the influence of interconnection resistance on the performance of an integrated circuit is greatly reduced. On the other hand, the introduction of low dielectric material to replace the conventional product for deep and small contact holes and through holes has increasingly prominent limitations of physical deposition, especially the step coverage of the sidewall and bottom is very low, and even if IMP (ion metal plasma deposition) is adopted, the step coverage of the sidewall does not exceed 20%, which causes difficulty in the subsequent process. Due to the characteristics of the shallow junction process, in the process of Al wiring or Cu metal wiring, a W interconnection column is generally adopted to be in contact with an active region, so that the diffusion of Al into a silicon wafer is prevented, and the shallow junction is disabled.

Meanwhile, W has poor adhesion with most common insulating medium layers, an adhesion-enhancing transition layer is required, and a diffusion barrier layer is added between the W interconnection column and the insulating mediumMaterials to avoid WF during W CVD deposition₆And (4) corroding the bottom layer medium. In the Cu interconnection process, Cu ions can be rapidly diffused in a semiconductor silicon wafer and a silicon dioxide medium under the conditions of high temperature and applied electric field, so that the problem of device reliability is caused. Therefore, a barrier material, such as TiN, TaN, etc., that prevents Cu diffusion must be added between Cu and the insulating dielectric. The purpose of the barrier layer is mainly two, the first is to prevent diffusion of the metal into the medium, and the second is to improve adhesion of the metal and the medium.

In general, good step coverage of the barrier layer is required, especially for features with aspect ratios (a/R) greater than 6, where sidewall and bottom step coverage is critical. In addition, the bulk resistance of the barrier layer itself needs to be low to minimize contact resistance; the adhesive property with the insulating medium layer is good, and the separation and the falling off are not easy; the metal barrier layer is a good metal barrier layer to prevent metal from diffusing into a silicon chip or an insulating medium to cause electric leakage between interconnection lines; the test of high temperature of the Cu post-processing technology can be withstood, and the temperature of the Cu Damascus processing flow is usually 300 to 420 ℃; the compatibility with the low dielectric constant material is good, and the chemical property of the low dielectric constant material is not changed; the physical properties meet the requirements of the subsequent chemical mechanical polishing process.

TiN is an attractive barrier material, has a high melting point (2930C), has a low resistivity (21.7 microohm. cm), adheres well to both W and Cu metals, and does not mutually melt with both W and Cu.

Generally, TiN is prepared by a physical deposition method. Since physical deposition is limited by the directionality of the sputtered metal ions, both step coverage and bottom coverage are poor, especially for deep submicron devices. In the technique of less than 0.18 micron, the barrier layer side wall coverage in the thin line is poor due to the limitation of metal sputtering ion directionality and the like during physical deposition, so that voids appear during subsequent W chemical deposition and Cu electroplating, and the yield and reliability of integrated circuits are influenced.

In order to adapt to the characteristics of fine lines and large aspect ratio (more than 6) of a deep submicron process, a Chemical Vapor Deposition (CVD) method is adopted to deposit a TiN barrier layer, the dependence of pore filling property of the deposited barrier layer on the aspect ratio is eliminated, and the TiN barrier layer is a necessary trend of the process development of an integrated circuit.

When TiN is deposited by CVD, the uniformity of the film thickness and the uniformity of the resistivity are low. For this reason, intensive research into processes and materials for CVD deposition of TiN has been conducted. The TiN CVD deposition is divided into ammonia and ammonia-free, and the common Ti-containing substances include TAMAT, TDEAT and TiCl₄And the like. TiCl (titanium dioxide)₄Although depositing TiN also gives good film uniformity, it contains Cl, which causes problems in long-term reliability of the device. Moreover, Cl reacts with ammonia to form solid precipitates, which contaminate the silicon wafer surface and the vacuum system. Therefore, TAMAT or TDEAT is commonly used in the semiconductor processing industry to form TiN. The deposition temperature is generally 350 ℃ and the low pressure is 3Torr to 5 Torr.

Disclosure of Invention

The invention aims to provide a novel method for generating a TiN barrier layer by Chemical Vapor Deposition (CVD), so that the TiN barrier layer has good step coverage, uniform resistance and film thickness uniformity, and the electromigration performance of a metal wire is obviously improved.

The process for depositing TiN by CVD provided by the invention has two main steps; the first step, using TAMAT chemical substance, using chemical vapor phase method (CVD) to thermally deposit a thin TiN film; and secondly, carrying out radio frequency plasma treatment in situ.

In the first step of deposition process, He gas is used to carry chemical substance TAMAT containing Ti, and TiN film is deposited by thermal decomposition under low vacuum condition. The chemical reaction formula of TAMAT thermal decomposition is represented as: . The second step is to carry out H in situ₂-N₂And (3) performing radio frequency plasma treatment. And repeating the two process steps until the set TiN deposition thickness range is reached.

The first deposition process is aimed at preparing uniform TiN film with high step coverage, and the second deposition process is aimed at₂-N₂RF plasma treatment is used to reduce the TiN film deposited by CVDThe content of impurities such as carbon, oxygen, hydrogen and the like in the film reduces the resistivity, so that TiN crystal grains uniformly grow, and the TiN film is densified.

The steps of the manufacturing process of the present invention can be summarized as follows:

the first step, depositing a TiN film by a Chemical Vapor Deposition (CVD) method by using He gas carrying chemical substance TAMAT and using chemical substance TAMAT containing Ti; second, in situ H₂-N₂And (3) performing radio frequency plasma treatment.

In the invention, the TiN film is deposited by thermal decomposition, the deposition temperature is 400-450 ℃, the vacuum degree is 1Torr-5Torr, and the deposition time is 10-15 seconds each time. The chemical substance TAMAT should be kept in a thermostatic bottle at a temperature of 35-55 ℃ + -0.1 ℃ to ensure a sufficient and stable TAMAT flow, and the chemical reaction formula of the thermal decomposition deposition of TiN of TAMAT is expressed as: 。

in the present invention, H is carried out in situ₂-N₂Performing radio frequency plasma treatment at a low pressure of 1Torr-2Torr for 30-40 seconds.

The above process steps are cycled until a set TiN deposition thickness range is achieved, typically 30-50 nm.

Drawings

Figure 1 shows a schematic diagram of the use of CVD to deposit a TiN barrier layer in an interconnect process.

Description of reference numerals: wherein 1 is a TaN barrier layer; 2 is a W metal interconnect post; and 3 is an insulating dielectric layer.

TiN deposited by this method has good step coverage, uniform resistance distribution and film thickness uniformity. TiN is also a barrier layer that is stable in both physical and chemical properties. The TiN has good adhesion performance with W metal and insulating medium, can be used in the W interconnection column process, and effectively prevents WF₆And corroding the silicon wafer and the dielectric layer. TiN also has good adhesion performance with Al metal and insulating medium, and is used for Al multilayer metalThe wiring process can obviously improve the electromigration performance of the Al metal wire. TiN is also a barrier layer of Cu, and can be used for a Cu metallization process to realize a Cu metal Damascus interconnection technology.

Detailed Description

The invention will be further described using TAMAT chemical vapor deposition of TiN:

1. by means of a multi-chamber CVD deposition apparatus, e.g. Endura TxZ & HP TxZ apparatus from applied materials USA

2. First, the temperature of the silicon wafer was raised to 450 ℃ under the vacuum condition of 5 Torr.

3. Then, with He₂Carrying chemical TAMAT, and depositing TiN film by thermal decomposition under the condition of low vacuum of 1.5 Torr. Deposition temperature 450 deg.C, deposition time 15 seconds, TAMAT flow rate 225sccm, He₂The flow rate was 275sccm, N₂The flow rate of (2) is 300 sccm. TAMAT should be maintained in a thermostatted bottle at a temperature of 50 ℃. + -. 0.1 ℃ to ensure adequate and stable TAMAT flow. The chemical reaction formula of TAMAT thermal decomposition is represented as: 。

4. in situ H₂-N₂The radio frequency plasma treatment reduces the content of carbon, oxygen, hydrogen and other impurities in the TiN film deposited by CVD, reduces the resistivity, enables TiN grains to grow uniformly, enables the TiN film to be densified and improves the film thickness uniformity. The degree of vacuum of the treatment was 1.5Torr, and the time was 35 seconds. During the period, the temperature of the silicon wafer rises by 20 ℃;

5. cooling the silicon chip to the set temperature of TiN deposition, and regulating the vacuum to 1.5 Torr;

6. repeating the process of step 3 by using He₂Carrying TAMAT, TiN was deposited by thermal decomposition for 15 seconds.

7. Repeating the step 4, carrying out in-situ hydrogen-nitrogen radio frequency plasma treatment for 35 seconds to reduce the resistivity, densify TiN and improve the film thickness uniformity;

8. cyclic CVD deposition of TiN and in situ H₂-N₂Radio frequency plasma processing until reaching the set TiN deposition thicknessEach cycle deposited TiN to a thickness of 110 Å.

Claims

1. A CVD deposits the method that TiN stops the layer, characterized by, the first step, use CVD method, adopt He gas to carry the chemical substance TAMAT comprising Ti, under the vacuum condition, through the thermal decomposition deposits a TiN film; second, in situ H₂-N₂Performing radio frequency plasma treatment, and repeatedly circulating the steps until the set TiN deposition thickness is reached; wherein the deposition temperature of the TiN film deposited by thermal decomposition is 400-450 ℃, the vacuum degree is 1Torr-5Torr, and the deposition time is 10-15 seconds each time; the chemical substance TAMAT should be kept in a thermostatic bottle at a temperature of 50 ℃. + -. 0.1 ℃ to ensure a sufficient and stable TAMAT flow, and the chemical reaction formula of the thermal decomposition deposition of TiN of TAMAT is expressed as: 。

2. the method of claim 1, wherein H is performed in situ₂-N₂Performing radio frequency plasma treatment at a low pressure of 1Torr-2Torr for 30-40 seconds.

3. The method of claim 2, wherein the TiN deposition thickness is set in the range of 30-50 nm.