CN1205552C - Peripheral component connecting interface burn-in recorder card - Google Patents

Peripheral component connecting interface burn-in recorder card Download PDF

Info

Publication number
CN1205552C
CN1205552C CN 01143989 CN01143989A CN1205552C CN 1205552 C CN1205552 C CN 1205552C CN 01143989 CN01143989 CN 01143989 CN 01143989 A CN01143989 A CN 01143989A CN 1205552 C CN1205552 C CN 1205552C
Authority
CN
China
Prior art keywords
signal
writers
test
circuit
peripheral component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN 01143989
Other languages
Chinese (zh)
Other versions
CN1428703A (en
Inventor
詹益新
张香玮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitac International Corp
Original Assignee
Mitac International Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitac International Corp filed Critical Mitac International Corp
Priority to CN 01143989 priority Critical patent/CN1205552C/en
Publication of CN1428703A publication Critical patent/CN1428703A/en
Application granted granted Critical
Publication of CN1205552C publication Critical patent/CN1205552C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Pinball Game Machines (AREA)
  • Credit Cards Or The Like (AREA)

Abstract

The present invention relates to a burn-in recorder card with an interface for being connected with a peripheral component which is composed of a recorder test circuit and a circuit for displaying the process and the result of a recorder. The access state of buffers of input-output in a mainboard is gradually checked by a recorder test program provided by the recorder test circuit, a reset pulse is sent out after the check at each time, and thereby, the purpose of completing a recorder is achieved. The present invention uses a display circuit to display the recording time and the blocking situation in the recording process. By the present invention, a tester can directly measure the operating state and the progress of the recorder by sight.

Description

Peripheral component connecting interface burn-in recorder card
Technical field
The relevant a kind of peripheral component connecting interface burn-in recorder card of the present invention, the CD writers that is mainly used in computer main frame panel is tested.
Background technology
Concerning computer main frame panel manufacturer, general system for computer motherboard must can dispatch from the factory through rigorous quality guarantee test process after completing.In general, the test job of existing system for computer motherboard has two kinds of programs, the program of System Operation test (running test) or CD writers test (burn in test).When carrying out any of above two kinds of host board testings, after CPU (central processing unit) (CPU) and internal memory and other peripherals as monitor, hard disk, floppy disk, mouse, motherboard, DIMM (DIMM), keyboard or the like all must being plugged motherboard, again with computer booting, computing machine just can carry out effective test job after loading relevant software (as operating system).
This existing host board testing method concerning the tester, quite inconvenience and considerable shortcoming arranged.For example, the tester must determine that earlier peripherals is good product, and needs to select compatible peripherals, therefore, just exhausts the installment work of considerable time in the selection of carrying out compatible peripheral devices and peripherals before test.In addition, in the time of need testing a large amount of motherboards simultaneously in batch process, this test mode also forms wasting space and the difficult problem of monitoring, and the method for solution has only the space of testers of increasing and test environment more.In addition, this existing main frame board measuring method also usually can only be done static CD writers or System Operation test, and the test effect is very not good yet.If will carry out dynamic CD writers test, then must expend the more equipment cost.
In order to improve above-mentioned shortcoming, industry develops and a cover as long as plug CPU at motherboard, need not plug the CD writers test card that other peripherals can the CD writers test.This kind CD writers test card utilization basic input output system of computer (Basic Input Output System, hereinafter to be referred as BIOS) selftest (Power On Self Test is hereinafter to be referred as POST) program is carried out the CD writers test job after the start carried out.This kind CD writers test card can read the mainboard system state of being checked by BIOS on the one hand, on the other hand, also provides the function of replacement (reset), allows the computing machine automatic reboot, and can reach the function of dynamic test.
This kind CD writers test card has been supplied the shortcoming of aforementioned techniques, allows the test job of motherboard can be under the situation of only plugging CPU and the test of automatic CD writers.But, this kind CD writers test card there is no the existing CD writers state of Faxian, and CD writers tester also can't in time know the situation of CD writers, must do the work of timing in addition by timer.Simultaneously, because the test job of system for computer motherboard usually must just can be realized its mistake through long-time test, therefore, the control of test duration finds that with timely mistake in the test process is just quite important.In addition, existing CD writers test card is not done test at the buffer of input-output unit on internal memory and the motherboard, and therefore, actual test job is also incomplete.
Summary of the invention
In order to allow the test job of motherboard CD writers more have fully, can carry out test repeatedly at the buffer of each different input-output unit on the motherboard, the invention provides the peripheral connecting interface burn-in recorder card of a computer system host plate, system host board is after plugging this burn-in recorder card, cooperate CPU (central processing unit) (CPU) and internal memory (as DRAM etc.), can carry out the CD writers test job.
For achieving the above object, peripheral component connecting interface burn-in recorder card of the present invention, it carries out data transmission to be used for the CD writers test of a motherboard by a peripheral component connecting interface bus, be characterized in, at least comprise: a CD writers test circuit, be used to test this motherboard several input-output units buffer operative scenario and produce the replacement pulse that test is finished; Further comprise CD writers program initial and test circuit and replacement pulse-generating circuit, wherein said CD writers program is initial to output signal to described replacement pulse-generating circuit and receives a feedback signal from it with test circuit; Described replacement pulse-generating circuit is exported a signal, and a CD writers process and a display circuit as a result, the output signal that receives described CD writers test circuit is used for receiving this replacement pulse that this CD writers test circuit produced and the working time of calculating this motherboard CD writers test job and shows whether this motherboard CD writers process system works as machine, further comprise a timing circuit and a burning number of times and system when the machine display circuit, described burning number of times and system receive the output signal of described replacement pulsing circuit when machine and display circuit.
Adopt such scheme, peripheral component connecting interface burn-in recorder card of the present invention by a CD writers test circuit and CD writers process and as a result display circuit formed, by carrying out the CD writers test procedure in the ROM (read-only memory) that the CD writers test circuit provided, can check its buffer one by one at the input-output device in the middle of the motherboard, check out the back at every turn and send a replacement pulse, can reach complete CD writers purpose.
Burn-in recorder card of the present invention is before test, earlier the ROM (read-only memory) in the middle of the CD writers test circuit is plugged, behind the computer booting, CPU (central processing unit) just begins to carry out the test procedure in the ROM (read-only memory), the test that this test procedure will be read and write at the buffer of the main input/output port on the computer main frame panel, execute that the program in the ROM (read-only memory) is a test period in the CD writers, burn-in recorder card is promptly sent cycle count and replacement (reset) signal after finishing a test period, makes computer main frame panel recover test mode again.The display circuit of burn-in recorder card is used to show whether CD writers institute's elapsed time and CD writers process have the situation when machine, if make a mistake in the middle of the test, CD writers test period counter will rest on the wrong periodicity that takes place, and LED and hummer caution tester are arranged.
For clearer understanding purpose of the present invention, characteristics and advantage, divide preferred embodiment to be elaborated to the present invention below in conjunction with accompanying drawing.
Description of drawings
Fig. 1 is the organigram of peripheral component connecting interface burn-in recorder card of the present invention;
Fig. 2 is a CD writers test circuit calcspar of the present invention;
Fig. 3 is a timing displaing circuit calcspar of the present invention;
Fig. 4 is that CD writers number of times of the present invention and system work as the machine circuit calcspar; And
Fig. 5 is the operation workflow figure of peripheral component connecting interface burn-in recorder card of the present invention.
Embodiment
Please refer to Fig. 1, it is the organigram of peripheral component connecting interface burn-in recorder card of the present invention.Peripheral component connecting interface burn-in recorder card of the present invention by CD writers test circuit 12 and CD writers process and as a result display circuit 15 constituted, wherein, the CD writers test circuit is constituted with test circuit 13 and replacement pulse-generating circuit 14 by the CD writers program is initial again; The CD writers process and as a result display circuit 15 constituted when machine display circuit 17 by timing and display circuit 16 and CD writers number of times and system.
When electric power starting, Basic Input or Output System (BIOS) (BIOS) promptly begins to carry out the action of autodiagnosis (POST), and simultaneously, timing on the burn-in recorder card and display circuit 16 come into operation, and carry out the work of timing.The signal 11 that the POST test of BIOS finishes can be by reading on the peripheral component connecting interface bus, CD writers test circuit 12 comes into operation at this moment, also being that the CD writers program is initial begins to start wherein CD writers program with test circuit 13, after test procedure is write one by one and is read the buffer of each input/output port on the motherboard, also be after the CD writers program executes, promptly produce a replacement pulse by replacement pulse-generating circuit 14, allow computing machine start shooting again, re-execute the CD writers process one time, can reach dynamic CD writers purpose like this.In addition, the replacement pulse then is sent to the CD writers process and the CD writers number of times of display circuit 15 and system are when machine display circuit 17 as a result, and whether CD writers number of times and system work as machine when 17 of machine display circuits can calculate number of times and the display system that CD writers tests.
CD writers test circuit of the present invention and CD writers process and the composition and the operation principles of display circuit as a result below will be described respectively.
Please refer to Fig. 2, it is a CD writers test circuit calcspar of the present invention.
There are address (AD[31..0]), initial frame (FRAME#), assembly to select (DEVSEL#), instruction (C/BE#), input and output to write (IOW), initiator on the peripheral component connecting interface bus (PCI BUS) and are ready for data such as (IRDY#) and other, distinguished the dominant right which assembly occupies PCI BUS by these data.
When BIOS POST was complete, BIOS can transfer to other internal memory with PCI BUS dominant right, and sends the data of address D C00.At this moment, address lock steering logic 201 is selected (DEVSEL#) signal with control frame (FRAME#) signal and assembly, and the data of this address DC00 are reached address bolt-lock array 202 with this address value of breech lock.After code translator (DC00) 203 decodings, send a signal (ROMCE) that makes ROM (read-only memory) 210 or ROM (read-only memory) 211 (by selector switch 212 decisions) activation.This activation signal will be read the call instruction signal through exporting with door 209 simultaneously with on the PCI BUS, read the call instruction signal and by instruction breech lock array 207 and instruction code translators 208 (C/BE#) data decoding of the instruction on the PCI BUS be got.So, program in ROM (read-only memory) 210 or the ROM (read-only memory) 211 is then passed through the latch circuit 214 of the latch unit 213 of ROM data to ROM data, is read out to ROM data impact damper 216 grades with ROM data impact damper 215.Program is carried out through the CPU on the motherboard, writes one by one and reads, with the situation of the buffer of checking each different input/output port.And the program end of ROM (read-only memory) 210 or ROM (read-only memory) 211 can produce on this address of reset signal 01H to I/O port 85H, and this signal is promptly reopened the instruction of machine and the beginning of computing system testing time as system.
In addition, the present invention has designed the function that error code shows of removing with BIOS POST equally, also be that code translator (I/O Port 84) 204 is with the IOW on the PCI BUS and IRDY# and AD[15..0] etc. behind the data decoding, data latching array 205 is pinned these data latch and is shown by seven-segment display 206.
Please refer to Fig. 3, timing displaing circuit calcspar of the present invention.Timing displaing circuit, the pulse wave that can utilize oscillator to produce, with this pulse wave in addition behind the frequency division, one second pulse wave in the time of can being produced as, this pulse wave of second is divided into sixtieth by frequency divider, promptly becomes one minute pulse wave, by that analogy.Now be described as follows:
When system picks up counting when starting shooting, produce the pulse wave of 4MHz frequency by the 4MHz oscillator of burn-in recorder card inside, this pulse wave is adjusted to the pulse wave of 2kHz by frequency divider 301, becomes the pulse wave of 1kHz through TQ D-flip flop 302, then, 1kHz becomes 1 second pulse wave through frequency divider 303.1 second pulse wave can show the second signal of its process, and produce 1 minute pulse wave after through two bit code output frequency dividers 304 through seven-segment decoder 307 and seven-segment display 311.1 minute pulse wave can show the sub-signal of process by seven-segment decoder 308 and seven-segment display 312, and produce 1 hour pulse wave again through two bit code output frequency dividers 305.1 hour pulse wave can pass through seven-segment decoder 309 and seven-segment decoder 310 and seven-segment display 313 and seven-segment display 314 to show hour signal of on time again through two bit code output frequency dividers 306.
Please refer to Fig. 4, CD writers number of times of the present invention and system are when the machine circuit calcspar.When replacement pulsed D 0 produces, promptly represent the test of motherboard CD writers through one-period; Simultaneously, code translator (I/O Port 85) 407 is responsible for the R AD[15..0 on the decoding PCI BUS] and IOW and IRDY# information, transfer to BIOS in the dominant right of PCI BUS and send signal simultaneously, two bit codes are counted and be encoded to this signal and replacement pulsed D 0 through delivering to two bit code counters 409 with door 408.This two bit code is the test period number, through seven-segment decoder 410 and seven-segment display 414, seven-segment decoder 411 and seven-segment display 415, the composition of seven-segment decoder 412 and seven-segment display 416 and seven-segment decoder 413 and seven-segment display 417 can show the number of times of test period process.
When system during when machine, test is no longer carried out, and then system will no longer produce replacement pulsed D 0, and also, replacement pulsed D 0 be accurate an of no-voltage.So system is behind machine, two bit code counters 409 will no longer be counted, and the count cycle will stop at the test period of taking place when machine.
The present invention promptly utilizes the caution purpose of the system that relatively reaches of test period number when machine, utilize the test period result of two different times to get final product, also promptly when machine takes place, as long as the test period number of a period of time has relatively been worked as machine as if the identical system that then represents.
Utilize five minutes for the first time then ten minutes period generator 401 produce produced a pulse first time in back five minutes in beginning periodic signal, produced the periodic signal of a pulse later on every ten minutes, this periodic signal is as the input of the clock pulse of latch unit 402, can each pulse produce during breech lock live in the enumeration data BCDA[3..0 that two bit code counters 409 are sent], BCDB[3..0]; And, produce the periodic signal of ten minutes first time with frequency divider 404, ten minutes periodic signals of later per ten minute one-period, this periodic signal is as the clock pulse input of latch unit 403, can each pulse produce during breech lock live in the enumeration data BCDA[3..0 that two bit code counters 409 are sent], BCDB[3..0].Will five minutes for the first time then ten minutes periodic signals and ten minutes periodic signals through or 405, the basic time pulse of device 406 as a comparison.
When the data of 403 breech locks of latch unit 402 and latch unit are identical, i.e. expression system works as machine, can send a rub-out signal with the caution tester.
In order to be described in more detail actual operation flow process of the present invention, please refer to Fig. 5, the operation workflow figure of peripheral component connecting interface burn-in recorder card of the present invention, this operation workflow comprises the following steps: start (step 510), system timing and demonstration (step 520), start test procedure (step 530), test procedure is carried out normal (step 540), (step 550) finished in test, system works as machine, and test procedure stops (step 560), test period rolling counters forward (step 570), test period display demonstration (step 580), system is when machine whether (step 590), counter and display stop and sending alarm signal (step 600).Please cooperate simultaneously with reference to figure 2.
When system power supply was opened, computing machine promptly entered open state (step 510), and at this moment, the BIOS of computing machine promptly begins to carry out the flow process of POST, and simultaneously, what show on the burn-in recorder card of the present invention that BIOS sent removes error code to seven-segment display 206.In addition, in case electric power starting, the work (step 520) that burn-in recorder card of the present invention promptly picks up counting and shows.
After BIOS carries out POST, search the ROM (read-only memory) of burn-in recorder card of the present invention, system promptly begins to read the test procedure in the ROM (read-only memory), and this promptly starts test procedure (step 530).Access is carried out in being at the buffer in the middle of each input-output unit on the motherboard that test procedure is put down in writing one by one, so, in case the startup test procedure, burn-in recorder card of the present invention just begins to carry out at the buffer of the input-output unit on the motherboard action of access.As long as the numerical value in the middle of depositing the central numerical value of buffer in and taking out buffer is identical, the CD writers test procedure judges that promptly access is normal, also is that the input-output unit running on the motherboard is normal.In case its access action of the buffer of all input-output units is all normal on the motherboard, the system that promptly is judged as also is that a test period (step 550) is finished in the CD writers test job by test (step 540).After finishing a CD writers test job, the CD writers test procedure promptly can be sent a reset signal by CPU and reopen machine by system, lays equal stress on and gets back to step 510, repeats the work of a CD writers test again.As long as system testing is smooth, the present invention promptly constantly repeating step 510 ~ 550 allow the access status of the buffer of each input-output unit on the continuous Test Host plate of system, just carry out the CD writers test job.
If test process generation access errors, the CD writers test procedure will the system of being judged as be made mistakes and is sent a system halt signal, and the system halt test stops (step 560).Burn-in recorder card will stop to show the count cycle this moment, and send alarm signal (step 600).Wherein, alarm signal can be a hummer, is perhaps sent by light emitting diode.
In addition, the reset signal that is sent is finished in CD writers test each time delivered to test period rolling counters forward (step 570), and pass through test period display demonstration (step 580) periodicity of the successful test of process altogether, like this, can understand the process situation of test by display.
Do not taking place under the machine situation, just, under all normal situation of CD writers test process each time, burn-in recorder card of the present invention will constantly allow system reset, and carry out dynamic CD writers work.In case system works as machine, system promptly can send alarm signal, to remind the CD writers tester.By burn-in recorder card of the present invention, the tester more knows CD writers test institute elapsed time, and the progress (number of times) of CD writers test.
Peripheral component connecting interface burn-in recorder card provided by the present invention can allow the CD writers test job of system for computer motherboard more efficient, and stability and fiduciary level when improving the system for computer motherboard and dispatching from the factory.In addition, still can save a large amount of peripherals expenses, more can save expending of space required when testing and time.No matter carry out static state or dynamic CD writers program, utilization the present invention also can reduce in the past the cost that must expend.
The replacement pulse that the present invention is produced during by system's CD writers itself has a clock pulse generation device as the starting point of count cycle, therefore, not influenced by the clock pulse of system itself.So, system when machine, the periodicity that the present invention can in time notify wrong time that the tester knows that promptly test takes place and test to make a mistake.
Though the present invention is disclosed by preferred embodiment, yet it is not to be used to limit the present invention, any those of ordinary skill in the art, can make also under the premise of without departing from the spirit of the present invention that all equivalence changes and equivalence is replaced, these equivalences change and equivalent replacement all should be included in the claim that appended claims limits.

Claims (12)

1. peripheral component connecting interface burn-in recorder card, it carries out data transmission to be used for the CD writers test of a motherboard by a peripheral component connecting interface bus, it is characterized in that, comprises at least:
One CD writers test circuit, be used to test this motherboard several input-output units buffer operative scenario and produce the replacement pulse that test is finished; Further comprise CD writers program initial and test circuit and replacement pulse-generating circuit, wherein said CD writers program is initial to output signal to described replacement pulse-generating circuit and receives a feedback signal from it with test circuit; Described replacement pulse-generating circuit is exported a signal, and
One CD writers process and display circuit as a result, the output signal that receives described CD writers test circuit is used for receiving this replacement pulse that this CD writers test circuit produced and the working time of calculating this motherboard CD writers test job and shows whether this motherboard CD writers process system works as machine, further comprise a timing circuit and a burning number of times and system when the machine display circuit, described burning number of times and system receive the output signal of described replacement pulsing circuit when machine and display circuit.
2. peripheral component connecting interface burn-in recorder card as claimed in claim 1 is characterized in that, this CD writers test circuit comprises:
One address/instruction breech lock control logic circuit further comprises:
Address lock steering logic is connected in peripheral component connecting interface, receives a frame (FRAME#) signal and an assembly and selects (DEVSEL#) signal;
The address latch array links to each other with described address lock steering logic, and described frame (FRAME#) signal and assembly are selected (DEVSEL#) signal controlling and breech lock; Also be connected to the peripheral component connecting interface bus, receive an address signal (AD[31..0]) and breech lock;
Instruction breech lock array is connected to the peripheral component connecting interface bus, receives a steering order (C/BE#[3..0]) signal;
Command decoder links to each other with described instruction breech lock array, from described steering order (C/BE#[3..0]) signal solve a readable instruction and deliver to one with door;
One decoding scheme is connected, further comprises with described address/instruction breech lock control logic circuit:
Be used for code translator, receive the OPADD of described address latch array, decipher and produce an activation signal that makes the ROM (read-only memory) activation the address decoding of described address latch array institute breech lock;
System's autodiagnosis sign indicating number is carried out decoders for decoding, be connected to the peripheral component connecting interface bus, system's autodiagnosis sign indicating number of its Basic Input or Output System (BIOS) of exporting is deciphered;
The data latching array is connected to and described system's autodiagnosis sign indicating number is carried out decoders for decoding;
Display device is connected to described data latching array, shows this system's autodiagnosis sign indicating number;
One ROM (read-only memory) receives the enable signal that described decoding scheme is exported, and is used to put down in writing a CD writers test procedure, as the process control of control CD writers process; And
The latch circuit of several ROM data, be connected with described ROM (read-only memory), be used to export the programmed instruction of this ROM (read-only memory), and the output data 00H that exports this rom program front end arrives a specific input/output port 85H, and an output data 01H who exports this rom program rear end produces this reset signal afterwards to this input/output port 85H; Wherein the latch circuit of each described ROM data is connected to a ROM data impact damper and output data.
3. peripheral component connecting interface burn-in recorder card as claimed in claim 1, this CD writers test circuit comprises:
One address/instruction breech lock control logic circuit further comprises,
Address lock steering logic is connected to peripheral component connecting interface, receives a frame (FRAME#) signal and an assembly and selects (DEVSEL#) signal;
The address latch array links to each other with described address lock steering logic, and control and the described frame of breech lock (FRAME#) signal and assembly are selected (DEVSEL#) signal; Also be connected to the peripheral component connecting interface bus, receive an address signal (AD[31..0]) and breech lock;
Instruction breech lock array is connected to the peripheral component connecting interface bus, receives a steering order (C/BE#[3..0]) signal;
Command decoder links to each other with described instruction breech lock array, a readable instruction that solves from described steering order (C/BE#[3..0]) signal and deliver to one with door;
One decoding scheme, be connected with described address/instruction breech lock control logic circuit, further comprise, be used for code translator with the address decoding of described address latch array institute breech lock, receive the OPADD of described address latch array, decipher and produce an activation signal that makes this ROM (read-only memory) activation;
System's autodiagnosis code decoder is connected to the peripheral component connecting interface bus, and system's autodiagnosis sign indicating number of its Basic Input or Output System (BIOS) of exporting is deciphered;
The data latching array is connected to described system autodiagnosis code decoder;
Display device is connected to described data latching array, shows this system's autodiagnosis sign indicating number;
A pair of ROM (read-only memory) receives the enable signal that described decoding scheme is exported, and respectively is used to put down in writing a CD writers test procedure, as the process control of control CD writers process; Comprise that also a selector switch selects this to ROM (read-only memory), both select one this ROM (read-only memory) as practical operation; And
The latch circuit of several ROM data, be connected with described selector switch, be used to export the programmed instruction of this ROM (read-only memory), and the output data 00H that exports this rom program front end arrives a specific input/output port 85H, and an output data 01H who exports this rom program rear end arrives this input/output port 85H, and then produces this reset signal; Wherein the latch circuit of each described ROM data is connected to a ROM data impact damper and output data.
4. peripheral component connecting interface burn-in recorder card as claimed in claim 1 is characterized in that, this reset signal is by this peripheral component connecting interface bus computing machine to be started shooting again.
5. peripheral component connecting interface burn-in recorder card as claimed in claim 1 is characterized in that, this timing circuit is the pulse institute activation during by system boot, comprising:
One timer is made up of several counters and latch unit, is used to produce a time clock pulse and one second and one minute and one hour signal; And
One display circuit, be used to show this second and this branch and this hour signal.
6. peripheral component connecting interface burn-in recorder card as claimed in claim 1 is characterized in that, it is by this replacement pulse institute activation that this CD writers number of times and system work as the machine display circuit, comprising:
One-period counter, be used to calculate this replacement umber of pulse and be one test period number;
Two latch circuits are connected with this period counter respectively, are used for this number of two time points of bolt-lock test period;
One comparator circuit is connected with these two latch circuits, is used for this number of these two time points relatively, to send a compare result signal test period; And
One display circuit is used to show this number and this test result signal test period.
7. peripheral component connecting interface burn-in recorder card as claimed in claim 6 is characterized in that, these two time points this test period, number was identical the time, this comparator circuit is sent an alarm signal.
8. peripheral component connecting interface burn-in recorder card as claimed in claim 7 is characterized in that, this alarm signal is sent by a hummer or a light emitting diode.
9. peripheral component connecting interface burn-in recorder card as claimed in claim 6 is characterized in that, this display circuit comprise one test period display and a system when the machine display.
10. peripheral component connecting interface burn-in recorder card as claimed in claim 9 is characterized in that, this test period display be to show test institute elapsed time.
11. CD writers method of testing that is used for peripheral component connecting interface burn-in recorder card as claimed in claim 1 or 2, wherein said burn-in recorder card has a ROM (read-only memory), it is characterized in that this method is to begin, and comprises the following steps: after this burn-in recorder card activates
Deposit buffer one setting value of these several input-output units on this motherboard in;
The buffer one that takes out these several input-output units on this motherboard deposits setting value in; And
When from these several input-output units buffer took out that this deposits setting value in when identical with this setting value, send a reset signal; When from these several input-output units buffer took out that this deposits setting value and this setting value in not simultaneously, send a system halt signal, this CD writers process and as a result display circuit timing circuit with promptly stop.
12. CD writers method of testing that is used for peripheral component connecting interface burn-in recorder card as claimed in claim 3, wherein said burn-in recorder card has a pair of ROM (read-only memory), it is characterized in that this method is to begin, and comprises the following steps: after this burn-in recorder card activates
Deposit buffer one setting value of these several input-output units on this motherboard in;
The buffer one that takes out these several input-output units on this motherboard deposits setting value in; And
When from these several input-output units buffer took out that this deposits setting value in when identical with this setting value, send a reset signal; When from these several input-output units buffer took out that this deposits setting value and this setting value in not simultaneously, send a system halt signal, this CD writers process and as a result display circuit timing circuit with promptly stop.
CN 01143989 2001-12-24 2001-12-24 Peripheral component connecting interface burn-in recorder card Expired - Fee Related CN1205552C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 01143989 CN1205552C (en) 2001-12-24 2001-12-24 Peripheral component connecting interface burn-in recorder card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 01143989 CN1205552C (en) 2001-12-24 2001-12-24 Peripheral component connecting interface burn-in recorder card

Publications (2)

Publication Number Publication Date
CN1428703A CN1428703A (en) 2003-07-09
CN1205552C true CN1205552C (en) 2005-06-08

Family

ID=4677288

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 01143989 Expired - Fee Related CN1205552C (en) 2001-12-24 2001-12-24 Peripheral component connecting interface burn-in recorder card

Country Status (1)

Country Link
CN (1) CN1205552C (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100337223C (en) * 2004-07-16 2007-09-12 英业达股份有限公司 Structure capable of making burning program directly on the mainboard
CN1331067C (en) * 2004-07-16 2007-08-08 英业达股份有限公司 Burning adapter board

Also Published As

Publication number Publication date
CN1428703A (en) 2003-07-09

Similar Documents

Publication Publication Date Title
US6536029B1 (en) Programmable logic controller method, system and apparatus
US6532552B1 (en) Method and system for performing problem determination procedures in hierarchically organized computer systems
US4644487A (en) Method and apparatus for verifying the design of digital electronic components
Rela et al. Experimental evaluation of the fail-silent behaviour in programs with consistency checks
KR20090118863A (en) Reducing power-on time by simulating operating system memory hot add
US7844868B2 (en) System and method for implementing a stride value for memory testing
US4752928A (en) Transaction analyzer
US7007268B2 (en) Method and apparatus for debugging in a massively parallel processing environment
US8495626B1 (en) Automated operating system installation
CN113157508B (en) Test method, system, device, equipment and storage medium of embedded system
CN111221800A (en) Database migration method and device, electronic equipment and storage medium
CN101814217A (en) Method for testing self-service device, device and system
US20080306717A1 (en) Cooperative simulation system
US5978946A (en) Methods and apparatus for system testing of processors and computers using signature analysis
CN107832176A (en) Hard disk pressure automatic test approach and system under a kind of Windows
CN1205552C (en) Peripheral component connecting interface burn-in recorder card
Johansson et al. On the impact of injection triggers for OS robustness evaluation
CN1244864C (en) Information processing system with debug function on initializing and its method
US5095483A (en) Signature analysis in physical modeling
CN111274132A (en) Method and device for testing reliability of data cleaning function of device driver
CN109117299A (en) The error detecting device and its debugging method of server
CN1223942C (en) Automatic periodic test system and method for power switch of computer equipment
US11763913B2 (en) Automated testing of functionality of multiple NVRAM cards
US20200341875A1 (en) Feedback from higher-level verification to improve unit verification effectiveness
CN111209146A (en) RAID card aging test method and system

Legal Events

Date Code Title Description
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C19 Lapse of patent right due to non-payment of the annual fee
CF01 Termination of patent right due to non-payment of annual fee