CN117762340A - Dual-core read-write method, device, equipment and storage medium - Google Patents
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Abstract
The application provides a dual-core read-write method, a device, equipment and a storage medium, and relates to the technical field of data processing. When the method is executed, firstly, a target core is controlled to send an interrupt signal to another core, then, the interrupt signal is responded, a first local lock state of the other core is obtained, then, whether the first local lock state is 0 is judged, if not, an inexecutable read-write flag of the other core is set, and the target core is informed of inexecutable read-write operation in response to the inexecutable flag; if yes, the executable flag of the other core is set, and the target core is informed to execute the read-write operation in response to the executable flag. Therefore, the local lock state of the other core is obtained through the interrupt signal to judge whether the other core is reading and writing, so that the problem of data competition during dual-core reading and writing can be effectively solved, the method has no dependence on a platform, and the difficulty of avoiding the problem of data competition during dual-core reading and writing can be reduced.
Description
Technical Field
The present disclosure relates to the field of data processing technologies, and in particular, to a dual-core read-write method, device, apparatus, and storage medium.
Background
Dual core systems have two independent processor cores, but when both cores access the same piece of memory at the same time, since each core has its own cache, when one core modifies the data but has not yet written back to memory, the other core may read old or inconsistent values. Secondly, when two cores perform read-write operation on shared data at the same time, data competition may occur if the shared data is protected without a correct synchronization mechanism. Such contention may lead to unexpected results such as data corruption, deadlocks, livelock, race conditions, and the like. In the prior art, dual-core read-write can be performed by implementing a mutual exclusive lock through a hardware lock or an atomic lock to avoid data competition, but the hardware lock and the atomic lock have higher platform dependency, which results in difficult implementation.
In view of the above, how to reduce the difficulty of avoiding the data contention problem during dual-core read/write is a problem that needs to be solved by those skilled in the art.
Disclosure of Invention
In view of this, the present application provides a dual-core read-write method, apparatus, device and storage medium, which aims to reduce the difficulty of avoiding the problem of data contention during dual-core read-write.
In a first aspect, the present application provides a dual-core read-write method, including:
the control target core sends an interrupt signal to another core;
in response to the interrupt signal, acquiring a first local lock state of the other core;
judging whether the first local lock state is 0;
if not, setting up the non-executable mark of the other core;
notifying the target core that a read-write operation is not executable in response to the non-executable flag;
if yes, setting up an executable mark of the other core;
and responding to the executable mark, and notifying the target core to execute read-write operation.
Optionally, before the control target core sends the interrupt request signal to another core, the method further includes:
registering an interrupt signal for each core of the dual-core processor, wherein the interrupt signal is used for receiving a request message or a response message of the other core;
creating a local lock for each core of the dual-core processor; when a core is in a read-write state, setting a corresponding local lock state of the core to 1; when the core is not in the read-write state, the corresponding local lock state of the core is set to 0.
Optionally, before the acquiring the first local lock state of the other core in response to the interrupt signal, the method further includes:
inquiring whether the sending state management identifier of the other core is 0;
if yes, executing the step of responding to the interrupt signal and acquiring a first local lock state of the other core;
if not, the step of setting the non-executable flag of the other core is executed.
Optionally, before the querying whether the transmission state management identifier of the other core is 0, the method further includes:
creating a sending state management identifier for each core of the dual-core processor; when the interrupt signal of the core is in a sending state, the corresponding sending state management mark of the core is 1; when the interrupt signal of the core is not in the transmission state, the transmission state management flag corresponding to the core is 0.
In a second aspect, the present application provides a dual-core read-write apparatus, including:
the control module is used for controlling the target core to send an interrupt signal to the other core;
the acquisition module is used for responding to the interrupt signal and acquiring a first local lock state of the other core;
the judging module is used for judging whether the first local lock state is 0;
the first setting-up module is used for setting up the non-executable mark of the other core if not;
the first notification module is used for responding to the non-executable mark and notifying the target core that the read-write operation is not executable;
the second setting-up module is used for setting up the executable mark of the other core if yes;
and the second notification module is used for responding to the executable mark and notifying the target core to execute read-write operation.
Optionally, the apparatus further includes:
registering means for registering an interrupt signal for each core of the dual-core processor, respectively, the interrupt signal being for receiving a request message or a response message of another core;
a first creation module, configured to create a local lock for each core of the dual-core processor; when a core is in a read-write state, setting a corresponding local lock state of the core to 1; when the core is not in the read-write state, the corresponding local lock state of the core is set to 0.
Optionally, the apparatus further includes:
the inquiry module is used for inquiring whether the sending state management identifier of the other core is 0;
the first execution module is used for executing the step of responding to the interrupt signal and acquiring a first local lock state of the other core if the first local lock state is the same as the first local lock state;
and the second execution module is used for executing the step of setting the non-executable mark of the other core if not.
Optionally, the apparatus further includes:
the second creation module is used for creating a sending state management identifier for each core of the dual-core processor respectively; when the interrupt signal of the core is in a sending state, the corresponding sending state management mark of the core is 1; when the interrupt signal of the core is not in the transmission state, the transmission state management flag corresponding to the core is 0.
In a third aspect, embodiments of the present application provide a computer device, comprising: the dual-core read-write method comprises a memory, a processor and a computer program stored in the memory and capable of running on the processor, wherein the processor realizes the dual-core read-write method according to any implementation mode of the first aspect of the embodiment of the application when executing the computer program.
In a fourth aspect, embodiments of the present application provide a computer readable storage medium, where instructions are stored, when the instructions are executed on a terminal device, cause the terminal device to perform a dual-core read-write method as described in any implementation manner of the first aspect of embodiments of the present application.
The application provides a dual-core read-write method. When the method is executed, firstly, a target core is controlled to send an interrupt signal to another core, then, the interrupt signal is responded, a first local lock state of the other core is obtained, then, whether the first local lock state is 0 is judged, if not, an inexecutable read-write flag of the other core is set, and the target core is informed of inexecutable read-write operation in response to the inexecutable flag; if yes, the executable flag of the other core is set, and the target core is informed to execute the read-write operation in response to the executable flag. Therefore, the local lock state of the other core is obtained through the interrupt signal to judge whether the other core is reading and writing, so that the problem of data competition during dual-core reading and writing can be effectively solved, the method has no dependence on a platform, and the difficulty of avoiding the problem of data competition during dual-core reading and writing can be reduced.
Drawings
In order to more clearly illustrate the present embodiments or the technical solutions in the prior art, the drawings that are required for the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flowchart of a dual-core read-write method according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of a dual-core read-write device according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of a computer device according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. The application provides a dual-core read-write method, a device, equipment and a storage medium, which are used for relating to the technical field of data processing. The foregoing is merely an example, and is not intended to limit the application fields of the method and apparatus names provided in the present application.
Dual core systems have two independent processor cores, but when both cores access the same piece of memory at the same time, since each core has its own cache, when one core modifies the data but has not yet written back to memory, the other core may read old or inconsistent values. Secondly, when two cores perform read-write operation on shared data at the same time, data competition may occur if the shared data is protected without a correct synchronization mechanism. Such contention may lead to unexpected results such as data corruption, deadlocks, livelock, race conditions, and the like. In the prior art, dual-core read-write can be performed by implementing a mutual exclusive lock through a hardware lock or an atomic lock to avoid data competition, but the hardware lock and the atomic lock have higher platform dependency, which results in difficult implementation.
The inventor provides the technical scheme of the application through research, firstly, a target core is controlled to send an interrupt signal to another core, then the interrupt signal is responded, a first local lock state of the other core is obtained, whether the first local lock state is 0 is judged, if not, an inexecutable read-write flag of the other core is set, and the target core is informed of inexecutable read-write operation in response to the inexecutable flag; if yes, the executable flag of the other core is set, and the target core is informed to execute the read-write operation in response to the executable flag. Therefore, the local lock state of the other core is obtained through the interrupt signal to judge whether the other core is reading and writing, so that the problem of data competition during dual-core reading and writing can be effectively solved, the method has no dependence on a platform, and the difficulty of avoiding the problem of data competition during dual-core reading and writing can be reduced.
In order to provide a better understanding of the present application, those skilled in the art will now make further details of the present application with reference to the drawings and detailed description. It will be apparent that the described embodiments are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure. For convenience of description, only a portion related to the present invention is shown in the drawings. Embodiments and features of embodiments in this application may be combined with each other without conflict.
Referring to fig. 1, fig. 1 is a flowchart of a dual-core read-write method provided in an embodiment of the present application, including:
s101: an interrupt signal is sent to another core.
Before executing step S101, firstly registering an interrupt signal for each core of the dual-core processor, where the interrupt signal is used to receive a request message or a response message of another core, then creating a local lock for each core of the dual-core processor, where when the core is in a read-write state, the local lock state corresponding to the core is set to 1; when the core is not in the read-write state, the local lock state corresponding to the core is set to 0.
When the target core needs to read and write the memory, an interrupt signal is sent to the other core.
S102: in response to the interrupt signal, a first local lock state is acquired.
After receiving an interrupt signal sent by a target core, the other core responds to the interrupt signal to acquire a first local lock state of the other core.
In some embodiments, before performing step S102, a transmission status management identifier may also be created for each core of the dual-core processor; when the interrupt signal of the core is in a sending state, the sending state management identifier corresponding to the core is 1; when the interrupt signal of the core is not in the transmission state, the transmission state management identifier corresponding to the core is 0. After receiving the interrupt signal sent by the target core, the other core first queries whether the sending status management identifier of the other core is 0, if so, step S102 is executed, and if not, step S104 is executed.
S103: if the first local lock state is not 0, the disable flag is set.
If the first local lock state of the other core is not 0, that is, the first local lock state of the other core is 1, the other core is indicated to be performing read-write operation, and the non-executable flag is set.
S104: in response to the non-executable flag, the target core is notified that the read-write operation is not executable.
When the non-executable standard of the other core is set up, the other core responds to the interrupt signal sent by the target core, namely, the target core is informed of non-executable read-write operation.
S105: if the first local lock state is 0, the executable flag is set.
If the first local lock state of the other core is 0, the other core is indicated not to perform read-write operation, and the executable flag is set.
S106: and in response to the executable mark, notifying the target core to execute the read-write operation.
When the executable flag of the other core is set, the other core responds to the interrupt signal sent by the target core, namely, the target core is informed to execute the read-write operation.
In the embodiment of the application, firstly, a control target core sends an interrupt signal to another core, then, the control target core responds to the interrupt signal, a first local lock state of the other core is obtained, then, whether the first local lock state is 0 is judged, if not, an inexecutable read-write flag of the other core is set, and the target core is informed of inexecutable read-write operation in response to the inexecutable flag; if yes, the executable flag of the other core is set, and the target core is informed to execute the read-write operation in response to the executable flag. Therefore, the local lock state of the other core is obtained through the interrupt signal to judge whether the other core is reading and writing, so that the problem of data competition during dual-core reading and writing can be effectively solved, the method has no dependence on a platform, and the difficulty of avoiding the problem of data competition during dual-core reading and writing can be reduced.
In some embodiments, when a core that sends a request receives no interrupt in response to another core, the core may send an interrupt signal again after a few seconds, and the core sends a state management flag of 0 at intervals, so that the interrupt signal can be normally received, that is, another core may still send a request and obtain the operation authority while not responding to the request. And after the core which sends the request retries for a plurality of times, when the overtime time is exceeded, the scheduling of the task is exited. After the time-out is over, the operation authority is required to be reapplied when the next task is scheduled after the current scheduling fails.
The embodiments of the present application provide some specific implementations of a dual-core read-write method, and based on this, the present application further provides a corresponding apparatus. The apparatus provided in the embodiments of the present application will be described from the viewpoint of functional modularization.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a dual-core read-write device according to an embodiment of the present application, where the dual-core read-write device 200 includes:
a control module 210, configured to control the target core to send an interrupt signal to another core;
an obtaining module 220, configured to obtain a first local lock state of the other core in response to the interrupt signal;
a determining module 230, configured to determine whether the first local lock state is 0;
a first set-up module 240, configured to set up the non-executable flag of the other core if not;
a first notification module 250, configured to notify the target core that the read-write operation is not executable in response to the non-executable flag;
a second setting module 260, configured to set an executable flag of the other core if yes;
and the second notification module 270 is configured to notify the target core to perform a read-write operation in response to the executable flag.
Optionally, the apparatus 200 further includes:
registering means for registering an interrupt signal for each core of the dual-core processor, respectively, the interrupt signal being for receiving a request message or a response message of another core;
a first creation module, configured to create a local lock for each core of the dual-core processor; when a core is in a read-write state, setting a corresponding local lock state of the core to 1; when the core is not in the read-write state, the corresponding local lock state of the core is set to 0.
Optionally, the apparatus 200 further includes:
the inquiry module is used for inquiring whether the sending state management identifier of the other core is 0;
the first execution module is used for executing the step of responding to the interrupt signal and acquiring a first local lock state of the other core if the first local lock state is the same as the first local lock state;
and the second execution module is used for executing the step of setting the non-executable mark of the other core if not.
Optionally, the apparatus 200 further includes:
the second creation module is used for creating a sending state management identifier for each core of the dual-core processor respectively; when the interrupt signal of the core is in a sending state, the corresponding sending state management mark of the core is 1; when the interrupt signal of the core is not in the transmission state, the transmission state management flag corresponding to the core is 0.
The embodiment of the application also provides corresponding equipment and a computer storage medium, which are used for realizing the scheme provided by the embodiment of the application.
As shown in fig. 3, the computer device 01 is in the form of a general purpose computing device. The components of the computer device 01 may include, but are not limited to: one or more processors or processing units 03, a system memory 08, and a bus 04 that connects the various system components (including the system memory 08 and processing units 03).
Bus 04 represents one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processor, and a local bus using any of a variety of bus architectures. By way of example, and not limitation, such architectures include Industry Standard Architecture (ISA) bus, micro channel architecture (MAC) bus, enhanced ISA bus, video Electronics Standards Association (VESA) local bus, and Peripheral Component Interconnect (PCI) bus.
The computer device 01 typically includes a variety of computer system readable media. Such media can be any available media that can be accessed by the computer device 01 and includes both volatile and nonvolatile media, removable and non-removable media.
The system memory 08 may include computer system readable media in the form of volatile memory, such as Random Access Memory (RAM) 09 and/or cache memory 10. The computer device 01 may further include other removable/non-removable, volatile/nonvolatile computer system storage media. By way of example only, storage system 11 may be used to read from or write to non-removable, nonvolatile magnetic media (not shown in FIG. 3, commonly referred to as a "hard disk drive"). Although not shown in fig. 3, a magnetic disk drive for reading from and writing to a removable non-volatile magnetic disk (e.g., a "floppy disk"), and an optical disk drive for reading from or writing to a removable non-volatile optical disk (e.g., a CD-ROM, DVD-ROM, or other optical media) may be provided. In these cases, each drive may be coupled to bus 04 through one or more data medium interfaces. The memory 08 may include at least one program product having a set (e.g., at least one) of program modules configured to carry out the functions of the embodiments of the invention.
A program/utility 12 having a set (at least one) of program modules 13 may be stored in, for example, memory 08, such program modules 13 including, but not limited to, an operating system, one or more application programs, other program modules, and program data, each or some combination of which may include an implementation of a network environment. Program modules 13 typically carry out the functions and/or methods of the embodiments described herein.
The computer device 01 may also communicate with one or more external devices 02 (e.g., keyboard, pointing device, display 07, etc.), one or more devices that enable a user to interact with the computer device 01, and/or any devices (e.g., network card, modem, etc.) that enable the computer device 01 to communicate with one or more other computing devices. Such communication may be through an input/output (I/O) interface 06. Moreover, the computer device 01 may also communicate with one or more networks such as a Local Area Network (LAN), a Wide Area Network (WAN) and/or a public network, such as the Internet, through the network adapter 05. As shown in fig. 3, the network adapter 05 communicates with other modules of the computer device 01 via bus 04. It should be appreciated that although not shown in fig. 3, other hardware and/or software modules may be used in connection with the computer device 01, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, data backup storage systems, and the like.
The processor unit 03 executes various functional applications and data processing by running programs stored in the system memory 08, for example, implementing a dual-core read-write method provided in the embodiments of the present application.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
From the above description of embodiments, it will be apparent to those skilled in the art that all or part of the steps of the above described example methods may be implemented in software plus general hardware platforms. Based on such understanding, the technical solutions of the present application may be embodied in the form of a software product, which may be stored in a storage medium, such as a read-only memory (ROM)/RAM, a magnetic disk, an optical disk, or the like, including several instructions for causing a computer device (which may be a personal computer, a server, or a network communication device such as a router) to perform the methods described in the embodiments or some parts of the embodiments of the present application.
In this specification, each embodiment is described in a progressive manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments. In particular, for the device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments for relevant points. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
The foregoing is merely exemplary embodiments of the present application and is not intended to limit the scope of the present application.
Claims (10)
1. A dual-core read-write method, comprising:
the control target core sends an interrupt signal to another core;
in response to the interrupt signal, acquiring a first local lock state of the other core;
judging whether the first local lock state is 0;
if not, setting up the non-executable mark of the other core;
notifying the target core that a read-write operation is not executable in response to the non-executable flag;
if yes, setting up an executable mark of the other core;
and responding to the executable mark, and notifying the target core to execute read-write operation.
2. The method of claim 1, wherein before the control target core sends an interrupt request signal to another core, further comprising:
registering an interrupt signal for each core of the dual-core processor, wherein the interrupt signal is used for receiving a request message or a response message of the other core;
creating a local lock for each core of the dual-core processor; when a core is in a read-write state, setting a corresponding local lock state of the core to 1; when the core is not in the read-write state, the corresponding local lock state of the core is set to 0.
3. The method of claim 1, wherein, in response to the interrupt signal, prior to acquiring the first local lock state of the other core, the method further comprises:
inquiring whether the sending state management identifier of the other core is 0;
if yes, executing the step of responding to the interrupt signal and acquiring a first local lock state of the other core;
if not, the step of setting the non-executable flag of the other core is executed.
4. The method of claim 3, wherein prior to said querying whether the transmit status management flag of the other core is 0, the method further comprises:
creating a sending state management identifier for each core of the dual-core processor; when the interrupt signal of the core is in a sending state, the corresponding sending state management mark of the core is 1; when the interrupt signal of the core is not in the transmission state, the transmission state management flag corresponding to the core is 0.
5. A dual-core read-write apparatus, comprising:
the control module is used for controlling the target core to send an interrupt signal to the other core;
the acquisition module is used for responding to the interrupt signal and acquiring a first local lock state of the other core;
the judging module is used for judging whether the first local lock state is 0;
the first setting-up module is used for setting up the non-executable mark of the other core if not;
the first notification module is used for responding to the non-executable mark and notifying the target core that the read-write operation is not executable;
the second setting-up module is used for setting up the executable mark of the other core if yes;
and the second notification module is used for responding to the executable mark and notifying the target core to execute read-write operation.
6. The apparatus of claim 5, wherein the apparatus further comprises:
registering means for registering an interrupt signal for each core of the dual-core processor, respectively, the interrupt signal being for receiving a request message or a response message of another core;
a first creation module, configured to create a local lock for each core of the dual-core processor; when a core is in a read-write state, setting a corresponding local lock state of the core to 1; when the core is not in the read-write state, the corresponding local lock state of the core is set to 0.
7. The apparatus of claim 5, wherein the apparatus further comprises:
the inquiry module is used for inquiring whether the sending state management identifier of the other core is 0;
the first execution module is used for executing the step of responding to the interrupt signal and acquiring a first local lock state of the other core if the first local lock state is the same as the first local lock state;
and the second execution module is used for executing the step of setting the non-executable mark of the other core if not.
8. The apparatus of claim 7, wherein the apparatus further comprises:
the second creation module is used for creating a sending state management identifier for each core of the dual-core processor respectively; when the interrupt signal of the core is in a sending state, the corresponding sending state management mark of the core is 1; when the interrupt signal of the core is not in the transmission state, the transmission state management flag corresponding to the core is 0.
9. A computer device, comprising: a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the dual-core read-write method according to any one of claims 1-4 when the computer program is executed.
10. A computer readable storage medium, characterized in that the computer readable storage medium has stored therein instructions, which when run on a terminal device, cause the terminal device to perform the dual-core read-write method according to any of claims 1-4.
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