CN117723892A - Cable fault detection system - Google Patents

Cable fault detection system Download PDF

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Publication number
CN117723892A
CN117723892A CN202410170973.3A CN202410170973A CN117723892A CN 117723892 A CN117723892 A CN 117723892A CN 202410170973 A CN202410170973 A CN 202410170973A CN 117723892 A CN117723892 A CN 117723892A
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China
Prior art keywords
resistor
amplifier
host
slave
cable
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CN202410170973.3A
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CN117723892B (en
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张旭
杨晓宏
李欢
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XI'AN BOYUAN ELECTRIC CO Ltd
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XI'AN BOYUAN ELECTRIC CO Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y04INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
    • Y04SSYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
    • Y04S10/00Systems supporting electrical power generation, transmission or distribution
    • Y04S10/50Systems or methods supporting the power network operation or management, involving a certain degree of interaction with the load-side end user applications
    • Y04S10/52Outage or fault management, e.g. fault detection or location

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  • Locating Faults (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)

Abstract

The invention discloses a cable fault detection system, which belongs to the technical field of cable detection and comprises: the system comprises a host computer, a slave computer and a background monitoring system; the host computer and the slave computer have the same structure, the host computer and the slave computer are respectively connected at two ends of the cable, the host computer is in communication connection with the slave computer, and the host computer is connected with the background monitoring system; the system comprises a host, a power supply control unit and a power supply control unit, wherein a current detection unit is arranged in the host and is used for detecting current when a cable runs and detecting a pulse current signal when the cable fails, and the pulse current signal is used as an excitation source for self-checking of the host and the slave; a signal processing unit is arranged in the host, and the signal processing unit is connected with the current detection unit; the monitoring system can be convenient, and in the cable fault positioning monitoring, the self-checking and communication verification process of the equipment can be made up, so that the equipment can be ensured to safely and reliably detect the cable.

Description

Cable fault detection system
Technical Field
The invention relates to the technical field of cable detection, in particular to a cable fault detection system.
Background
With the continuous development of the power distribution system, the proportion of cable lines is continuously improved, and the cable fault rate is gradually increased due to the factors of complicated cable paths, self aging, external damage and the like.
When a fault occurs at a certain point of a power transmission line in an electric power system, a fault traveling wave can be generated at the fault point, the fault can be detected and alarmed by utilizing the optical fiber synchronous positioning monitoring device, and because the cable fault site cannot be simulated generally, the optical fiber synchronous positioning monitoring device is in a normal state, which is a precondition for ensuring the cable fault detection, and after the optical fiber synchronous positioning monitoring device is used for a long time, whether the fault exists or not is required to be detected, and the existing optical fiber synchronous positioning monitoring device cannot perform accurate fault analysis, so that certain limitation exists in the cable detection.
Disclosure of Invention
In order to solve the problems of the prior art, the present invention provides a cable fault detection system, comprising: the system comprises a host computer, a slave computer and a background monitoring system;
the host computer and the slave computer have the same structure, the host computer and the slave computer are respectively connected at two ends of the cable, the host computer is in communication connection with the slave computer, and the host computer is connected with the background monitoring system;
the system comprises a host, a power supply control unit and a power supply control unit, wherein a current detection unit is arranged in the host and is used for detecting current when a cable runs and detecting a pulse current signal when the cable fails, and the pulse current signal is used as an excitation source for self-checking of the host and the slave;
the host is internally provided with a signal processing unit, the signal processing unit is connected with the current detection unit and is used for processing signals sent by the current detection unit, sending the processed signals to the slave, converting the signals into square wave pulse signals through reverse conversion, and triggering the host and the slave by using the square wave pulse signals to realize the process of self-checking of each host and each slave.
Further, the current detection unit is a rogowski coil, and the detection frequency range of the rogowski coil is 20Hz-1MHz, and the rogowski coil is mainly used for monitoring the running current of a cable and detecting the pulse current when the cable fails.
Further, the signal processing unit includes: the device comprises an integrator module, a pulse generation circuit, a serial port-to-optical fiber module and a signal acquisition processing board which are connected in sequence;
the serial port light conversion module and the pulse generation circuit are both connected with the slave machine, and the integrator module is connected with the rogowski coil.
Further, the integrator includes: a capacitor C4, a resistor R9, a resistor R1, a first amplifier and a capacitor C5;
the resistor R1, the first amplifier and the resistor R9 are connected in series through wires to form a loop;
one end of the resistor R9 is connected with one end of the resistor R1, the other end of the resistor R9 is connected with the reverse input end of the first amplifier, the other end of the resistor R1 is connected with the same-direction input end of the first amplifier, the output end of the first amplifier is connected with one end of the capacitor C5, and the other end of the capacitor C5 is connected with the input end of the pulse generating circuit;
the capacitor C4 is connected in parallel with two ends of the resistor R9;
the capacitor C1 is connected with the output end of the first amplifier;
the rogowski coil is connected with a wire between one end of the capacitor C4 and the resistor R9, and the other end of the capacitor C4 is grounded with the wire between the resistor R9.
Further, the pulse generation circuit includes: resistor R4, resistor R3, second amplifier, resistor R5, resistor R6, resistor R8, resistor R7, third amplifier, resistor R9, capacitor C3 and two-stage NOT;
the second amplifier, the resistor R5 and the third amplifier are connected in series through wires to form a loop;
the output end of the second amplifier is connected with one end of the resistor R5, the other end of the resistor R5 is connected with the reverse input end of the third amplifier, and the homodromous input end of the third amplifier is connected with the homodromous input end of the second amplifier;
the output end of the third amplifier is connected with one end of the resistor R9, and the other end of the resistor R9 is connected with one end of the two-stage NOT gate;
one end of the resistor R4 is grounded, and the other end of the resistor R4 is connected with the reverse input end of the second amplifier;
one end of the resistor R3 is connected with a wire between the resistor R4 and the second amplifier, and the other end of the resistor R3 is connected with a wire between the second amplifier and the resistor R5;
one end of the resistor R6 is connected with the electric wire between the output end of the second amplifier and the reverse input end of the third amplifier, and the other end of the resistor R6 is connected with the electric wire between the same-direction input end of the second amplifier and the same-direction input end of the third amplifier;
the electric wire between the resistor R6 and the homodromous input end of the third amplifier is grounded;
one end of the resistor R8 is grounded, and the other end of the resistor R8 is connected with a wire between the resistor R5 and the reverse input end of the third amplifier;
one end of the resistor R7 is connected with a wire between the output end of the third amplifier and the resistor R9, and the other end of the resistor R7 is connected with a wire between the reverse input end of the third amplifier and the resistor R8;
one end of the capacitor C3 is connected with the same-direction input end of the third amplifier, the other end of the capacitor C3 is connected with the resistor R9 and the electric wire between the two-stage NOT gates, and the output end of the NOT gate is connected with the serial port fiber conversion module of the host.
Further, the TX end of the serial port-to-optical fiber module of the host is connected with the RX end of the serial port-to-optical fiber module of the slave, TTL signals are sent to the slave through the host, and time difference compensation is carried out by utilizing the length of the optical fiber, so that synchronous positioning of the slave and the host is realized.
Further, the serial port of the signal acquisition processing board is connected with the serial port-to-optical fiber module, the signal acquisition processing board sends an instruction through the serial port, the instruction is transmitted to the slave machine through the serial port-to-optical fiber module, then the instruction is converted into a square wave pulse signal through reverse conversion, and the square wave pulse signal is used for triggering the master machine and the slave machine.
Further, the model of the signal acquisition processing board is FGPA+ARM, and is used for the acquisition and data processing process of partial discharge signals.
The invention has the beneficial effects that:
the monitoring system can be convenient, and in the cable fault positioning monitoring, the self-checking and communication verification processes of the equipment are made up, so that the safety and reliability of the equipment for monitoring the cable can be ensured; the host machine periodically transmits self-checking signals to the slave machine, the synchronous module is connected in a head-to-tail annular mode, the self-checking signals transmitted by the host machine can be returned to the host machine through optical fibers, each device can synchronously detect according to the signals transmitted by the host machine, if the device fails, an alarm can be given through communication and a data end, and convenience is brought to maintenance of manufacturers.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a system connection provided by the present invention;
FIG. 2 is a schematic diagram of a signal processing unit provided by the present invention;
FIG. 3 is a schematic diagram of an integrator provided by the present invention;
FIG. 4 is a schematic diagram of a pulse generation circuit provided by the present invention;
fig. 5 is a schematic diagram of an optical module connection circuit provided by the present invention;
fig. 6 is a schematic diagram of a host detecting device according to the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the embodiments of the present invention will be described in further detail with reference to the accompanying drawings.
Referring to fig. 1 to 6, a cable fault detection system includes: the system comprises a host computer, a slave computer and a background monitoring system;
the host computer and the slave computer have the same structure, the host computer and the slave computer are respectively connected at two ends of the cable, the host computer is in communication connection with the slave computer, and the host computer is connected with the background monitoring system;
the system comprises a host, a power supply control unit and a power supply control unit, wherein a current detection unit is arranged in the host and is used for detecting current when a cable runs and detecting a pulse current signal when the cable fails, and the pulse current signal is used as an excitation source for self-checking of the host and the slave;
the current detection unit is a rogowski coil, and the detection frequency range of the rogowski coil is 20Hz-1MHz and is mainly used for monitoring the running current of the cable and the pulse current when the cable fails;
the host is internally provided with a signal processing unit, the signal processing unit is connected with the current detection unit and is used for processing signals sent by the current detection unit, sending the processed signals to the slave, converting the signals into square wave pulse signals through reverse conversion, and triggering the host and the slave by using the square wave pulse signals to realize the process of self-checking of each host and each slave.
In some embodiments, the signal processing unit comprises: the device comprises an integrator module, a pulse generation circuit, a serial port-to-optical fiber module and a signal acquisition processing board which are connected in sequence;
the serial port light conversion module and the pulse generation circuit are both connected with the slave machine, and the integrator module is connected with the rogowski coil;
a capacitor C4, a resistor R9, a resistor R1, a first amplifier and a capacitor C5;
the resistor R1, the first amplifier and the resistor R9 are connected in series through wires to form a loop;
one end of the resistor R9 is connected with one end of the resistor R1, the other end of the resistor R9 is connected with the reverse input end of the first amplifier, the other end of the resistor R1 is connected with the same-direction input end of the first amplifier, the output end of the first amplifier is connected with one end of the capacitor C5, and the other end of the capacitor C5 is connected with the input end of the pulse generating circuit (namely, the output end of the U1A is connected with C5); the capacitor C5 is mainly used for eliminating direct current signals;
the capacitor C4 is connected in parallel with two ends of the resistor R9;
the capacitor C1 is connected with the output end of the first amplifier;
the rogowski coil is connected with a wire between one end of the capacitor C4 and the resistor R9, and the other end of the capacitor C4 is grounded with the wire between the resistor R9;
the resistor R9 is connected with the capacitor C4 in parallel, the sensor (Rogowski coil) signal is matched and filtered, the resistor R1, the capacitor C1 and the U1A are connected to form an integrator, and the resistor R1 is an adjustable resistor and is used for accumulating transient signals.
The integrator module is mainly used for matching and filtering signals sent by the sensor, and specifically comprises the following steps:
in the method, in the process of the invention,is an output signal +.>Is an input signal.
In some embodiments, the pulse generation circuit comprises: resistor R4, resistor R3, second amplifier, resistor R5, resistor R6, resistor R8, resistor R7, third amplifier, resistor R9, capacitor C3 and two-stage NOT;
the second amplifier, the resistor R5 and the third amplifier are connected in series through wires to form a loop;
the output end of the second amplifier is connected with one end of the resistor R5, the other end of the resistor R5 is connected with the reverse input end of the third amplifier, and the homodromous input end of the third amplifier is connected with the homodromous input end of the second amplifier;
the output end of the third amplifier is connected with one end of the resistor R9, and the other end of the resistor R9 is connected with one end of the two-stage NOT gate;
one end of the resistor R4 is grounded, and the other end of the resistor R4 is connected with the reverse input end of the second amplifier;
one end of the resistor R3 is connected with a wire between the resistor R4 and the second amplifier, and the other end of the resistor R3 is connected with a wire between the second amplifier and the resistor R5;
one end of the resistor R6 is connected with the electric wire between the output end of the second amplifier and the reverse input end of the third amplifier, and the other end of the resistor R6 is connected with the electric wire between the same-direction input end of the second amplifier and the same-direction input end of the third amplifier;
the electric wire between the resistor R6 and the homodromous input end of the third amplifier is grounded;
one end of the resistor R8 is grounded, and the other end of the resistor R8 is connected with a wire between the resistor R5 and the reverse input end of the third amplifier;
one end of the resistor R7 is connected with a wire between the output end of the third amplifier and the resistor R9, and the other end of the resistor R7 is connected with a wire between the reverse input end of the third amplifier and the resistor R8;
one end of the capacitor C3 is connected with the same-direction input end of the third amplifier, the other end of the capacitor C3 is connected with the resistor R9 and the electric wire between the two-stage NOT gates, and the output end of the NOT gate is connected with the serial port-to-optical fiber module of the host
In the pulse generation circuit, the output end of a capacitor C5 of an integrator module is connected with the input end of the pulse generation circuit, a signal is subjected to gain control through a gain amplifier formed by a second-stage operational amplifier U1B (second amplifier), a resistor R3 and a resistor R4, the proportion of current to voltage is changed, the output end of the U1B is connected with the resistor R5, the other end of the resistor R5 is connected with a negative input end (third amplifier reverse input end) of the U2, the resistor R7, the resistor R8 and the U2 (third amplifier) form an amplifying circuit, the U2 (third amplifier) adopts a high-impedance input chip, the waveform integrity of a fault signal is improved, the gain control is performed through the resistor R8 and the resistor R7, and the signal amplitude is adjusted to be more than 0.7V. The output end of U2 (third amplifier) is connected with the NAND gate, then the signal enters the two-stage NAND gate, and the signal is converted into a 20ns rising edge pulse signal through the two-stage NAND gate.
In some embodiments, the TX end of the serial port to fiber module of the host is connected to the RX end of the serial port to fiber module of the slave, and the TTL signal is sent to the slave by the host, so that the time difference compensation is performed by using the length of the optical fiber, and the synchronous positioning of the slave and the host is realized.
The serial port of the signal acquisition processing board is connected with the serial port-to-optical fiber module, the signal acquisition processing board sends instructions through the serial port, the instructions are transmitted to the slave machine through the serial port-to-optical fiber module, then the instructions are converted into square wave pulse signals through reverse conversion, and the square wave pulse signals are used for triggering the master machine and the slave machine.
The signal acquisition processing board is FGPA+ARM in type and is used for acquisition and data processing of partial discharge signals.
The serial port-to-optical fiber module is connected with the NOT gate output end of the pulse generation circuit, and has the main functions of converting an electric signal into an optical signal, realizing long-distance transmission through an optical fiber, and having the characteristic of strong anti-interference capability.
The TX end of the serial port-to-optical fiber module of the host is connected with the RX end of the serial port-to-optical fiber module of the slave, the host transmits TTL signals to the serial port-to-optical fiber module of the slave through the serial port-to-optical fiber module, optical time difference compensation is carried out by utilizing the length of optical fibers, the time difference t2 = L2/V of the slave, wherein V = 3 x 108m/s, and the two devices are calibrated through the optical transmission distance, so that synchronous positioning is realized.
The model of the signal acquisition processing board is FGPA+ARM, and the acquisition and data processing processes of partial discharge signals are mainly realized.
The signal acquisition processing board receives the pulse signal of the pulse generation circuit, performs pre-trigger acquisition, and can pre-acquire 0.2ms data, and when self-checking is performed, the signal acquired by self-checking is a baseband signal because the sensor has no actual fault signal, and the communication, optical signal and hardware acquisition board card all perform a self-checking process.
The self-checking process is that the serial port of the signal acquisition processing board is connected with the serial port-to-optical fiber module, the signal acquisition processing board sends an instruction through the serial port, the instruction is transmitted to the slave through the serial port-to-optical fiber module, then the instruction is converted into square wave pulse signals through reverse conversion, and then the square wave pulse signals trigger the host and the slave.
Specifically, the serial port interface of the fpga+arm processor module is connected with the serial port-to-fiber module RX, TX of fig. 5, the monitoring host sends an instruction FF through software, the instruction forms a rising edge square wave pulse signal at the TX end, the square wave pulse signal is connected to the external trigger position of the host acquisition board card, the electrical signal is converted into an optical signal through the serial port-to-fiber internal circuit of the host for transmission, the slave serial port-to-fiber module converts the optical signal into a square wave pulse signal, and the square wave pulse signal triggers the slave acquisition board card.
Referring to fig. 6, a host runs a program, the program end sets an automatic calibration time, the program end communicates through a network chip, and an instruction is converted to a serial port to fiber module through an fpga+ram (signal acquisition processing board).
Judging whether the whole system is normal or not according to the signal amplitude and the waveform acquired by the host and the slave and according to the baseband signal with the amplitude more than 2 times, wherein the signal waveform comprises duration 20us, and the system enters a conventional monitoring mode; and if the system is abnormal, fault information is sent to a background monitoring system, and the background records the event.
The foregoing description of the preferred embodiments of the invention is not intended to limit the invention to the precise form disclosed, and any such modifications, equivalents, and alternatives falling within the spirit and scope of the invention are intended to be included within the scope of the invention.

Claims (8)

1. A cable fault detection system, comprising: the system comprises a host computer, a slave computer and a background monitoring system;
the host computer and the slave computer have the same structure, the host computer and the slave computer are respectively connected at two ends of the cable, the host computer is in communication connection with the slave computer, and the host computer is connected with the background monitoring system;
the system comprises a host, a power supply control unit and a power supply control unit, wherein a current detection unit is arranged in the host and is used for detecting current when a cable runs and detecting a pulse current signal when the cable fails, and the pulse current signal is used as an excitation source for self-checking of the host and the slave;
the host is internally provided with a signal processing unit, the signal processing unit is connected with the current detection unit and is used for processing signals sent by the current detection unit, sending the processed signals to the slave, converting the signals into square wave pulse signals through reverse conversion, and triggering the host and the slave by using the square wave pulse signals to realize the process of self-checking of each host and each slave.
2. The system according to claim 1, wherein the current detecting unit is a rogowski coil, and the detection frequency range of the rogowski coil is 20Hz-1MHz, and the current detecting unit is mainly used for monitoring the running current of the cable and detecting the pulse current when the cable fails.
3. The cable fault detection system of claim 2, wherein the signal processing unit comprises: the device comprises an integrator module, a pulse generation circuit, a serial port-to-optical fiber module and a signal acquisition processing board which are connected in sequence;
the serial port light conversion module and the pulse generation circuit are both connected with the slave machine, and the integrator module is connected with the rogowski coil.
4. A cable fault detection system according to claim 3, wherein the integrator comprises: a capacitor C4, a resistor R9, a resistor R1, a first amplifier and a capacitor C5;
the resistor R1, the first amplifier and the resistor R9 are connected in series through wires to form a loop;
one end of the resistor R9 is connected with one end of the resistor R1, the other end of the resistor R9 is connected with the reverse input end of the first amplifier, the other end of the resistor R1 is connected with the same-direction input end of the first amplifier, the output end of the first amplifier is connected with one end of the capacitor C5, and the other end of the capacitor C5 is connected with the input end of the pulse generating circuit;
the capacitor C4 is connected in parallel with two ends of the resistor R9;
the capacitor C1 is connected with the output end of the first amplifier;
the rogowski coil is connected with a wire between one end of the capacitor C4 and the resistor R9, and the other end of the capacitor C4 is grounded with the wire between the resistor R9.
5. The cable fault detection system of claim 4, wherein the pulse generation circuit comprises: resistor R4, resistor R3, second amplifier, resistor R5, resistor R6, resistor R8, resistor R7, third amplifier, resistor R9, capacitor C3 and two-stage NOT;
the second amplifier, the resistor R5 and the third amplifier are connected in series through wires to form a loop;
the output end of the second amplifier is connected with one end of the resistor R5, the other end of the resistor R5 is connected with the reverse input end of the third amplifier, and the homodromous input end of the third amplifier is connected with the homodromous input end of the second amplifier;
the output end of the third amplifier is connected with one end of the resistor R9, and the other end of the resistor R9 is connected with one end of the two-stage NOT gate;
one end of the resistor R4 is grounded, and the other end of the resistor R4 is connected with the reverse input end of the second amplifier;
one end of the resistor R3 is connected with a wire between the resistor R4 and the second amplifier, and the other end of the resistor R3 is connected with a wire between the second amplifier and the resistor R5;
one end of the resistor R6 is connected with the electric wire between the output end of the second amplifier and the reverse input end of the third amplifier, and the other end of the resistor R6 is connected with the electric wire between the same-direction input end of the second amplifier and the same-direction input end of the third amplifier;
the electric wire between the resistor R6 and the homodromous input end of the third amplifier is grounded;
one end of the resistor R8 is grounded, and the other end of the resistor R8 is connected with a wire between the resistor R5 and the reverse input end of the third amplifier;
one end of the resistor R7 is connected with a wire between the output end of the third amplifier and the resistor R9, and the other end of the resistor R7 is connected with a wire between the reverse input end of the third amplifier and the resistor R8;
one end of the capacitor C3 is connected with the same-direction input end of the third amplifier, the other end of the capacitor C3 is connected with the resistor R9 and the electric wire between the two-stage NOT gates, and the output end of the NOT gate is connected with the serial port fiber conversion module of the host.
6. The cable fault detection system according to claim 3, wherein the TX end of the serial port-to-fiber module of the host is connected to the RX end of the serial port-to-fiber module of the slave, and the slave and the host are synchronously positioned by using the optical fiber length to perform time difference compensation by sending a TTL signal to the slave by the host.
7. The cable fault detection system according to claim 3, wherein the serial port of the signal acquisition processing board is connected with the serial port-to-optical fiber module, the signal acquisition processing board sends instructions through the serial port, the instructions are transmitted to the slave through the serial port-to-optical fiber module, then the instructions are converted into square wave pulse signals through reverse conversion, and the square wave pulse signals are used for triggering the master and the slave.
8. The cable fault detection system of claim 7, wherein the signal acquisition processing board is fgpa+arm for the acquisition and data processing of partial discharge signals.
CN202410170973.3A 2024-02-06 2024-02-06 Cable fault detection system Active CN117723892B (en)

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