CN117640496A - On-chip network route relay method, equipment and medium for nerve mimicry calculation - Google Patents
On-chip network route relay method, equipment and medium for nerve mimicry calculation Download PDFInfo
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Abstract
The invention discloses a network-on-chip route relay method, equipment and medium facing to nerve mimicry calculation, comprising the following steps: configuring a relay data packet; configuring a relay routing table; when the source node sends information to the destination node through the relay node, judging whether the number of the relay node in the relay data packet is the same as the number of the node corresponding to the relay node; when the relay node number in the relay data packet is the same as the node number corresponding to the relay node, the relay is completed; otherwise, according to the relay chain table number in the relay data packet, indexing to the starting address of the relay information area, if the end flag bit configured in the current address is 0, replacing the destination node coordinate in the relay data packet with the destination node coordinate in the current relay information area, and updating the relay data packet; and then reading the next address until the end flag bit is 1, updating to obtain a plurality of relay data packets, and sending each relay data packet to a corresponding destination node to continue relaying.
Description
Technical Field
The invention relates to the technical field of network-on-chip, in particular to a network-on-chip route relay method, device and medium for nerve mimicry calculation.
Background
In recent years, the effects of "memory wall" and "power consumption wall" have become more severe, the moore's law has slowed down and tended to stop, and the von neumann architecture followed by conventional computers is facing significant challenges. With the continuous progress of bioscience, particularly brain science, scientists have found that the human brain is an extremely energy efficient computer and has features and advantages that are not comparable to the von neumann computing architecture. Thus, neuromorphic calculations that mimic the structure and operation mechanisms of the brain neural network are considered one of the important paths that address challenges of the post-molar-epoch von neumann architecture. Because the nerve mimicry calculation has the characteristic of being distributed, the nerve mimicry calculation is naturally suitable for being realized by an on-chip network.
The network on chip is a novel communication architecture designed for multi-core Soc, and has the characteristics of strong expansibility and high communication efficiency compared with the traditional bus structure, and is widely applied to nerve mimicry computing chips at present. The network on chip adopts a data packet routing mode to transmit, the packet head of the data packet stores the information of the destination node, and the routing transmits the data packet according to the information. Because of the limitations in the bit width of the header, if absolute addresses are used, i.e. each node can see the complete address space, the expansion capability of the network on chip will be limited by the header bit width. Therefore, the current network-on-chip often adopts relative addresses, namely each node can only access the nodes nearby, in theory, the network-on-chip can be infinitely expanded, and the characteristic of the neural mimicry calculation regionalization is also met. However, the furthest access distance for each node is inherently limited by the header bit width. In neuromorphic computing, in the face of some very large-scale network structures, it is not possible to lay down all neurons within the accessibility.
Because, it is needed to propose a network-on-chip relay method capable of breaking the limitation of the furthest transmission distance of a single data packet so as to improve the expansion capability of the network-on-chip.
Disclosure of Invention
In view of the above, the invention provides a network-on-chip route relay method facing to nerve mimicry calculation.
In a first aspect, an embodiment of the present invention provides a network-on-chip route relay method facing to neural mimicry computation, where the method includes:
configuring a relay data packet;
configuring a relay routing table and storing the relay routing table in a relay node;
when the source node sends information to the destination node through the relay node, the source node sends a relay data packet to the relay node according to the destination node coordinates stored in the relay data packet; judging whether the relay node number in the relay data packet is the same as the node number corresponding to the relay node;
the step of judging whether the relay node number in the relay data packet is the same as the node number corresponding to the relay node includes:
when the number of the relay node in the relay data packet is the same as the corresponding node number of the relay node, the relay node indicates that the destination node is reached, and the relay is completed;
when the number of the relay node in the relay data packet is different from the corresponding node number of the relay node, indexing to the starting address of the relay information area according to the number of the relay linked list in the relay data packet, and if the end marker bit LNF configured in the current address is 1, replacing the coordinate of the destination node in the relay data packet by the coordinate of the destination node in the current relay information area, and continuing relaying; if the end flag bit LNF configured in the current address is 0, the destination node coordinate in the current relay information area is replaced by the destination node coordinate in the relay data packet, and the relay data packet is updated; then, the next address is read until the end flag bit LNF is 1, a plurality of relay data packets are updated, each relay data packet is sent to a corresponding destination node to continue relaying, and therefore information sent to a plurality of destination nodes by a source node through the relay nodes is achieved.
In a second aspect, an embodiment of the present invention provides an electronic device, including a memory and a processor, the memory coupled to the processor; the memory is used for storing program data, and the processor is used for executing the program data to realize the network-on-chip route relay method facing to the neuro-mimicry calculation.
In a third aspect, an embodiment of the present invention provides a computer readable storage medium having stored thereon a computer program, which when executed by a processor implements the above-described network-on-chip route relay method for neuromorphic computation.
Compared with the prior art, the invention has the following beneficial effects: the invention provides a network-on-chip route relay method facing to nerve mimicry calculation, which breaks the limitation of the furthest distance of data packet transmission through a relay node, and simultaneously realizes one-to-many relay by configuring an end zone bit LNF and controlling a relay end address through a single-bit end zone bit.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort to a person skilled in the art.
Fig. 1 is a schematic diagram of a network-on-chip route relay method facing to neuro-mimicry calculation according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a relay data packet change in a relay process according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a one-to-many node relay process according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a pulse data relay according to an embodiment of the present invention;
fig. 5 is a schematic diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples do not represent all implementations consistent with the invention. Rather, they are merely examples of apparatus and methods consistent with aspects of the invention as detailed in the accompanying claims.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in this specification and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any or all possible combinations of one or more of the associated listed items.
It should be understood that although the terms first, second, third, etc. may be used herein to describe various information, these information should not be limited by these terms. These terms are only used to distinguish one type of information from another. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope of the invention. The word "if" as used herein may be interpreted as "at … …" or "at … …" or "responsive to a determination", depending on the context.
The present invention will be described in detail with reference to the accompanying drawings. The features of the examples and embodiments described below may be combined with each other without conflict.
As shown in fig. 1, an embodiment of the present invention provides a network-on-chip route relay method facing to neural mimicry computation, in which a network-on-chip based on a relative address breaks a furthest distance limit of data packet transmission through a relay node, the method includes:
step S1, configuring a relay data packet.
Further, the relay data packet is composed of a packet header, a relay direction (dir), a relay node number (id), a link list number (link) and a load (load).
The packet header is used for network-on-chip routing of relative addresses, and comprises destination node coordinates (dst) and source node coordinates (src) which are respectively used for sending data and returning data.
The load is the data to be transmitted and may depend on the particular application. It should be noted that the header and payload are part of conventional network-on-chip transmissions.
The relay node number is used for judging whether relay is performed or not; specifically, a node number is set for each node in the network on chip, in this example, the node number of the common node is set to 0, and the node number of the relay node is not set to 0. In the network-on-chip route relay process, each relay data packet stores a relay node number, and when the relay node number stored in the relay data packet is not equal to the node number corresponding to the current node, relay operation is performed; and when the number of the relay node stored in the relay data packet is equal to the node number corresponding to the current node, the relay node indicates that the destination node is reached, and the relay is completed.
The linked list number is used for indexing relay information; specifically, the number of the relay node stored in the relay data packet is different from the number of the node corresponding to the current node, and after the relay operation is performed, the corresponding relay information (namely, the destination node coordinate in the relay information area) is found in the relay routing table according to the number of the relay chain table to replace the destination node information in the packet header.
The relay direction is used for judging whether the current relay is a sending information relay or a destination node return information relay; specifically, in this example, if the current relay is a transmission information relay, the relay direction is configured to be 0, which indicates that the data packet is relayed to the destination node; if the current relay is the destination node return information relay, the relay direction is configured to be 1, which indicates that the data packet is relayed to the source node. In the process of the destination node returning information relay, the returned data is fed back and sent to the source node by using the same relay node as that used in the information relay.
Step S2, a relay routing table is configured and stored in the relay node.
Further, the relay routing table includes a relay linked list area and a relay information area.
And the relay linked list area indexes the starting address of the relay information area according to the linked list number in the relay data packet.
The relay information area is used for configuring an end flag LNF (last node flag) and storing source node coordinates and destination node coordinates.
Specifically, each relay linked list number in the relay data packet is indexed to a starting address of a relay information area, in the relay process, a relay direction in the relay data packet is judged, and when the relay direction is a source node sending information relay, a destination node coordinate in the relay information area is used for replacing a destination node coordinate in the relay data packet; when the relay direction returns information relay for the destination node, the coordinates of the destination node in the relay data packet are replaced by the coordinates of the source node in the relay information area.
Specifically, when the end flag bit LNF is 1, it indicates that the current relay information is the last of the relay linked list, and if the end flag bit LNF is 0, the next row in the relay linked list needs to be read continuously.
When the source node sends information to the destination node through the relay node, the method specifically comprises the following steps:
step S100, a source node sends a relay data packet to a relay node according to a destination node coordinate stored in a relay data packet header;
step S101, a relay node receives a relay data packet; judging whether the relay node number in the relay data packet is the same as the node number corresponding to the relay node; when the relay node number in the relay data packet is the same as the node number corresponding to the relay node, the relay is completed; when the number of the relay node in the relay data packet is different from the number of the node corresponding to the relay node, the destination node coordinate in the relay data packet is replaced by the destination node coordinate in the relay information area, and the relay is continued until the number of the relay node stored in the relay data packet is equal to the number of the node corresponding to the current node, the destination node is reached, and the relay is completed.
Illustratively, as shown in fig. 2, the source node sends information to the destination node through the relay node, and in this example, the source node coordinates are (0, 0), and the corresponding node number is configured to be 0, which represents a common node. The relay node coordinates are (3, 3), and the corresponding node number is configured to be 1. The destination node coordinates are (5, 6), and the corresponding node number is configured to be 2. The relay data packet sent by the source node includes: destination node coordinates (3, 3) stored in the packet header, the relay direction is 0, the relay node number is 2, the relay chain table number is 0, and the load is loaded. Firstly, according to destination node coordinates (3, 3) stored in a relay data packet header, a source node (0, 0) sends a relay data packet to the relay node (3, 3); the relay nodes (3, 3) receive the relay data packets; judging whether the relay node number in the relay data packet is the same as the node number corresponding to the relay node; at this time, the number of the relay node in the relay data packet is 2, the number of the node corresponding to the current relay node is 1, and the number of the relay node in the relay data packet is different from the number of the node corresponding to the relay node, so that the relay needs to be continued. Then, according to the relay chain table number 0 in the relay data packet, index to the start address addr2 of the relay information area, and according to the end flag LNF (last node flag) being 1, only one destination node is known, meanwhile, according to the relay direction in the relay data packet being 0, the current relay direction is judged to be the source node for transmitting information relay, destination node coordinates (3, 3) in the relay data packet are replaced by destination node coordinates (5, 6) in the relay information area, the relay data packet is updated, and relay is continued. The destination node receives the relay data packet and judges whether the number of the relay node in the relay data packet is the same as the number of the node corresponding to the relay node; at this time, the number of the relay node in the relay data packet is 1, and the number of the node corresponding to the current node is 1, which indicates that the destination node is reached, and the relay is completed.
When the destination node receives the data packet and feeds back information to the source node through the relay node, as shown in fig. 3, the method specifically includes the following steps:
step S200, the destination node writes the return information according to the packet type corresponding to the load in the relay data packet, and simultaneously changes the relay direction, and then the destination node sends the relay data packet to the relay node according to the source node coordinates stored in the packet header of the relay data packet;
step S201, a relay node receives a relay data packet; judging whether the relay node number in the relay data packet is the same as the node number corresponding to the relay node; when the relay node number in the relay data packet is the same as the node number corresponding to the relay node, the relay is completed; when the number of the relay node in the relay data packet is different from the node number corresponding to the relay node, the source node coordinate in the relay data packet is replaced by the source node coordinate in the relay information area, and the relay is continued until the number of the relay node stored in the relay data packet is equal to the node number corresponding to the current node, the relay node is indicated to reach the source node, and the relay is completed.
As shown in fig. 2, the destination node receives the data packet and feeds back information to the source node through the relay node, and in this example, the destination node writes the return information according to the packet type corresponding to the load in the relay data packet, and changes the relay direction to 1 and changes the relay node number to 0. Updating the relay data packet includes: destination node coordinates (3, 3) stored in the packet header, the relay direction is 1, the relay node number is 0, the relay chain table number is 0, and the load is loaded. In the process of the destination node returning information relay, the returned data is fed back and sent to the source node by using the same relay node as that used for sending the information relay. Therefore, in this example, the destination node first sends a relay data packet to the relay nodes (3, 3), and the relay nodes receive the relay data packet; judging whether the relay node number in the relay data packet is the same as the node number corresponding to the relay node; at this time, the number of the relay node in the relay data packet is 0, the number of the node corresponding to the current relay node is 1, and the number of the relay node in the relay data packet is different from the number of the node corresponding to the relay node, so that the relay needs to be continued. Then, according to the relay chain table number 0 in the relay data packet, index to the start address addr2 of the relay information area, and according to the end flag LNF (last node flag) being 1, only one destination node can be known, meanwhile, according to the relay direction in the relay data packet being 1, the current relay direction is judged to be the destination node return information relay, the destination node coordinates in the relay data packet are replaced by the source node coordinates (0, 0) in the relay information area, and then the source node is sent to complete the relay process.
When a source node sends information to a plurality of destination nodes through a relay node, that is, performs a one-to-many relay, as shown in fig. 3, the method specifically includes the following steps:
step S300, a source node sends a relay data packet to a relay node according to the destination node coordinates stored in the relay data packet header;
step S301, a relay node receives a relay data packet; judging whether the relay node number in the relay data packet is the same as the node number corresponding to the relay node; when the number of the relay node in the relay data packet is different from the corresponding node number of the relay node, indexing to the starting address of the relay information area according to the number of the relay linked list in the relay data packet, and when the ending zone bit LNF configured in the starting address of the relay information area is 0, replacing the destination node coordinate in the relay data packet with the destination node coordinate stored in the starting address of the relay information area, updating to obtain a first relay data packet, and continuing to relay; then, reading the next address, if the end flag bit LNF configured in the current address is 0, replacing the destination node coordinate stored in the address of the current relay information area with the destination node coordinate in the relay data packet, updating to obtain a second relay data packet, and continuing to relay; and the like until the end flag bit LNF is 1, updating to obtain a plurality of relay data packets, and sending each relay data packet to a corresponding destination node to continue relaying, so that the information sent by the source node to a plurality of destination nodes through the relay nodes is completed.
In this example, the relay information area corresponding to each linked list is variable in length, and a plurality of pairs of coordinates of source and destination nodes may be stored, and the relay end address is controlled by a single-bit end flag bit.
Illustratively, as shown in fig. 3, the source node sends information to the plurality of destination nodes through the relay node, and in this example, the source node coordinates are set to (0, 0), and the corresponding node numbers thereof are configured to be 0, representing the normal nodes. The relay node coordinates are (3, 3), and the corresponding node number is configured to be 1. The coordinates of the destination nodes are (5, 6), (4, 4), (7, 9), and the corresponding node number configurations are all 2. The relay data packet sent by the source node includes: destination node coordinates (3, 3) stored in the packet header, the relay direction is 0, the relay node number is 2, the relay chain table number is 0, and the load is loaded. Firstly, according to destination node coordinates (3, 3) stored in a relay data packet header, a source node (0, 0) sends a relay data packet to the relay node (3, 3); the relay nodes (3, 3) receive the relay data packets; judging whether the relay node number in the relay data packet is the same as the node number corresponding to the relay node; at this time, the number of the relay node in the relay data packet is 2, the number of the node corresponding to the current relay node is 1, and the number of the relay node in the relay data packet is different from the number of the node corresponding to the relay node, so that the relay needs to be continued. Then, according to the relay link list number 0 in the relay data packet, index to the start address addr2 of the relay information area, and according to the end flag LNF (last node flag) being 0, a plurality of destination nodes are known, the current relay direction is judged to be the source node sending information relay, destination node coordinates (5, 6) stored by the start address addr2 of the relay information area replace destination node coordinates (3, 3) in the relay data packet, a first relay data packet is obtained, and relay is continued. Then, the second row address addr3 is read, the end flag bit LNF (last node flag) in the second row address addr3 is 0, and destination node coordinates (4, 4) stored in the second row address addr3 of the relay information area are substituted for destination node coordinates (3, 3) in the relay data packet, so that a second relay data packet is obtained, and relay is continued. Then, the third row address addr4 is read again, the end flag bit LNF (last node flag) in the second row address addr4 is 1, the destination node coordinates (7, 9) stored in the third row address addr4 of the relay information area are replaced by the destination node coordinates (3, 3) in the relay data packet, a third relay data packet is obtained, and the relay is continued. Thus, the source node sends information to the three destination nodes through the relay nodes.
The process that the multiple destination nodes feed back information to the source node through the relay node is the same, and will not be described here again.
On the other hand, the invention also provides a simplified scheme for the pulse data relay in the nerve mimicry calculation, and particularly, when the relay data packet is of a pulse data type, the relay data packet can be simplified into a packet header and a linked list number, and the linked list number is multiplexed with a load; the relay routing table is composed of a relay chain table area and a relay information area, wherein the relay information area is simplified to store an end zone bit, a target node coordinate and a load.
Note that, since the relay node does not perform pulse processing, that is, the node with the configured relay number not being 0 only performs relay, the node number in the relay packet is removed. Because the pulse type data packet does not need to return data, the relay direction of the relay data packet is removed, and meanwhile, the source node coordinates stored in the relay information area are removed, and load information is stored instead. The linked list number in the relay data packet can be multiplexed with the load, and a new load is acquired from the relay information area when passing through the relay node. The relay can be performed without increasing the bit width of the data packet.
Further, each link list number corresponds to a row link list, if the link list number is 0, then corresponds to the link list 0, and indexes to relay information 0 of the link list 0 according to the stored address.
Specifically, when the source node transmits pulse data to the destination node through the relay node, the method specifically comprises the following steps:
step S400, a source node sends a relay data packet to a relay node according to the destination node coordinates stored in the relay data packet header;
step S401, a relay node receives a relay data packet; according to the relay linked list number in the relay data packet, indexing to the starting address of the relay information area, wherein the ending zone bit LNF configured in the starting address of the relay information area is 1, and replacing the destination node coordinate in the relay data packet by the destination node coordinate in the current relay information area, and continuing to relay to realize one-to-one pulse data transmission; when an end flag bit LNF configured in a starting address of a relay information area is 0, replacing a destination node coordinate in a relay data packet with a destination node coordinate stored in the starting address of the relay information area, updating to obtain a first relay data packet, and continuing to relay; then, reading the next address, if the end flag bit LNF configured in the current address is 0, replacing the destination node coordinate stored in the address of the current relay information area with the destination node coordinate in the relay data packet, replacing the original linked list number with a load, updating to obtain a second relay data packet, and continuing relaying; and the like, until the end zone bit LNF configured in the address of the relay information area is 1, updating to obtain a plurality of relay data packets, and sending each relay data packet to a corresponding destination node to continue relaying, thereby completing the sending of pulse data from the source node to a plurality of destination nodes through the relay nodes.
Illustratively, as shown in fig. 4, the source node transmits pulse data to a plurality of destination nodes through a relay node, and in this example, the source node coordinates are set to (0, 0), the relay node coordinates are set to (3, 3), and the destination node coordinates are set to (5, 6), (4, 4), (7, 9). The relay data packet sent by the source node includes: the destination node coordinates (3, 3) stored in the packet header, the relay chain table number is 0, firstly, according to the destination node coordinates (3, 3) stored in the relay data packet header, the source node (0, 0) sends a relay data packet to the relay node (3, 3); the relay nodes (3, 3) receive the relay data packets; then, the destination nodes are known from the index of the relay link table number 0 in the relay data packet to the start address addr2 of the relay information area, and from the end flag LNF (last node flag) being 0, the destination node coordinates (5, 6) stored in the start address addr2 of the relay information area are substituted for the destination node coordinates (3, 3) in the relay data packet, so as to obtain the first relay data packet, and the relay is continued. Then, the second row address addr3 is read, the end flag bit LNF (last node flag) in the second row address addr3 is 0, and destination node coordinates (4, 4) stored in the second row address addr3 of the relay information area are substituted for destination node coordinates (3, 3) in the relay data packet, so that a second relay data packet is obtained, and relay is continued. Then, the third row address addr4 is read again, the end flag bit LNF (last node flag) in the second row address addr4 is 1, the destination node coordinates (7, 9) stored in the third row address addr4 of the relay information area are replaced by the destination node coordinates (3, 3) in the relay data packet, a third relay data packet is obtained, and the relay is continued. Thus, the source node sends pulse data to the three destination nodes through the relay nodes.
In summary, the present invention provides a network-on-chip route relay method facing to neural mimicry calculation, which breaks the limitation of the furthest distance of data packet transmission through a relay node, and simultaneously, through configuring an end zone bit LNF, controls a relay end address through a single-bit end zone bit, thereby realizing one-to-many relay. Meanwhile, the embodiment of the invention aims at the simplified relay scheme of the pulse data in the nerve mimicry calculation, and can relay without increasing the bit width of the data packet and occupying more resources.
The present specification also provides a computer readable storage medium storing a computer program operable to perform the above method of data synchronization.
The present specification also provides a schematic structural diagram of the electronic device shown in fig. 5. At the hardware level, the electronic device includes a processor, an internal bus, a network interface, a memory, and a non-volatile storage, as illustrated in fig. 5, although other hardware required by other services may be included. The processor reads the corresponding computer program from the nonvolatile memory into the memory and then runs the computer program to realize the data synchronization method.
Of course, other implementations, such as logic devices or combinations of hardware and software, are not excluded from the present description, that is, the execution subject of the following processing flows is not limited to each logic unit, but may be hardware or logic devices.
In the 90 s of the 20 th century, improvements to one technology could clearly be distinguished as improvements in hardware (e.g., improvements to circuit structures such as diodes, transistors, switches, etc.) or software (improvements to the process flow). However, with the development of technology, many improvements of the current method flows can be regarded as direct improvements of hardware circuit structures. Designers almost always obtain corresponding hardware circuit structures by programming improved method flows into hardware circuits. Therefore, an improvement of a method flow cannot be said to be realized by a hardware entity module. For example, a programmable logic device (Programmable Logic Device, PLD) (e.g., a field programmable gate array (Field Programmable gate array, FPGA)) is an integrated circuit whose logic function is determined by the user programming the device. A designer programs to "integrate" a digital system onto a PLD without requiring the chip manufacturer to design and fabricate application-specific integrated circuit chips. Moreover, nowadays, instead of manually manufacturing integrated circuit chips, such programming is mostly implemented by using "logic compiler" software, which is similar to the software compiler used in program development and writing, and the original code before the compiling is also written in a specific programming language, which is called hardware description language (Hardware Description Language, HDL), but not just one of the hdds, but a plurality of kinds, such as ABEL (Advanced Boolean Expression Language), AHDL (Altera Hardware DescriptionLanguage), confluence, CUPL (Cornell University Programming Language), HDCal, JHDL (Java Hardware Description Language), lava, lola, myHDL, PALASM, RHDL (RubyHardware Description Language), etc., VHDL (Very-High-SpeedIntegrated Circuit Hardware Description Language) and Verilog are currently most commonly used. It will also be apparent to those skilled in the art that a hardware circuit implementing the logic method flow can be readily obtained by merely slightly programming the method flow into an integrated circuit using several of the hardware description languages described above.
The controller may be implemented in any suitable manner, for example, the controller may take the form of, for example, a microprocessor or processor and a computer readable medium storing computer readable program code (e.g., software or firmware) executable by the (micro) processor, logic gates, switches, application specific integrated circuits (Application Specific Integrated Circuit, ASIC), programmable logic controllers, and embedded microcontrollers, examples of which include, but are not limited to, the following microcontrollers: ARC 625D, atmel AT91SAM, microchip PIC18F26K20, and Silicone Labs C8051F320, the memory controller may also be implemented as part of the control logic of the memory. Those skilled in the art will also appreciate that, in addition to implementing the controller in a pure computer readable program code, it is well possible to implement the same functionality by logically programming the method steps such that the controller is in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers, embedded microcontrollers, etc. Such a controller may thus be regarded as a kind of hardware component, and means for performing various functions included therein may also be regarded as structures within the hardware component. Or even means for achieving the various functions may be regarded as either software modules implementing the methods or structures within hardware components.
The system, apparatus, module or unit set forth in the above embodiments may be implemented in particular by a computer chip or entity, or by a product having a certain function. One typical implementation is a computer. In particular, the computer may be, for example, a personal computer, a laptop computer, a cellular telephone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.
For convenience of description, the above devices are described as being functionally divided into various units, respectively. Of course, the functions of each element may be implemented in one or more software and/or hardware elements when implemented in the present specification.
It will be appreciated by those skilled in the art that embodiments of the present description may be provided as a method, system, or computer program product. Accordingly, the present specification may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present description can take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.
The present description is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the specification. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
In one typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
The memory may include volatile memory in a computer-readable medium, random Access Memory (RAM) and/or nonvolatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of computer-readable media.
Computer readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of storage media for a computer include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium, which can be used to store information that can be accessed by a computing device. Computer-readable media, as defined herein, does not include transitory computer-readable media (transmission media), such as modulated data signals and carrier waves.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises the element.
It will be appreciated by those skilled in the art that embodiments of the present description may be provided as a method, system, or computer program product. Accordingly, the present specification may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present description can take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.
The description may be described in the general context of computer-executable instructions, such as program modules, being executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform particular tasks or implement particular abstract data types. The specification may also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules may be located in both local and remote computer storage media including memory storage devices.
In this specification, each embodiment is described in a progressive manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments. In particular, for system embodiments, since they are substantially similar to method embodiments, the description is relatively simple, as relevant to see a section of the description of method embodiments.
The foregoing is merely exemplary of the present disclosure and is not intended to limit the disclosure. Various modifications and alterations to this specification will become apparent to those skilled in the art. Any modifications, equivalent substitutions, improvements, or the like, which are within the spirit and principles of the present description, are intended to be included within the scope of the claims of the present description.
Claims (10)
1. A network-on-chip route relay method for neuro-mimicry computation, the method comprising:
configuring a relay data packet;
configuring a relay routing table and storing the relay routing table in a relay node;
when the source node sends information to the destination node through the relay node, the source node sends a relay data packet to the relay node according to the destination node coordinates stored in the relay data packet; judging whether the relay node number in the relay data packet is the same as the node number corresponding to the relay node;
the step of judging whether the relay node number in the relay data packet is the same as the node number corresponding to the relay node includes:
when the number of the relay node in the relay data packet is the same as the corresponding node number of the relay node, the relay node indicates that the destination node is reached, and the relay is completed;
when the number of the relay node in the relay data packet is different from the corresponding node number of the relay node, indexing to the starting address of the relay information area according to the number of the relay linked list in the relay data packet, and if the configured ending flag bit in the current address is 1, replacing the destination node coordinate in the relay data packet by the destination node coordinate in the current relay information area, and continuing relaying; if the end flag bit configured in the current address is 0, the destination node coordinate in the current relay information area is replaced with the destination node coordinate in the relay data packet, and the relay data packet is updated; and then, reading the next address until the end flag bit is 1, updating to obtain a plurality of relay data packets, and sending each relay data packet to a corresponding destination node to continue relaying, so that the information sent by the source node to a plurality of destination nodes through the relay nodes is realized.
2. The network-on-chip routing relay method for the neuro-mimicry calculation according to claim 1, wherein the relay data packet is composed of a packet header, a relay direction, a relay node number, a linked list number and a load;
the packet header is used for storing the coordinates of the destination node and the coordinates of the source node;
the load is data to be transmitted;
the relay node number is used for judging whether relay is performed or not; comprising the following steps: setting a node number for each node in the network-on-chip, storing a relay node number in each relay data packet in the process of network-on-chip routing relay, and performing relay operation when the relay node number stored in the relay data packet is not equal to the node number corresponding to the current node; when the number of the relay node stored in the relay data packet is equal to the number of the node corresponding to the current node, the relay node is indicated to reach the destination node, and the relay is completed;
the linked list number is used for indexing relay information in a relay routing table; comprising the following steps: in the process of network-on-chip routing relay, the number of a relay node stored in a relay data packet is different from the number of the node corresponding to the current node, and the corresponding destination node coordinate is searched in a relay routing table according to the number of a relay linked list so as to replace destination node information in a packet header;
The relay direction is used for judging whether the current relay is a sending information relay or a destination node return information relay.
3. The network-on-chip routing relay method for neuro-mimicry computation according to claim 2, wherein if the current relay is a transmission information relay, the relay direction is configured to be 0, which indicates that the data packet is relayed to the destination node; if the current relay returns information relay for the destination node, the relay direction is configured to be 1.
4. The network-on-chip routing relay method for neuro-mimicry computation according to claim 1, wherein the relay routing table includes a relay linked list area and a relay information area;
the relay linked list area is used for indexing the initial address of the relay information area according to the linked list number in the relay data packet;
the relay information area is used for storing an end zone bit, a source node coordinate and a destination node coordinate;
in the relay process, judging the relay direction in the relay data packet, and when the relay direction is the source node sending information relay, replacing the destination node coordinate in the relay data packet by using the destination node coordinate in the relay information area; when the relay direction returns information relay for the destination node, the coordinates of the destination node in the relay data packet are replaced by the coordinates of the source node in the relay information area.
5. The network-on-chip route relay method for neuro-mimicry computation according to claim 1, wherein when the destination node receives the data packet and feeds back information to the source node through the relay node, the method specifically comprises:
the destination node writes the return information according to the packet type corresponding to the load in the relay data packet, simultaneously changes the relay direction, and then sends the relay data packet to the relay node according to the source node coordinates stored in the packet header of the relay data packet;
the relay node receives the relay data packet; judging whether the relay node number in the relay data packet is the same as the node number corresponding to the relay node; when the relay node number in the relay data packet is the same as the node number corresponding to the relay node, the relay is completed; when the number of the relay node in the relay data packet is different from the node number corresponding to the relay node, the source node coordinate in the relay data packet is replaced by the source node coordinate in the relay information area, and the relay is continued until the number of the relay node stored in the relay data packet is equal to the node number corresponding to the current node, the relay node is indicated to reach the source node, and the relay is completed.
6. The network-on-chip route relay method for neuro-mimicry computation according to claim 1, wherein when the source node sends information to the plurality of destination nodes through the relay node, the method specifically comprises:
According to the destination node coordinates stored in the relay data packet header, a source node sends a relay data packet to a relay node;
the relay node receives the relay data packet; judging whether the relay node number in the relay data packet is the same as the node number corresponding to the relay node; when the number of the relay node in the relay data packet is different from the corresponding node number of the relay node, indexing to the starting address of the relay information area according to the number of the relay linked list in the relay data packet, and when the end flag bit configured in the starting address of the relay information area is 0, replacing the destination node coordinate in the relay data packet with the destination node coordinate stored in the starting address of the relay information area, updating to obtain a first relay data packet, and continuing to relay; then, reading the next address, if the end flag bit configured in the current address is 0, replacing the destination node coordinate in the relay data packet with the destination node coordinate stored in the address of the current relay information area, updating to obtain a second relay data packet, and continuing to relay; and the like until the end flag bit is 1, updating to obtain a plurality of relay data packets, and sending each relay data packet to a corresponding destination node to continue relaying, so that the information sent by the source node to a plurality of destination nodes through the relay nodes is completed.
7. The network-on-chip routing relay method for the neuro-mimicry calculation according to claim 1, wherein when the relay data packet is of a pulse data type, the relay data packet is composed of a packet header and a linked list number, wherein the linked list number is multiplexed with a load; the relay routing table is composed of a relay chain table area and a relay information area, wherein the relay information area is used for storing an end zone bit, a target node coordinate and a load.
8. The network-on-chip route relay method for neuro-mimicry computation according to claim 1, wherein when the source node sends the pulse data to the destination node through the relay node, the method specifically comprises:
according to the destination node coordinates stored in the relay data packet header, a source node sends a relay data packet to a relay node;
the relay node receives the relay data packet; indexing to the starting address of the relay information area according to the relay chain table number in the relay data packet;
when the end flag bit configured in the starting address of the relay information area is 1, the destination node coordinates in the current relay information area are used for replacing the destination node coordinates in the relay data packet, and relay is continued, so that the source node sends pulse data to a single destination node through the relay node;
When the end flag bit configured in the starting address of the relay information area is 0, the destination node coordinate stored in the starting address of the relay information area is replaced with the destination node coordinate in the relay data packet, and the load is replaced with the original linked list number, so that the relay data packet is updated; then, reading the next address, if the end flag bit configured in the current address is 0, replacing the destination node coordinate stored in the address of the current relay information area with the destination node coordinate in the relay data packet, and replacing the original linked list number with the load to update the relay data packet; and the like, until the end flag bit configured in the address of the relay information area is 1, updating to obtain a plurality of relay data packets, and sending each relay data packet to a corresponding destination node to continue relaying, thereby completing the sending of pulse data from the source node to a plurality of destination nodes through the relay nodes.
9. An electronic device comprising a memory and a processor, wherein the memory is coupled to the processor; wherein the memory is configured to store program data, and the processor is configured to execute the program data to implement the network-on-chip routing relay method for neuro-mimicry-oriented computation of any one of claims 1-8.
10. A computer readable storage medium having stored thereon a computer program, wherein the program when executed by a processor implements a network-on-chip route relay method for neuro-mimicry-oriented computation according to any of claims 1-8.
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