CN117472838B

CN117472838B - High-speed serial computer expansion bus equipment identification method, device and related equipment

Info

Publication number: CN117472838B
Application number: CN202311830283.8A
Authority: CN
Inventors: 李军; 郭巍; 邓子为; 张德闪; 徐亚明
Original assignee: Suzhou Metabrain Intelligent Technology Co Ltd
Current assignee: Suzhou Metabrain Intelligent Technology Co Ltd
Priority date: 2023-12-28
Filing date: 2023-12-28
Publication date: 2024-03-15
Anticipated expiration: 2043-12-28
Also published as: CN117472838A

Abstract

The invention provides a method, a device and related equipment for identifying high-speed serial computer expansion bus equipment, which relate to the technical field of programmable logic devices and are characterized in that a physical function hash table and a virtual function hash table are created; receiving equipment base address space access request information sent by an upper computer; performing hash key calculation in parallel according to the space address of the base address register of the equipment to be accessed to generate a physical function hash key and a virtual function hash key; the physical function hash table and the virtual function hash table are searched in parallel, identification information of the high-speed serial computer expansion bus equipment to be accessed is obtained, and target matching of BAR space access requests can be rapidly completed under a high-density equipment scene through parallel operation and parallel table searching, so that matching time is shortened; by respectively designing the physical function hash table and the virtual function hash table, the space size of the virtual function base address BAR is free from the space size limit of the physical function base address BAR, and the flexibility of equipment design is improved.

Description

High-speed serial computer expansion bus equipment identification method, device and related equipment

Technical Field

The present invention relates to the field of programmable logic devices, and in particular, to a method and apparatus for identifying a high-speed serial computer expansion bus device, and a related device.

Background

In a heterogeneous acceleration device implemented using a field programmable gate array (Field Programmable Gate Array, FPGA) that conforms to the high-speed serial computer expansion bus (Peripheral Component Interconnect Express, PCIe) standard, the base address register (Base Address Register, BAR) space in the device configuration space is an important medium for data transfer between the host driver and the PCIe device, matching to the target PCIe device address from the BAR space thereby establishing a connection between the host driver and the PCIe device, and thus matching to the target PCIe device address in the BAR space identifies an impact on the data transfer speed. Especially for data transmission intensive devices, the access speed of the BAR space directly determines the transmission delay of the device. In the related art, the identification of the target PCIe device is realized by establishing a mapping relation table between the device BAR space and the PCIe storage address space and traversing the mapping relation table. However, in a virtualized scenario, especially in a high-density virtual machine scenario, PCIe-SRIOV (Single Root Input/Output Virtualization, single-root IO virtualization) technology is often used to expand the number of devices, at this time, the total size and total number of BAR spaces are also multiplied by the number of virtual functions, at this time, the address matching and access routing speed of BAR spaces are affected by a table lookup traversal method.

In addition, because the virtual address directly reflected in the extended configuration space corresponds to only one virtual function, the addresses of other virtual functions are all obtained by kernel calculation, so that the total size of the virtual function BAR space is required to be equal to the size of the physical function BAR space in order to ensure correct table lookup, and the single virtual function BAR space is easily limited or the physical function BAR space resource is easily wasted.

Disclosure of Invention

The invention provides a method, a device and related equipment for identifying high-speed serial computer expansion bus equipment, which are used for solving the defects that the traditional method for identifying target PCIe equipment by traversing the mapping relation table is not suitable for a high-density virtual machine scene and is easy to cause the limitation of the space size of a single virtual function BAR or the waste of the space resources of a physical function BAR.

The invention provides a high-speed serial computer expansion bus equipment identification method, which comprises the following steps:

creating a physical function hash table and a virtual function hash table;

receiving equipment base address space access request information sent by an upper computer, wherein the equipment base address space access request information comprises a base address register space address of high-speed serial computer expansion bus equipment to be accessed;

Performing hash key calculation in parallel according to the space address of the base address register of the high-speed serial computer expansion bus equipment to be accessed to generate a physical function hash key and a virtual function hash key;

and searching the physical function hash table and the virtual function hash table in parallel according to the physical function hash key and the virtual function hash key, and acquiring the identification information of the to-be-accessed high-speed serial computer expansion bus equipment.

According to the invention, a physical function hash table is created, which comprises the following steps:

acquiring a physical function base address register space allocated by an upper computer;

performing first hash operation on the addresses of the physical function base address register space to obtain a plurality of physical function effective values;

when the plurality of physical function effective values do not have conflict, the physical function effective values are used as hash indexes of a first physical function hash table;

and creating a first physical function hash table according to the physical function base address register space and the hash index of the first physical function hash table.

According to the method for identifying the high-speed serial computer expansion bus equipment provided by the invention, the virtual function hash table is created, and the method comprises the following steps:

Obtaining a virtual function base address register space allocated by an upper computer;

performing first hash operation on the virtual function base address register space to obtain a plurality of virtual function address effective values;

when the virtual function effective values do not have conflict, the virtual function effective values are used as hash indexes of a first virtual function hash table;

and creating a first virtual function hash table according to the virtual function base address register space and the hash index of the first virtual function hash table.

According to the method for identifying the high-speed serial computer expansion bus equipment provided by the invention, the hash key calculation is performed according to the space address of the base address register of the high-speed serial computer expansion bus equipment to be accessed to generate the hash key for accessing the physical function, and the method comprises the following steps:

and performing a first hash operation on the space address of the base address register of the expansion bus equipment of the high-speed serial computer to be accessed to obtain a hash key of the access physical function.

According to the method for identifying the high-speed serial computer expansion bus equipment provided by the invention, the hash key calculation is performed according to the space address of the base address register of the high-speed serial computer expansion bus equipment to be accessed to generate the hash key with the access virtual function, and the method comprises the following steps:

Removing an alignment mask from a base address register space address of the high-speed serial computer expansion bus equipment to be accessed to obtain an access virtual function address actual value;

and performing a first hash operation on the access virtual function address actual value to acquire an access virtual function hash key.

According to the method for identifying the expansion bus device of the high-speed serial computer, the first hash operation comprises the following steps:

and intercepting the preset bit number of the low-order part of the address to be operated, and taking the reserved address as an operation result.

According to the method for identifying the high-speed serial computer expansion bus equipment provided by the invention, the physical function hash table and the virtual function hash table are searched in parallel according to the access physical function hash key and the access virtual function hash key, and the identification information of the high-speed serial computer expansion bus equipment to be accessed is obtained, and the method comprises the following steps:

if the access physical function hash key is successfully matched with the physical function hash table, acquiring identification information of the to-be-accessed high-speed serial computer expansion bus equipment according to a matching result of the access physical function hash key and the physical function hash table;

And if the access virtual function hash key is successfully matched with the virtual function hash table, acquiring the identification information of the to-be-accessed high-speed serial computer expansion bus equipment according to a matching result of the access virtual function hash key and the virtual function hash table.

According to the method for identifying the high-speed serial computer expansion bus equipment provided by the invention, the physical function hash table comprises a plurality of physical table items, each physical table item corresponds to a physical table item enabling bit, and if the access physical function hash key is successfully matched with the physical function hash table, the identification information of the high-speed serial computer expansion bus equipment to be accessed is obtained according to the matching result of the access physical function hash key and the physical function hash table, and the method comprises the following steps:

if an item which is the same as the access physical function hash key exists in the physical function hash table and the enabling bit of the item is valid, judging that the access physical function hash key is successfully matched with the physical function hash table, and acquiring the identification information of the to-be-accessed high-speed serial computer expansion bus equipment according to the mapping relation between the address and the identification information in the physical function hash table.

According to the method for identifying the high-speed serial computer expansion bus equipment provided by the invention, the virtual function hash table comprises a plurality of virtual table items, each virtual table item corresponds to a virtual table item enabling bit, and if the access virtual function hash key is successfully matched with the virtual function hash table, the identification information of the high-speed serial computer expansion bus equipment to be accessed is obtained according to the matching result of the access virtual function hash key and the virtual function hash table, and the method comprises the following steps:

if an item which is the same as the access virtual function hash key exists in the virtual function hash table and the enabling bit of the item is valid, judging that the access virtual function hash key is successfully matched with the virtual function hash table, and acquiring the identification information of the to-be-accessed high-speed serial computer expansion bus equipment according to the mapping relation between the address and the identification information in the virtual function hash table.

According to the method for identifying the expansion bus device of the high-speed serial computer provided by the invention, if a plurality of virtual table entries which are the same as the access virtual function hash key exist in the virtual function hash table and enable bits of each virtual table entry are valid, the method further comprises the following steps:

Respectively extracting equipment numbers in virtual table items successfully matched with each access virtual function hash key and the virtual function hash table;

and screening out the virtual table items with the equipment numbers identical with the physical function numbers in the corresponding virtual branches from the plurality of successfully matched virtual table items, and acquiring the identification information of the high-speed serial computer expansion bus equipment to be accessed according to the virtual table items.

According to the method for identifying the high-speed serial computer expansion bus equipment provided by the invention, when the effective values of the plurality of physical functions have conflict, the method further comprises the following steps:

performing a second hash operation on the address of the physical function base address register space to obtain a hash index of a second physical function hash table;

creating a second physical function hash table according to the hash index of the second physical function hash table;

respectively performing a first hash operation and a second hash operation according to the space address of the base address register of the to-be-accessed high-speed serial computer expansion bus device to obtain a first access key and a second access key;

searching the first physical function hash table according to the first access key, and searching the second physical function hash table according to the second access key;

And acquiring a physical function hash table successfully matched according to the search result, and acquiring the identification information of the to-be-accessed high-speed serial computer expansion bus equipment from the physical function hash table successfully matched.

According to the method for identifying the high-speed serial computer expansion bus equipment provided by the invention, when the effective values of the virtual functions have conflict, the method further comprises the following steps:

performing a second hash operation on the address of the virtual function base address register space to obtain a hash index of a second virtual function hash table;

creating a second virtual function hash table according to the hash index of the second virtual function hash table;

searching the first virtual function hash table according to the first access key, and searching the second virtual function hash table according to the second access key;

obtaining a virtual function hash table successfully matched according to the search result,

if a plurality of successfully matched virtual table entries exist in the successfully matched virtual function hash table, and the enabling bit of each successfully matched virtual table entry is valid, respectively extracting the equipment number of each successfully matched virtual table entry;

According to the method for identifying the high-speed serial computer expansion bus equipment, the alignment masks of the virtual functions subordinate to different physical functions are different, and the virtual function addresses of the different alignment masks exist in the same virtual function hash table.

The invention provides a high-speed serial computer expansion bus equipment identification method, which further comprises the following steps:

multiple virtual function hash table copies are created such that each virtual tributary individually corresponds to one virtual function hash table copy.

According to the method for identifying the expansion bus device of the high-speed serial computer provided by the invention, the virtual function hash table and the physical function hash table further comprise:

and the base address register number is used for representing the number of the target base address register to be accessed, and the base address register number is an integer value in the range of 0-5.

And the virtual function flag bit is used for representing whether the current hash table is a virtual function hash table or not, and when the virtual function flag bit is valid, the virtual function flag bit represents that the current hash table is the virtual function hash table.

According to the identification method of the high-speed serial computer expansion bus equipment provided by the invention, the identification information of the high-speed serial computer expansion bus equipment to be accessed comprises at least one of bus numbers, equipment numbers and function numbers;

when the virtual function flag bit is invalid, acquiring a function number according to a function number corresponding to a preset physical function;

and when the virtual function flag bit is valid, calculating a function number according to the difference value of the address valid value of the virtual function and the alignment mask.

The invention also provides a high-speed serial computer expansion bus equipment identification device, which comprises:

the creation module is used for creating a physical function hash table and a virtual function hash table;

the device comprises a receiving module, a processing module and a processing module, wherein the receiving module is used for receiving device base address space access request information sent by an upper computer, and the device base address space access request information comprises a base address register space address of high-speed serial computer expansion bus device to be accessed;

The computing module is used for carrying out hash key computation in parallel according to the space address of the base address register of the high-speed serial computer expansion bus equipment to be accessed to generate a physical function hash key and a virtual function hash key;

and the searching module is used for searching the physical function hash table and the virtual function hash table in parallel according to the physical function hash key and the virtual function hash key, and acquiring the identification information of the to-be-accessed high-speed serial computer expansion bus equipment.

The invention also provides an electronic device comprising a memory, a processor and a computer program stored in the memory and capable of running on the processor, wherein the processor realizes the high-speed serial computer expansion bus device identification method according to any one of the above when executing the program.

The present invention also provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the high-speed serial computer expansion bus device identification method of any of the above.

The invention provides a method, a device and related equipment for identifying high-speed serial computer expansion bus equipment, which are characterized in that a physical function hash table and a virtual function hash table are created; receiving equipment base address space access request information sent by an upper computer, wherein the equipment base address space access request information comprises a base address register space address of high-speed serial computer expansion bus equipment to be accessed; performing hash key calculation in parallel according to the space address of the base address register of the high-speed serial computer expansion bus equipment to be accessed to generate a physical function hash key and a virtual function hash key; according to the physical function hash key and the virtual function hash key, the physical function hash table and the virtual function hash table are searched in parallel, identification information of the expansion bus equipment of the high-speed serial computer to be accessed is obtained, and the target matching of the BAR space access request can be rapidly completed under the high-density equipment scene through parallel operation and parallel table searching, so that the matching time is reduced; by respectively designing the physical function hash table and the virtual function hash table, the space size of the virtual function base address BAR is free from the space size limit of the physical function base address BAR, and the flexibility of equipment design is improved.

Drawings

In order to more clearly illustrate the invention or the technical solutions in the related art, the following description will briefly explain the drawings used in the embodiments or the related art description, and it is obvious that the drawings in the following description are some embodiments of the invention, and other drawings can be obtained according to the drawings without inventive effort for those skilled in the art.

FIG. 1 is a flow chart of a method for identifying a high-speed serial computer expansion bus device provided by the invention;

FIG. 2 is a schematic diagram of a device BAR space and its corresponding PCIe memory address space;

FIG. 3 is a schematic diagram of an example hash table creation provided by the present invention;

FIG. 4 is a virtual function hash representation intent provided by the present invention;

FIG. 5 is a schematic diagram of the structure of the base address registers of the physical and virtual functions provided by the present invention;

FIG. 6 is a flow chart of the BAR space matching phase provided by the present invention;

FIG. 7 is a schematic diagram of the functional structure of the high-speed serial computer expansion bus device identification apparatus provided by the present invention;

FIG. 8 is a schematic diagram of the functional architecture of the high-speed serial computer expansion bus device identification system provided by the present invention;

Fig. 9 is a schematic functional structure of an electronic device provided by the present invention.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

Fig. 1 is a flowchart of a method for identifying a high-speed serial computer expansion bus device according to an embodiment of the present invention, where, as shown in fig. 1, the method for identifying a high-speed serial computer expansion bus device according to an embodiment of the present invention includes:

step 101, creating a physical function hash table and a virtual function hash table;

in the embodiment of the invention, the PCIe-SRIOV standard classifies devices into two types, namely physical functions and virtual functions. The virtual function is created by means of the physical function, and a part of configuration information of the virtual function is located in an extended configuration space of the physical function and is shared by all virtual functions subordinate to the physical function. The virtual function and the physical function have independent configuration spaces, and are not mutually influenced in data transmission. When the physical function and virtual function devices conforming to the SRIOV standard are realized, the Linux kernel allocates addresses for the BAR in the physical function configuration space and the virtual function BAR in the physical function expansion configuration space respectively according to the actual configuration of the devices, and then allocates the addresses of the devices in the PCIe storage address space according to the mode of FIG. 1.

As shown in fig. 2, in the SRIOV high-density device scenario, the total number of BAR spaces can reach thousands, and when the total number of BAR spaces increases in the conventional traversal table lookup method, the matching time also increases; and the sizes of the address spaces are different, and the BARs only belong to the same virtual function base address register, so that the matching route design of the BAR space of the equipment is very difficult.

According to the embodiment of the invention, through the design of parallel logics such as alignment, hash operation, table lookup, filtering and the like, when the access request of the BAR address space is received, the target equipment address of the BAR address space can be calculated in more than ten fixed hardware periods, the bottom-layer guarantee is provided for the bandwidth and time delay performance of the whole FPGA heterogeneous equipment, and the target matching of the BAR address space access request can be completed with fixed time delay expenditure under the high-density PCIe-SRIOV equipment scene. And by different structural designs of physical functions and virtual function hash tables and hash table algorithm designs, the space size of the virtual function BAR is free from physical function limitation, and the flexibility of equipment design is improved.

102, receiving equipment base address space access request information sent by an upper computer, wherein the equipment base address space access request information comprises a base address register space address of high-speed serial computer expansion bus equipment to be accessed;

Step 103, performing hash key calculation in parallel according to the space address of the base address register of the high-speed serial computer expansion bus equipment to be accessed to generate a physical function hash key and a virtual function hash key;

and 104, searching the physical function hash table and the virtual function hash table in parallel according to the physical function hash key and the virtual function hash key, and acquiring the identification information of the to-be-accessed high-speed serial computer expansion bus equipment.

The traditional high-speed serial computer expansion bus equipment identification method is to establish a mapping relation table between equipment BAR space and PCIe storage address space and to realize identification of target PCIe equipment by traversing the mapping relation table. However, in a virtualized scenario, especially in a high-density virtual machine scenario, the number of devices is often expanded by adopting a PCIe-SRIOV technology, at this time, the total size and total number of BAR spaces are also multiplied along with the number of virtual functions, at this time, the address matching and access routing speed of the BAR spaces are affected by a table lookup traversal method. In addition, because the virtual address directly reflected in the extended configuration space corresponds to only one virtual function, the addresses of other virtual functions are all obtained by kernel calculation, so that the total size of the virtual function BAR space is required to be equal to the size of the physical function BAR space in order to ensure correct table lookup, and the single virtual function BAR space is easily limited or the physical function BAR space resource is easily wasted.

The embodiment of the invention provides a high-speed serial computer expansion bus equipment identification method, which comprises the steps of creating a physical function hash table and a virtual function hash table; receiving equipment base address space access request information sent by an upper computer, wherein the equipment base address space access request information comprises a base address register space address of high-speed serial computer expansion bus equipment to be accessed; performing hash key calculation in parallel according to the space address of the base address register of the high-speed serial computer expansion bus equipment to be accessed to generate a physical function hash key and a virtual function hash key; according to the physical function hash key and the virtual function hash key, the physical function hash table and the virtual function hash table are searched in parallel, identification information of the expansion bus equipment of the high-speed serial computer to be accessed is obtained, and the target matching of the BAR space access request can be rapidly completed under the high-density equipment scene through parallel operation and parallel table searching, so that the matching time is reduced; by respectively designing the physical function hash table and the virtual function hash table, the space size of the virtual function base address BAR is free from the space size limit of the physical function base address BAR, and the flexibility of equipment design is improved.

Based on any of the above embodiments, creating a physical function hash table includes:

acquiring a physical function base address register space allocated by an upper computer; performing first hash operation on the addresses of the physical function base address register space to obtain a plurality of physical function effective values; when the plurality of physical function effective values do not have conflict, the physical function effective values are used as hash indexes of a first physical function hash table; and creating a first physical function hash table according to the physical function base address register space and the hash index of the first physical function hash table.

Based on any of the above embodiments, creating a virtual function hash table includes:

obtaining a virtual function base address register space allocated by an upper computer; performing first hash operation on the virtual function base address register space to obtain a plurality of virtual function address effective values; when the virtual function effective values do not have conflict, the virtual function effective values are used as hash indexes of a first virtual function hash table; and creating a first virtual function hash table according to the virtual function base address register space and the hash index of the first virtual function hash table.

In the embodiment of the invention, the physical function and the virtual function hash table are independently designed, so that the space size of the virtual function BAR is free from the limitation of the physical function, and the flexibility of the design of the equipment is improved.

As shown in fig. 3, the upper computer will allocate the address of the first virtual function BAR space in addition to the address of the physical function BAR space directly. For the physical function, hash table entries are directly created by taking the effective value of the address as an index, each table entry corresponds to one physical branch, such as 906, 907, C40 and C41, hash results of which the lower 10 bits are intercepted are respectively 106, 107, 040 and 041, and hash collision is not generated, so that hash table entries with hexadecimal 040, 041, 106 and 107 as indexes are created. For the virtual function, the lower 8 of the address effective value is taken as an alignment mask, and the effective value after the address effective value is removed from the alignment mask is taken as an index of a hash table of the virtual function, such as 9 and A, C, D. Both indexes are used to create two independent hash tables. For the virtual functions subordinate to different physical functions, the alignment masks are different, but share the same virtual function hash table, and the created virtual function hash table is shown in fig. 4, where each virtual function address in the virtual function hash table corresponds to a group of base address register number (BAR number), device number, virtual function flag bit and table entry enable bit.

Based on any of the above embodiments, the physical function hash table and the virtual function hash table are indexed by the hash key, and each address corresponds to a content including the hash key, the BAR number, the device number, the virtual function flag bit and the table entry enable bit.

The hash key is an address directly allocated to the BAR space by the kernel, and contains all information of the BAR space with the positioning physical function and part of information of the BAR space with the positioning virtual function.

The base address register number is used for representing a destination base address register number to be accessed, and the base address register number is an integer value in a range of 0-5. The base address register number information is recorded in the hash table when the kernel accesses the BAR in the configuration space, and is matched and read out when the kernel accesses the address space pointed to by the BAR.

The device number is the destination device number that requests the desired access. The TLP configuration space access request itself contains the destination BDF information and can be recorded when the kernel performs configuration space access. The device number is the basis for filtering invalid cross matches in the matching stage.

The virtual function flag bit is used for representing whether the current hash table is a virtual function hash table or not, and when the virtual function flag bit is valid, the current hash table is represented as the virtual function hash table. The virtual function flag bit marks the physical function device or the virtual function device corresponding to the hash table. If the BAR of the kernel configuration is located in the device configuration space, marking the corresponding physical function device of the table item; if the kernel configured BAR is located in the device extension configuration space, the representation is marked as corresponding to the virtual function device. The virtual function flag bit determines whether the matching stage requires further calculation of the function number from the table look-up result.

In the embodiment of the invention, the identification information of the to-be-accessed high-speed serial computer expansion bus equipment comprises at least one of bus numbers, equipment numbers and function numbers;

For example, the function number is the difference between the address valid value of the virtual function and the alignment mask plus one.

And determining the unique high-speed serial computer expansion bus equipment according to the BAR number, the equipment number and the function number, thereby realizing accurate identification of the high-speed serial computer expansion bus equipment.

In the embodiment of the invention, the alignment masks of the virtual functions subordinate to different physical functions are different, and the virtual function addresses of the different alignment masks exist in the same virtual function hash table.

In some embodiments of the invention, further comprising:

a plurality of virtual function hash table copies are created such that each virtual tributary individually corresponds to one virtual function hash table copy. One request target address corresponds to one physical branch and two virtual branches in fig. 6.

In the embodiment of the invention, each virtual branch independently corresponds to one virtual function hash table copy, so that the table lookup speed can be increased.

Based on any one of the above embodiments, the method for identifying a high-speed serial computer expansion bus device according to the embodiment of the present invention includes:

step 201, creating a physical function hash table and a virtual function hash table;

step 202, receiving device base address space access request information sent by an upper computer, wherein the device base address space access request information comprises a base address register space address of high-speed serial computer expansion bus device to be accessed;

step 203, performing a first hash operation on the base address register space address of the high-speed serial computer expansion bus device to be accessed, obtaining a hash key of the access physical function, and removing an alignment mask from the base address register space address of the high-speed serial computer expansion bus device to be accessed, obtaining an actual value of the access virtual function address; performing first hash operation on the access virtual function address actual value to acquire an access virtual function hash key;

in an embodiment of the present invention, the first hash operation includes:

And 204, searching the physical function hash table and the virtual function hash table in parallel according to the access physical function hash key and the access virtual function hash key, and acquiring the identification information of the to-be-accessed high-speed serial computer expansion bus equipment.

In the embodiment of the invention, the kernel enumerates PCIe devices and allocates addresses for the device BAR space. When detecting a configuration space read-write request aiming at a physical function BAR space, the FPGA takes the whole readable-writable address area as a hash key of a physical function hash table; when a configuration space read-write request for the virtual function BAR space is detected, the high-order part of the readable and writable address area is used as a hash key of a physical function hash table, the discarded low-order part is called an alignment mask, and the bit width is related to the upper limit of the number of the expanded virtual functions. The physical function and virtual function BAR space structure of the invention is shown in FIG. 5, and the 64-bit BAR space size is 1MB, and 255 virtual functions are expanded for each physical function.

step 301, creating a physical function hash table and a virtual function hash table;

Step 302, receiving device base address space access request information sent by an upper computer, wherein the device base address space access request information comprises a base address register space address of high-speed serial computer expansion bus device to be accessed;

step 303, performing a first hash operation on the base address register space address of the high-speed serial computer expansion bus device to be accessed, obtaining a hash key of the access physical function, and removing an alignment mask from the base address register space address of the high-speed serial computer expansion bus device to be accessed, obtaining an actual value of the access virtual function address; performing first hash operation on the access virtual function address actual value to acquire an access virtual function hash key;

step 304, searching the physical function hash table and the virtual function hash table in parallel according to the access physical function hash key and the access virtual function hash key;

step 305, if the physical function hash key is successfully matched with the physical function hash table, acquiring the identification information of the to-be-accessed high-speed serial computer expansion bus device according to the matching result of the physical function hash key and the physical function hash table;

And 306, if the access virtual function hash key is successfully matched with the virtual function hash table, acquiring the identification information of the to-be-accessed high-speed serial computer expansion bus equipment according to a matching result of the access virtual function hash key and the virtual function hash table.

Based on any of the foregoing embodiments, the physical function hash table includes a plurality of physical table entries, each physical table entry corresponds to a physical table entry enabling bit, and if the matching between the access physical function hash key and the physical function hash table is successful, the obtaining, according to a matching result between the access physical function hash key and the physical function hash table, identification information of the to-be-accessed high-speed serial computer expansion bus device includes:

step 401, creating a physical function hash table and a virtual function hash table;

step 402, receiving device base address space access request information sent by an upper computer, wherein the device base address space access request information comprises a base address register space address of high-speed serial computer expansion bus device to be accessed;

step 403, taking a base address register space address of the high-speed serial computer expansion bus device to be accessed as the physical function hash key;

Step 404, if an entry which is the same as the access physical function hash key exists in the physical function hash table and the enabling bit of the entry is valid, it is determined that the access physical function hash key is successfully matched with the physical function hash table, and the identification information of the to-be-accessed high-speed serial computer expansion bus device is obtained according to the mapping relationship between the address and the identification information in the physical function hash table.

Based on any one of the above embodiments, when hash collision exists in the physical function hash table, the method for identifying the high-speed serial computer expansion bus device provided by the embodiment of the invention includes:

step 501, performing a second hash operation on the address of the physical function base address register space to obtain a hash index of a second physical function hash table;

step 502, creating a second physical function hash table according to the hash index of the second physical function hash table;

step 503, performing a first hash operation and a second hash operation according to the space address of the base address register of the to-be-accessed high-speed serial computer expansion bus device, so as to obtain a first access key and a second access key;

step 504, searching the first physical function hash table according to the first access key, and searching the second physical function hash table according to the second access key;

Step 505, obtaining a physical function hash table successfully matched according to the search result, and obtaining the identification information of the to-be-accessed high-speed serial computer expansion bus device from the physical function hash table successfully matched.

In the embodiment of the invention, the avoidance of hash collision is mainly realized in the calculation process of hash indexes in the hash table creation stage. For example, the lower ten bits of the hash key are intercepted as the hash table index, if no index conflict is detected, the table entry is created and written into the hash table corresponding to the first hash algorithm. When the hash collision is found, the hash key is used as a hash table index according to ten-bit cyclic exclusive OR values, and the hash table corresponding to the second hash algorithm is written. The design bears 2K hash table items at maximum, can ensure that hash collision does not occur when the total address space of the equipment does not exceed 514 (512+2) GB on the premise of allocating continuous addresses to the cores, and can avoid the hash collision with maximum probability on the premise of discontinuous addresses.

Based on any one of the above embodiments, the virtual function hash table includes a plurality of virtual table entries, each virtual table entry corresponds to a virtual table entry enabling bit, and the method for identifying a high-speed serial computer expansion bus device provided by the invention includes:

And 601, if an entry which is the same as the access virtual function hash key exists in the virtual function hash table and the enabling bit of the entry is valid, judging that the access virtual function hash key is successfully matched with the virtual function hash table, and acquiring the identification information of the to-be-accessed high-speed serial computer expansion bus equipment according to the mapping relation between the address and the identification information in the virtual function hash table.

Step 602, if there are multiple virtual entries in the virtual function hash table that are the same as the access virtual function hash key and the enable bit of each virtual entry is valid, further includes: respectively extracting equipment numbers in virtual table items successfully matched with each access virtual function hash key and the virtual function hash table;

and 603, screening out a virtual table item with the equipment number identical to the physical function number in the corresponding virtual branch from a plurality of successfully matched virtual table items, and acquiring identification information of the expansion bus equipment of the high-speed serial computer to be accessed according to the virtual table item.

Based on any one of the above embodiments, when hash collision occurs in a virtual function, the method for identifying a high-speed serial computer expansion bus device according to the embodiment of the present invention includes:

701, performing a second hash operation on the address of the virtual function base address register space to obtain a hash index of a second virtual function hash table;

step 702, creating a second virtual function hash table according to the hash index of the second virtual function hash table;

step 703, performing a first hash operation and a second hash operation according to the space address of the base address register of the to-be-accessed high-speed serial computer expansion bus device, so as to obtain a first access key and a second access key;

in the embodiment of the invention, the second access key obtaining method comprises the steps of removing an alignment mask from a base address register space address of the high-speed serial computer expansion bus equipment to be accessed to obtain an access virtual function address actual value; and performing a second hash operation on the access virtual function address actual value to acquire a second access key. The method for acquiring the alignment mask is to take a bit value of a preset bit number of a low bit part of a space address effective value of a base address register of the high-speed serial computer expansion bus equipment to be accessed as the alignment mask; in the embodiment of the invention, the virtual function hash table introduces an alignment mask, and a device number field is added in the table to filter out the actual address in the cross matching phenomenon.

Step 704, searching the first virtual function hash table according to the first access key, and searching the second virtual function hash table according to the second access key;

step 705, obtaining a virtual function hash table successfully matched according to the search result,

step 706, if there are multiple successfully-matched virtual entries in the successfully-matched virtual function hash table, and the enable bit of each successfully-matched virtual entry is valid, extracting the device number of each successfully-matched device respectively;

step 707, selecting a virtual table item with the equipment number identical to the physical function number in the corresponding virtual branch from the plurality of successfully matched virtual table items, and acquiring identification information of the expansion bus equipment of the high-speed serial computer to be accessed according to the virtual table item.

In the embodiment of the invention, a first hash operation is adopted: the low-order interception and the second hash operation are used for circularly exclusive-or, so that the hash flushing problem is avoided on the premise of continuous addresses.

In the embodiment of the invention, the vast majority of hash collision problems in the scene are solved by combining two simple hash algorithms, and in the address matching stage, the equipment address space access request received by the FPGA only contains address information, and the destination BDF and BAR number of the request are calculated by means of the design, so that the quick routing of the upper computer request is completed. And processing the address information in the request in parallel, wherein a physical function hash table lookup branch directly extracts the hash key in the request address, and the virtual function hash table lookup branch needs to subtract a virtual function BAR alignment mask of the corresponding physical function.

In the embodiment of the invention, the total number of the virtual functions is the integer power of 2, so that different BAR alignment masks belonging to the same virtual function are the same, and no extra branch is needed for processing.

After mask processing, the physical function branch and the virtual function branches obtain hash keys with different lengths, the two hash operations are respectively carried out, and each branch obtains two operation results with the same bit width as a hash table index. Searching a hash table of a corresponding branch by using the hash index value to obtain a hash result containing a hash key, a BAR number, a device number, a virtual function flag bit and a table item enabling bit; and (3) confirming that the table entry enabling bit of the hash result is pulled high, then comparing the corresponding bit of the aligned original request address with a hash key field in the hash result, and if the corresponding bit is the same as the hash key field in the hash result, indicating that the matching is successful. After the matching is completed, at least one item of table lookup result of all branches is successfully matched. Because of the design of the alignment masks in the invention, the virtual function hash tables with extremely low probability that a certain physical function belongs to are successfully matched at the junction of the physical functions, namely, after the requests of the virtual functions of the physical functions are aligned by using the alignment masks of other physical functions, the hash tables of the physical functions are just successfully searched, and at the moment, the equipment number fields in the hash tables are required to be compared with the equipment numbers corresponding to the branches so as to assist in identifying the cross matching phenomenon.

As shown in fig. 6, address information referring to the example of fig. 3, the target address of the upper computer request is a050—0000: in the address alignment stage, the physical function table look-up branch does not perform any processing, the effective value of the request address is directly extracted as the table look-up address, the virtual function branch which the physical function 1 belongs to subtracts the alignment mask 08, the virtual function branch which the physical function 2 belongs to subtracts the alignment mask 42, and table look-up addresses 9 and A and offset FD and C3 after alignment are respectively obtained;

in the hash operation stage, the physical function table look-up branch is used for respectively carrying out two hash operations of intercepting low 10 bits and calculating 10-bit cyclic exclusive OR values on the A05, wherein the results are 205 and 207 respectively, the two hash operation results of the virtual function branch which the physical function 1 belongs to are 9, and the two hash operation results of the virtual function branch which the physical function 2 belongs to are A;

in the hash table lookup stage, the physical function table lookup branches 205 and 207 fail in table lookup, and the virtual function branch table lookup to which the physical function 1 and the physical function 2 belong succeeds.

In the matching judging stage, in the table lookup results of the virtual function branches to which the physical function 1 and the physical function 2 belong, the enabling bits are pulled high, and the corresponding bits 9 and A of the aligned original request address are identical to hash key fields in the hash results.

In the cross matching filtering stage, the equipment number in the table look-up result of the virtual function branch to which the physical function 2 belongs corresponds to the physical function 1, so that the branch matching result is judged to be invalid. Finally, the device and BAR space numbers corresponding to address a050_0000 are successfully obtained as physical function 1, virtual function 254, BAR0.

The high-speed serial computer expansion bus equipment identification method provided by the embodiment of the invention solves the problems of high time delay, limited size of a single virtual function BAR, waste of physical function BAR space resources and the like of the traditional method, respectively creates hash tables with different structures for the physical function and the virtual function when kernel software reads and writes the BAR space, aligns read and write addresses according to a specific mode when a storage address space in the read and write BAR space is driven, then uses the read and write addresses as hash keys and executes hash operation, searches the operation results in parallel for the physical function and the virtual function hash tables, finally eliminates the cross matching phenomenon through a filtering mechanism, and finally obtains the destination equipment, function and BAR numbering information for driving the read and write request. And two hash algorithms with simple realization are adopted to supplement each other, and the table resource expense is used for replacing the conflict lookup time delay, so that the performance requirement of most systems on hash conflict avoidance in the present scene can be met. Through a large number of parallel operations and parallel table lookup designs, the target matching of the BAR space access request can be completed rapidly in a high-density equipment scene, and compared with a method of table building and traversal comparison, the method improves the matching time which depends on the number of equipment to fixed matching time; the method solves most hash collision problems with low resource overhead and low delay introduction through the combination of two simple hash operations; by respectively designing the physical function hash table and the virtual function hash table and adopting hash index table lookup with different lengths, the space size of the virtual function BAR is free from the limitation of the physical function, and the flexibility of equipment design is improved.

The high-speed serial computer expansion bus device identification device provided by the invention is described below, and the high-speed serial computer expansion bus device identification device described below and the high-speed serial computer expansion bus device identification method described above can be correspondingly referred to each other.

Fig. 7 is a functional schematic diagram of a high-speed serial computer expansion bus device identification apparatus according to an embodiment of the present invention, where, as shown in fig. 7, the high-speed serial computer expansion bus device identification apparatus according to an embodiment of the present invention includes:

a creating module 701, configured to create a physical function hash table and a virtual function hash table;

the receiving module 702 is configured to receive device base address space access request information sent by an upper computer, where the device base address space access request information includes a base address register space address of a high-speed serial computer expansion bus device to be accessed;

a calculation module 703, configured to perform hash key calculation in parallel according to the base address register space address of the to-be-accessed high-speed serial computer expansion bus device to generate an access physical function hash key and an access virtual function hash key;

and the searching module 704 is configured to search the physical function hash table and the virtual function hash table in parallel according to the access physical function hash key and the access virtual function hash key, and acquire identification information of the to-be-accessed high-speed serial computer expansion bus device.

The high-speed serial computer expansion bus equipment identification device provided by the embodiment of the invention is characterized in that a physical function hash table and a virtual function hash table are created; receiving equipment base address space access request information sent by an upper computer, wherein the equipment base address space access request information comprises a base address register space address of high-speed serial computer expansion bus equipment to be accessed; performing hash key calculation in parallel according to the space address of the base address register of the high-speed serial computer expansion bus equipment to be accessed to generate a physical function hash key and a virtual function hash key; according to the physical function hash key and the virtual function hash key, the physical function hash table and the virtual function hash table are searched in parallel, identification information of the expansion bus equipment of the high-speed serial computer to be accessed is obtained, and the target matching of the BAR space access request can be rapidly completed under the high-density equipment scene through parallel operation and parallel table searching, so that the matching time is reduced; by respectively designing the physical function hash table and the virtual function hash table, the space size of the virtual function base address BAR is free from the space size limit of the physical function base address BAR, and the flexibility of equipment design is improved.

In an embodiment of the present invention, the computing module 703 is configured to:

In an embodiment of the present invention, the lookup module 704 is configured to:

In the embodiment of the present invention, the physical function hash table includes a plurality of physical table entries, each physical table entry corresponds to a physical table entry enabling bit, and if the physical function hash key is successfully matched with the physical function hash table, the method obtains the identification information of the to-be-accessed high-speed serial computer expansion bus device according to the matching result of the physical function hash key and the physical function hash table, including:

In the embodiment of the present invention, the virtual function hash table includes a plurality of virtual table entries, each virtual table entry corresponds to a virtual table entry enabling bit, and if the access virtual function hash key is successfully matched with the virtual function hash table, the obtaining the identification information of the to-be-accessed high-speed serial computer expansion bus device according to the matching result of the access virtual function hash key and the virtual function hash table includes:

In the embodiment of the present invention, if there are multiple virtual entries in the virtual function hash table, which are the same as the access virtual function hash key, and the enable bit of each virtual entry is valid, the method further includes:

In the embodiment of the present invention, when there is a conflict between the valid values of the plurality of physical functions, the method further includes: performing a second hash operation on the address of the physical function base address register space to obtain a hash index of a second physical function hash table;

In the embodiment of the present invention, when there is a conflict between the valid values of the multiple virtual functions, the method further includes: performing a second hash operation on the address of the virtual function base address register space to obtain a hash index of a second virtual function hash table;

In an embodiment of the present invention, the creation module 701 is configured to:

In an embodiment of the present invention, the creation module 701 is further configured to:

As shown in fig. 8, a high-speed serial computer expansion bus device identification system provided in an embodiment of the present invention includes:

hash table initialization and BAR space matching. The functions of the two parts are performed in time sequentially. The hash table initialization module creates a hash table for addresses directly allocated to part of BAR space according to the upper computer and provides alignment mask information; the BAR space matching module receives a BAR space access request of the upper computer, performs operations such as address alignment, hash operation, hash table lookup, matching judgment, filtering and the like, and rapidly extracts BDF (Bus, device, function, bus number, device number and function number) information from address information for processing by the bottom layer module. The unique PCIe device may be identified by the BDF information.

Fig. 9 illustrates a physical structure diagram of an electronic device, and as shown in fig. 9, the server may include: processor 910, communication interface (Communications Interface), memory 930, and communication bus 940, wherein processor 910, communication interface 920, and memory 930 communicate with each other via communication bus 940. Processor 910 can invoke logic instructions in memory 930 to perform a high-speed serial computer expansion bus device identification method comprising: creating a physical function hash table and a virtual function hash table; receiving equipment base address space access request information sent by an upper computer, wherein the equipment base address space access request information comprises a base address register space address of high-speed serial computer expansion bus equipment to be accessed; performing hash key calculation in parallel according to the space address of the base address register of the high-speed serial computer expansion bus equipment to be accessed to generate a physical function hash key and a virtual function hash key; and searching the physical function hash table and the virtual function hash table in parallel according to the physical function hash key and the virtual function hash key, and acquiring identification information of the expansion bus equipment of the high-speed serial computer to be accessed.

In another aspect, the present invention also provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, is implemented to perform the high-speed serial computer expansion bus device identification method provided by the above methods, the method comprising: creating a physical function hash table and a virtual function hash table; receiving equipment base address space access request information sent by an upper computer, wherein the equipment base address space access request information comprises a base address register space address of high-speed serial computer expansion bus equipment to be accessed; performing hash key calculation in parallel according to the space address of the base address register of the high-speed serial computer expansion bus equipment to be accessed to generate a physical function hash key and a virtual function hash key; and searching the physical function hash table and the virtual function hash table in parallel according to the physical function hash key and the virtual function hash key, and acquiring identification information of the expansion bus equipment of the high-speed serial computer to be accessed.

The apparatus embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.

From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on such understanding, the foregoing technical solution may be embodied essentially or in a part contributing to the related art in the form of a software product, which may be stored in a computer readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform the method described in the respective embodiments or some parts of the embodiments.

Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for identifying a high-speed serial computer expansion bus device, comprising:

creating a physical function hash table and a virtual function hash table based on the addresses of the physical function base address register space and the virtual function base address register space distributed by the upper computer, wherein the addresses in the physical function hash table and the virtual function hash table have a mapping relation with the identification information of the high-speed serial computer expansion bus equipment;

performing hash key calculation in parallel according to the space address of the base address register of the to-be-accessed high-speed serial computer expansion bus equipment to generate an access physical function hash key and an access virtual function hash key;

and searching the physical function hash table and the virtual function hash table in parallel according to the access physical function hash key and the access virtual function hash key, and acquiring the identification information of the to-be-accessed high-speed serial computer expansion bus equipment.

2. The method for identifying a high-speed serial computer expansion bus device according to claim 1, wherein said creating a physical function hash table comprises:

3. The method for identifying a high-speed serial computer expansion bus device according to claim 1, wherein said creating a virtual function hash table comprises:

performing first hash operation on the addresses of the virtual function base address register space to obtain a plurality of virtual function address effective values;

4. The method for identifying a high-speed serial computer expansion bus device according to claim 1, wherein said performing hash key calculation according to a base address register space address of the high-speed serial computer expansion bus device to be accessed to generate an access physical function hash key comprises:

5. The method for identifying a high-speed serial computer expansion bus device according to claim 1, wherein said performing hash key calculation according to a base address register space address of the high-speed serial computer expansion bus device to be accessed to generate an access virtual function hash key comprises:

6. The method for identifying a high-speed serial computer expansion bus device according to any one of claims 2 to 5, wherein the first hash operation includes:

7. The method for identifying a high-speed serial computer expansion bus device according to claim 1, wherein said searching the physical function hash table and the virtual function hash table in parallel according to the access physical function hash key and the access virtual function hash key, and obtaining the identification information of the high-speed serial computer expansion bus device to be accessed, comprises:

8. The method for identifying a high-speed serial computer expansion bus device according to claim 7, wherein the physical function hash table includes a plurality of physical table entries, each physical table entry corresponds to a physical table entry enabling bit, and if the access physical function hash key is successfully matched with the physical function hash table, acquiring identification information of the high-speed serial computer expansion bus device to be accessed according to a matching result of the access physical function hash key and the physical function hash table, including:

9. The method for identifying a high-speed serial computer expansion bus device according to claim 7, wherein the virtual function hash table includes a plurality of virtual table entries, each virtual table entry corresponding to a virtual table entry enabling bit, and the obtaining the identification information of the high-speed serial computer expansion bus device to be accessed according to the matching result of the access virtual function hash key and the virtual function hash table if the access virtual function hash key and the virtual function hash table are successfully matched, comprises:

10. The method of claim 7, wherein if there are a plurality of virtual entries in the virtual function hash table that are identical to the access virtual function hash key and the enable bit of each virtual entry is valid, further comprising:

11. The method of claim 2, further comprising, in the event of a conflict of the plurality of physical function valid values:

12. The method of claim 3, further comprising, in the event of a collision of the plurality of virtual function valid values:

13. A method of identifying a high speed serial computer expansion bus device according to claim 3, wherein the alignment masks of virtual functions under different physical functions are different, and the virtual function addresses of the different alignment masks are present in the same virtual function hash table.

14. The high-speed serial computer expansion bus device identification method of claim 3, further comprising:

15. The method for identifying a high-speed serial computer expansion bus device according to claim 1, wherein the virtual function hash table and the physical function hash table further comprise:

16. The method for identifying a high-speed serial computer expansion bus device according to claim 1, wherein the virtual function hash table and the physical function hash table further comprise:

17. The method for identifying a high-speed serial computer expansion bus device according to claim 16, wherein the identification information of the high-speed serial computer expansion bus device to be accessed includes at least one of a bus number, a device number, and a function number;

18. A high-speed serial computer expansion bus device identification apparatus, comprising:

the system comprises a creation module, a virtual function hash table and a physical function hash table, wherein the creation module is used for creating the physical function hash table and the virtual function hash table based on the address of a physical function base address register space and the address of a virtual function base address register space distributed by an upper computer, and the addresses in the physical function hash table and the virtual function hash table have a mapping relation with the identification information of high-speed serial computer expansion bus equipment;

19. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the high speed serial computer expansion bus device identification method of any of claims 1 to 17 when the program is executed by the processor.

20. A non-transitory readable storage medium having stored thereon a computer program which, when executed by a processor, implements the high-speed serial computer expansion bus device identification method of any of claims 1 to 17.