CN117454834B - Automatic wiring method, device, equipment and storage medium for circuit schematic diagram - Google Patents
Automatic wiring method, device, equipment and storage medium for circuit schematic diagram Download PDFInfo
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- 238000005516 engineering process Methods 0.000 claims abstract description 25
- 238000010845 search algorithm Methods 0.000 claims abstract description 16
- 230000008447 perception Effects 0.000 claims abstract description 12
- 238000013507 mapping Methods 0.000 claims abstract description 11
- 238000004590 computer program Methods 0.000 claims description 11
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- 238000004891 communication Methods 0.000 description 6
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/394—Routing
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N5/00—Computing arrangements using knowledge-based models
- G06N5/01—Dynamic search techniques; Heuristics; Dynamic trees; Branch-and-bound
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The invention provides an automatic wiring method, device, equipment and storage medium for a circuit schematic diagram, wherein the method comprises the following steps: mapping the laid-out circuit devices to a netlist plane to obtain a transverse channel and a longitudinal channel for routing; obtaining two pins with the farthest signal connection level spans in a netlist plane, obtaining transverse wiring channels of the two pins by adopting a heuristic search algorithm, and converting signal connection into adjacent level signal connection; and (3) obtaining longitudinal wiring channels of adjacent-level signal connection by using a linear search technology, and distributing specific wire tracks by using a dynamic space perception technology. The invention fully utilizes the hierarchical information of the layout of the circuit device, reduces a great amount of searching process and peak memory consumption, shortens wiring time, reduces the number of redundant intersections and inflection points, and provides a solution for insufficient wiring space and space redundancy through a dynamic space sensing technology.
Description
Technical Field
The invention relates to the technical field of circuit design, in particular to an automatic wiring method, device and equipment for a circuit schematic diagram and a storage medium.
Background
The circuit schematic diagram is a drawing for reflecting the working principle of an electronic circuit, directly reflecting the structure and the working principle of the electronic circuit, and intuitively reflecting the conditions of all devices and the electrical connection conditions thereof in the circuit in a graphic mode. Wiring is a critical step in the schematic design of a circuit and its function is to connect components by wires so as to achieve a specific function. For complex circuit schematic diagrams, an automatic wiring technology is generally adopted, the automatic wiring technology is based on computer aided design software, automatic wiring is carried out according to set rules and constraint conditions after the schematic diagram design is completed, and when the circuit schematic diagram is automatically wired, various factors need to be comprehensively considered, and proper wiring rules and constraint conditions are selected to ensure the rationality and feasibility of the design.
At present, the automatic wiring technology of the circuit schematic diagram mainly adopts heuristic search algorithm wiring or a wiring method based on linear search, wherein the heuristic search algorithm wiring finds wiring channels where inflection points of all signal connections are located through an A-Star algorithm, and then distributes specific wire tracks for different inflection point types through constraint propagation. The linear search-based routing method is based on the layout result of the constraint graph, and all signal connections are converted into signal connections of adjacent levels by creating virtual devices, so that a wire track can be distributed for the signal connections of each adjacent level through the linear search. However, the wiring method adopting the a-Star algorithm generally takes a long time, the layout information cannot be fully utilized, the layout of the finally displayed schematic diagram is disordered, the connection relation between the signal trend and the circuit device cannot be clearly seen, and redundant crossing and inflection points can be caused by adopting the wiring method based on linear search. Therefore, an automatic wiring method for shortening the wiring time and simultaneously ensuring the clear wiring of the circuit schematic diagram and avoiding too many intersections and inflection points is needed at present.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, the invention provides an automatic wiring method, device, equipment and storage medium for a circuit schematic diagram, which effectively solve the problems that the wiring method in the prior art is long in time consumption, and layout information cannot be fully utilized, so that the finally displayed schematic diagram is disordered in wiring and redundant crossing and inflection points appear.
In a first aspect, the present invention provides a method for automatic routing of a schematic circuit diagram, the method comprising the steps of:
s100, mapping the laid-out circuit devices to a netlist plane to obtain a transverse channel and a longitudinal channel for routing;
s200, acquiring two pins with the farthest signal connection level spans in the netlist plane, acquiring transverse wiring channels of the two pins by adopting a heuristic search algorithm, and converting signal connection into adjacent level signal connection;
s300, utilizing a linear search technology to obtain longitudinal wiring channels of the adjacent-level signal connection, and distributing specific wire tracks through a dynamic space perception technology.
Further, the step S100 specifically includes the following steps:
s110, mapping the laid-out circuit devices to a netlist plane in sequence, and recording the level information of the circuit devices;
s120, cutting the netlist plane according to the upper and lower boundaries of the circuit device to obtain a transverse channel of a wiring;
s130, cutting the netlist plane according to the left and right boundaries of the circuit device to obtain a longitudinal channel of the wiring.
Further, the step of obtaining two pins with the farthest signal connection level spans in the netlist plane, and obtaining the transverse wiring channels of the two pins by adopting a heuristic search algorithm specifically comprises the following steps:
s210, traversing signal connection in the netlist plane to obtain a first pin and a second pin with the farthest hierarchical span in the signal connection;
s220, finding a transverse channel X where the first pin is located, and placing the rest transverse channels communicated with the transverse channel X into a priority queue;
s230, searching a transverse channel Y which is positioned on the same horizontal line with the transverse channel X and/or has the shortest longitudinal distance from the transverse channel where the second pin is positioned in the priority queue;
s240, placing the rest transverse channels communicated with the transverse channel Y in the priority queue, and repeating the step S230 until the transverse channel where the second pin is located is found;
s250, obtaining transverse wiring channels of the first pins and the second pins, and recording the wiring types of signal connection in the transverse wiring channels.
Further, the routing type of the signal connection in the transverse routing channel includes: upper U-shape, lower U-shape, direct connection shape and Z-shape.
Further, the converting the signal connection into the adjacent level signal connection specifically includes:
s260, traversing the transverse wiring channels, sorting the signal connections passing through the transverse wiring channels according to the wiring types, and distributing ordinate to different signal connections according to the sequence;
s270, creating virtual pins for signal connection according to the ordinate and the abscissa of the transverse wiring channel passing through different levels;
and S280, connecting the virtual pins with pins of front and back levels, and converting the signal connection of the cross-level into the signal connection of the adjacent level.
Further, the step S300 specifically includes the following steps:
s310, dividing the signal connection of the adjacent layers into different types, and searching longitudinal wiring channels according to the layers and the types;
s320, when the longitudinal wiring space is insufficient, recording the required number of the wire tracks by using a virtual longitudinal channel, and determining the moving distance of the circuit device according to the number of the wire tracks after the longitudinal wiring is finished;
s330, when the longitudinal wiring space is vacant, the occupied wire tracks in the longitudinal wiring channels are uniformly distributed.
Further, the types of the adjacent-level signal connection include: left U-shape, Z-shape and right U-shape.
In a second aspect, the present invention provides an automatic circuit schematic wiring device, the device comprising:
the channel acquisition module is used for mapping the laid-out circuit devices to a netlist plane to obtain a transverse channel and a longitudinal channel for routing;
the transverse wiring module is used for acquiring two pins with the farthest signal connection level spans in the netlist plane, acquiring transverse wiring channels of the two pins by adopting a heuristic search algorithm, and converting signal connection into adjacent level signal connection;
and the longitudinal wiring module is used for obtaining longitudinal wiring channels of the adjacent-level signal connection by utilizing a linear search technology and distributing specific wire tracks through a dynamic space perception technology.
In a third aspect, the present invention provides an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor executing steps of the computer program implementing the method for automatic routing of circuit schematic according to the first aspect of the present invention.
In a fourth aspect, the present invention provides a computer readable storage medium having stored thereon a computer program which when executed by a processor performs the steps of the schematic circuit diagram automatic layout method according to the first aspect of the present invention.
The automatic wiring method of the circuit schematic diagram fully utilizes the hierarchical information of the layout of the circuit devices, searches the transverse wiring channel through the improved heuristic search algorithm, and reduces a large amount of search processes and peak memory consumption by considering the distance and the quantity of inflection points, thereby shortening the wiring time; by linearly searching the longitudinal wiring channels, the wiring types are considered when specific wire tracks are distributed, and the number of redundant intersections and inflection points is reduced; meanwhile, a solution is provided for insufficient wiring space and space redundancy through a dynamic space perception technology, so that the wiring result is more attractive.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of an automatic wiring method for a schematic circuit diagram provided by an embodiment of the invention;
FIG. 2 is a schematic diagram of an automatic wiring device according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be further clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It should be noted that the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It will be understood that when an element is referred to as being "fixed to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
In the present invention, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the templates herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
At present, for a complex circuit schematic diagram, an automatic wiring technology is generally adopted, the automatic wiring technology is based on computer aided design software, automatic wiring is carried out according to set rules and constraint conditions after the schematic diagram is designed, wherein a wiring method adopting an A-Star algorithm is generally long in time, layout information cannot be fully utilized, the finally displayed schematic diagram is disordered in wiring, the connection relation between signal trend and circuit devices cannot be clearly seen, and redundant crossing and inflection points can be caused by adopting a wiring method based on linear search. Therefore, an automatic wiring method for shortening the wiring time and simultaneously ensuring the clear wiring of the circuit schematic diagram and avoiding too many intersections and inflection points is needed at present.
The embodiment of the invention provides an automatic wiring method for a circuit schematic diagram, which effectively solves the problems that the wiring method in the prior art is long in time consumption, layout information cannot be fully utilized, and the finally displayed schematic diagram is disordered in wiring and redundant crossing and inflection points appear. Fig. 1 is a flow chart of an automatic wiring method of a schematic circuit diagram according to an embodiment of the present invention, as shown in fig. 1, the method mainly includes the following steps:
step S100, mapping the laid-out circuit device to a netlist plane to obtain a transverse channel and a longitudinal channel for routing, wherein the method specifically comprises the following steps:
each laid out circuit device is mapped to the netlist plane in turn, since devices of the same hierarchy are arranged in the same column after the layout of the circuit device is finished, and the center points of the circuit devices are aligned, the column index of the circuit device in the layout is generally called hierarchy information, and the hierarchy information of each circuit device is recorded simultaneously in the mapping process.
And then cutting the netlist plane according to the upper and lower boundaries of each circuit device to obtain a transverse channel capable of being wired, and cutting the netlist plane according to the left and right boundaries of each circuit device to obtain a longitudinal channel capable of being wired.
Step 200, obtaining two pins with the farthest signal connection level spans in the netlist plane, obtaining transverse wiring channels of the two pins by adopting a heuristic search algorithm, and converting the signal connection into an adjacent level signal connection, wherein the method specifically comprises the following steps:
the signal connection is usually logic information obtained by reading a netlist, which represents connections among pins, traversing all signal connections, and recording two pins with the farthest level span in the current signal connection, namely a first pin A and a second pin B.
Anytime Weighted A-Star algorithm (AWA-Star algorithm) is developed on the basis of heuristic search algorithm A-Star algorithm, wherein the AWA-Star algorithm introduces weight coefficient, expands heuristic function to reduce the number of expanded nodes, accelerates the search speed, and adds termination condition to enable the AWA-Star algorithm to continue searching better paths under time-abundant condition. Therefore, the embodiment of the invention adopts an AWA-Star algorithm to find a transverse wiring channel which needs to pass through from the first pin A to the second pin B, and specifically comprises the following steps:
firstly, a transverse channel X where a first pin A is located is found, and the rest transverse channels communicated with the transverse channel X are placed in a priority queue; then searching a transverse channel Y which is positioned on the same horizontal line with the transverse channel X, namely whether turning is needed or not, and/or is closest to the longitudinal distance of the transverse channel where the second pin B is positioned in the priority queue; and finally, placing the rest transverse channels communicated with the transverse channel Y in a priority queue, and repeating the steps until the transverse channel where the second pin B is located is found, thereby obtaining the transverse wiring channels of the first pin A and the second pin B.
After the transverse wiring channels of the first pin A and the second pin B are obtained, the wiring types of the current signal connected to the transverse wiring channels are recorded, and the specific wiring types are divided into four types including an upper U type, a lower U type, a direct connection type and a Z type.
Traversing all the transverse wiring channels, sorting the signal connections passing through the transverse wiring channels according to the routing types, sorting the specific routing types into an upper U-shaped, a direct connection type, a Z-shaped and a lower U-shaped, and distributing specific ordinate to different signal connections according to the sequence.
Since circuit devices of the same level are arranged in the same column, if a certain signal connection is cross-level, after a transverse wiring channel through which the signal connection passes is found, a specific ordinate is determined in the corresponding transverse wiring channel, and a virtual pin is created according to the ordinate and the abscissa of the transverse wiring channel through which the signal connection passes, and the virtual pin is connected with pins of the front and rear levels, so that the signal of the cross-level is converted into the signal connection of the adjacent level.
Step S300, a longitudinal wiring channel of adjacent-level signal connection is obtained by utilizing a linear search technology, and meanwhile, a specific wire track is distributed by a dynamic space perception technology, and the method specifically comprises the following steps:
to reduce crossover, the signal connections of all adjacent levels are divided into three categories: left U-shaped, Z-shaped, right U-shaped, then signal connections are ordered according to levels and types, specifically longitudinal wiring channels are found for the left U-shaped and Z-shaped signal connections in order from left to right, longitudinal wiring channels are found for the right U-shaped from right to left, and wiring tracks are allocated at the same time.
In the process of distributing the wire tracks, because the space required by the routing cannot be accurately estimated in the layout, the dynamic space perception technology is adopted in the longitudinal routing process to distribute the wire tracks, and the method specifically comprises the following steps: when the longitudinal wiring space is insufficient, a virtual longitudinal channel is used for recording the required number of lines and tracks, and after the longitudinal wiring is finished, the right distance of the device is determined by the number of lines and tracks of the virtual channel; when the wiring space is free, the occupied wire tracks in the longitudinal channel can be uniformly distributed, so that the wiring result is more attractive.
In another aspect of the embodiment of the present invention, there is further provided an automatic circuit schematic wiring device, and fig. 2 is a block diagram of the automatic circuit schematic wiring device provided in the embodiment of the present invention, as shown in fig. 2, where the device includes:
a channel acquisition module 210, configured to map the laid-out circuit device to a netlist plane, and obtain a lateral channel and a longitudinal channel for routing;
the transverse wiring module 220 is configured to obtain two pins with the farthest signal connection level spans in the netlist plane, obtain transverse wiring channels of the two pins by adopting a heuristic search algorithm, and convert signal connection into adjacent level signal connection;
the longitudinal routing module 230 is configured to obtain longitudinal routing channels of signal connections of adjacent levels using a linear search technique, and simultaneously allocate specific wire tracks through a dynamic spatial perception technique.
Based on the same conception, the embodiment of the invention also provides a schematic structural diagram of the electronic device, as shown in fig. 3, the electronic device may include: processor 310, communication interface (Communications Interface) 320, memory 330 and communication bus 340, wherein processor 310, communication interface 320, memory 330 accomplish communication with each other through communication bus 340. The processor 310 may invoke logic instructions in the memory 330 to perform the steps of the schematic auto-route method as described in the various embodiments above. Examples include:
step S100, mapping the laid-out circuit devices to a netlist plane to obtain a transverse channel and a longitudinal channel for routing;
step S200, obtaining two pins with the farthest signal connection level spans in a netlist plane, obtaining transverse wiring channels of the two pins by adopting a heuristic search algorithm, and converting signal connection into adjacent level signal connection;
and step S300, utilizing a linear search technology to obtain longitudinal wiring channels connected with signals of adjacent layers, and distributing specific wire tracks through a dynamic space perception technology.
The processor 310 may be a central processing unit (Central Processing Unit, CPU). The processor may also be any other general purpose processor, digital signal processor (Digital Signal Processor, DSP), application specific integrated circuit (Application Specific Integrated Circuit, ASIC), field programmable gate array (Field-Programmable Gate Array, FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof.
Further, the logic instructions in the memory 330 described above may be implemented in the form of software functional units and may be stored in a computer-readable storage medium when sold or used as a stand-alone product. Based on this understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
Memory 330 may include a storage program area that may store an operating system, at least one application program required for functionality, and a storage data area; the storage data area may store data created by the processor, etc. In addition, the memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some implementations, the memory optionally includes memory remotely located relative to the processor, the remote memory being connectable to the processor through a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
Based on the same conception, the embodiments of the present invention also provide a computer readable storage medium storing a computer program, the computer program containing at least one piece of code executable by a master control device to control the master control device to implement the steps of the circuit schematic automatic wiring method according to the above embodiments. Examples include:
step S100, mapping the laid-out circuit devices to a netlist plane to obtain a transverse channel and a longitudinal channel for routing;
step S200, obtaining two pins with the farthest signal connection level spans in a netlist plane, obtaining transverse wiring channels of the two pins by adopting a heuristic search algorithm, and converting signal connection into adjacent level signal connection;
and step S300, utilizing a linear search technology to obtain longitudinal wiring channels connected with signals of adjacent layers, and distributing specific wire tracks through a dynamic space perception technology.
Based on the same technical concept, the embodiments of the present application also provide a computer program, which is used to implement the above-mentioned method embodiments when the computer program is executed by the master control device.
The program may be stored in whole or in part on a storage medium that is packaged with the processor, or in part or in whole on a memory that is not packaged with the processor.
Based on the same technical concept, the embodiment of the application also provides a processor, which is used for realizing the embodiment of the method. The processor may be a chip.
In summary, the invention provides an automatic wiring method, device, equipment and storage medium for a circuit schematic diagram, which fully utilizes the hierarchical information of the layout of circuit devices, searches for a transverse wiring channel through an improved heuristic search algorithm, and reduces a large amount of search processes and peak memory consumption by considering the distance and the quantity of inflection points, thereby shortening the wiring time; by linearly searching the longitudinal wiring channels, the wiring types are considered when specific wire tracks are distributed, and the number of redundant intersections and inflection points is reduced; meanwhile, a solution is provided for insufficient wiring space and space redundancy through a dynamic space perception technology, so that the wiring result is more attractive.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
The foregoing examples illustrate only a few embodiments of the invention and are described in detail herein without thereby limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (9)
1. An automatic wiring method for a schematic circuit diagram, comprising the steps of:
s100, mapping the laid-out circuit devices to a netlist plane to obtain a transverse channel and a longitudinal channel for routing;
s200, acquiring two pins with the farthest signal connection level spans in the netlist plane, acquiring transverse wiring channels of the two pins by adopting a heuristic search algorithm, and converting signal connection into adjacent level signal connection;
s300, obtaining longitudinal wiring channels connected with the adjacent-level signals by utilizing a linear search technology, and distributing specific wire tracks by utilizing a dynamic space perception technology, wherein the method specifically comprises the following steps of:
s310, dividing the signal connection of the adjacent layers into different types, and searching longitudinal wiring channels according to the layers and the types;
s320, when the longitudinal wiring space is insufficient, recording the required number of the wire tracks by using a virtual longitudinal channel, and determining the moving distance of the circuit device according to the number of the wire tracks after the longitudinal wiring is finished;
s330, when the longitudinal wiring space is vacant, the occupied wire tracks in the longitudinal wiring channels are uniformly distributed.
2. The automatic layout method according to claim 1, wherein the step S100 specifically includes the steps of:
s110, mapping the laid-out circuit devices to a netlist plane in sequence, and recording the level information of the circuit devices;
s120, cutting the netlist plane according to the upper and lower boundaries of the circuit device to obtain a transverse channel of a wiring;
s130, cutting the netlist plane according to the left and right boundaries of the circuit device to obtain a longitudinal channel of the wiring.
3. The automatic routing method of circuit schematic diagram according to claim 1, wherein the obtaining two pins with the farthest signal connection level spans in the netlist plane adopts a heuristic search algorithm to obtain lateral routing channels of the two pins, and specifically comprises the following steps:
s210, traversing signal connection in the netlist plane to obtain a first pin and a second pin with the farthest hierarchical span in the signal connection;
s220, finding a transverse channel X where the first pin is located, and placing the rest transverse channels communicated with the transverse channel X into a priority queue;
s230, searching a transverse channel Y which is positioned on the same horizontal line with the transverse channel X and/or has the shortest longitudinal distance from the transverse channel where the second pin is positioned in the priority queue;
s240, placing the rest transverse channels communicated with the transverse channel Y in the priority queue, and repeating the step S230 until the transverse channel where the second pin is located is found;
s250, obtaining transverse wiring channels of the first pins and the second pins, and recording the wiring types of signal connection in the transverse wiring channels.
4. The schematic automatic routing method of claim 3, wherein the routing type of the signal connection in the lateral routing channel includes: upper U-shape, lower U-shape, direct connection shape and Z-shape.
5. The schematic automatic routing method of claim 4, wherein converting the signal connection into an adjacent level signal connection specifically comprises:
s260, traversing the transverse wiring channels, sorting the signal connections passing through the transverse wiring channels according to the wiring types, and distributing ordinate to different signal connections according to the sequence;
s270, creating virtual pins for signal connection according to the ordinate and the abscissa of the transverse wiring channel passing through different levels;
and S280, connecting the virtual pins with pins of front and back levels, and converting the signal connection of the cross-level into the signal connection of the adjacent level.
6. The schematic automatic routing method of claim 1, wherein the type of adjacent level signal connection includes: left U-shape, Z-shape and right U-shape.
7. An automatic circuit schematic wiring device, the device comprising:
the channel acquisition module is used for mapping the laid-out circuit devices to a netlist plane to obtain a transverse channel and a longitudinal channel for routing;
the transverse wiring module is used for acquiring two pins with the farthest signal connection level spans in the netlist plane, acquiring transverse wiring channels of the two pins by adopting a heuristic search algorithm, and converting signal connection into adjacent level signal connection;
the longitudinal wiring module is used for obtaining longitudinal wiring channels of the adjacent-level signal connection by utilizing a linear search technology, and distributing specific wire tracks through a dynamic space perception technology, and specifically comprises the following steps:
dividing the signal connections of adjacent layers into different types, and searching longitudinal wiring channels according to the layers and the types;
when the longitudinal wiring space is insufficient, recording the required number of the line tracks by using a virtual longitudinal channel, and determining the moving distance of the circuit device according to the number of the line tracks after the longitudinal wiring is finished;
when the longitudinal wiring space is free, the occupied wire tracks in the longitudinal wiring channels are uniformly distributed.
8. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor executes the steps of the computer program to implement the schematic circuit diagram automatic routing method of any of claims 1 to 6.
9. A computer-readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the schematic circuit diagram automatic wiring method according to any one of claims 1 to 6.
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