CN117452188B - Chip full-temperature zone testing mechanism, system and method - Google Patents
Chip full-temperature zone testing mechanism, system and method Download PDFInfo
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- CN117452188B CN117452188B CN202311754189.9A CN202311754189A CN117452188B CN 117452188 B CN117452188 B CN 117452188B CN 202311754189 A CN202311754189 A CN 202311754189A CN 117452188 B CN117452188 B CN 117452188B
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- 238000012360 testing method Methods 0.000 title claims abstract description 222
- 230000007246 mechanism Effects 0.000 title claims abstract description 41
- 238000000034 method Methods 0.000 title claims abstract description 21
- 238000009423 ventilation Methods 0.000 claims abstract description 61
- 239000000523 sample Substances 0.000 claims abstract description 52
- 239000000463 material Substances 0.000 claims abstract description 50
- 230000007704 transition Effects 0.000 claims description 43
- 238000003825 pressing Methods 0.000 claims description 26
- 230000004913 activation Effects 0.000 claims description 2
- 239000003570 air Substances 0.000 description 74
- 230000001276 controlling effect Effects 0.000 description 12
- 238000010586 diagram Methods 0.000 description 11
- 238000004590 computer program Methods 0.000 description 9
- 238000010998 test method Methods 0.000 description 7
- 230000004044 response Effects 0.000 description 5
- 239000012080 ambient air Substances 0.000 description 4
- 238000003860 storage Methods 0.000 description 4
- 238000001514 detection method Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000003190 augmentative effect Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
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- 238000012545 processing Methods 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
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- 238000000802 evaporation-induced self-assembly Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2872—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
- G01R31/2874—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature
- G01R31/2875—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature related to heating
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/04—Housings; Supporting members; Arrangements of terminals
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2872—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
- G01R31/2874—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature
- G01R31/2877—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation related to temperature related to cooling
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- General Engineering & Computer Science (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The invention is suitable for the technical field of chip testing, and provides a chip full-temperature zone testing mechanism, a system and a method, wherein the testing device comprises: the material placing frame is fixedly connected to the bottom of the ventilation part; the material placing frame is provided with a plurality of rows of clamping groove rows, each clamping groove in each row of clamping groove rows is communicated in sequence through a groove, the bottom of each clamping groove is provided with a probe hole for a test probe to pass through, and the clamping grooves at the two ends of each clamping groove row are also provided with ventilation grooves; the ventilation part comprises a first airflow channel and a second airflow channel, an air inlet of the first airflow channel and an air outlet of the second airflow channel are communicated with the external environment, and the air outlet of the first airflow channel and the air inlet of the second airflow channel are arranged on a first end face of the bottom of the ventilation part. According to the testing device provided by the invention, the air flow channel is arranged between the material placing frame and the first end face, and the air flow channel is used for communicating the chip to be tested with the external environment, so that the temperature exchange speed of the chip to be tested and the external environment is improved, and the full-temperature-area testing efficiency of the chip is improved.
Description
Technical Field
The invention belongs to the technical field of chip testing in a full temperature zone, and particularly relates to a chip full temperature zone testing mechanism, a system and a method.
Background
Before the chip enters the market, the electrical performance test of the full temperature area is required to be carried out so as to simulate the performance of the chip under different temperature conditions, and the test temperature range is generally-55 ℃ to 155 ℃.
In the prior art, in order to meet the requirements of customers on high-quality chips, the chips shipped from the factory need to be tested in a full-temperature area by 100%, so that the chips are longer in the outgoing test, the efficiency is low, and the production efficiency of the chips is seriously influenced. The reasons for the inefficiency of the test are mainly the following two points: 1) In the temperature adjustment link, a general temperature test box is adopted for the full-temperature zone test, and is influenced by the larger space of the cavity in the test box and the chip test tool, the chip to be tested in the cavity can reach the test temperature meeting the requirement only in a longer time, so that the test efficiency is influenced; 2) In the test link, after the test temperature reaches the preset test temperature in the test box and a prompt is sent, an operator firstly controls the test tool to enable the test probe to be in contact with the chip contact, then operates the test terminal to collect the performance parameters of the chip to be tested, after collection is completed, the temperature in the test box is required to be adjusted to the next preset test temperature, and the test efficiency is further restricted due to multiple manual operations involved in the test link.
Disclosure of Invention
In order to overcome the problems in the related art, the embodiment of the invention provides a chip full-temperature area testing mechanism, a system and a method.
The invention is realized by the following technical scheme:
in a first aspect, an embodiment of the present invention provides a chip full-temperature area testing mechanism, including: the material placing frame is fixedly connected to the bottom of the ventilation part; the material placing frame is provided with a plurality of rows of clamping groove rows, each clamping groove used for placing a chip to be tested in each row of clamping groove rows is sequentially communicated through a groove, probe holes used for the test probes to pass through are formed in the bottoms of the clamping grooves, the number of the probe holes is not less than that of the contacts of the chip to be tested, and the clamping grooves at the two ends of each clamping groove row are also provided with ventilation grooves; the ventilation part is provided with a first airflow channel and a second airflow channel which are communicated with the ventilation part, an air inlet of the first airflow channel and an air outlet of the second airflow channel are communicated with the external environment, and the air outlet of the first airflow channel and the air inlet of the second airflow channel are arranged on a first end face of the bottom of the ventilation part.
In one possible implementation manner of the first aspect, first positioning holes are formed in two sides of the material placing frame, the first positioning holes which are not on the same side are asymmetrically distributed, and locking clamping grooves are formed in the lower surface of the material placing frame; the second end face of the bottom of the ventilation part is provided with a first positioning pin matched with the first positioning hole and a locking knob in the quantity of locking clamping grooves, and when the first positioning pin is inserted into the first positioning hole, the locking knob is rotated to enter the locking clamping groove to fix the material placing frame with the ventilation part.
In a possible implementation manner of the first aspect, a boss corresponding to each clamping groove is arranged on the first end surface, and the boss and the clamping groove are matched to fix the position of the chip to be tested; the exhaust port of the first air flow channel and the air inlet of the second air flow channel are both positioned at the side of the clamping groove row.
In a possible implementation manner of the first aspect, the apparatus further includes: the transition plate, the probe seat and the device base are sequentially arranged from top to bottom; the transition plate is positioned below the material placing frame and is contacted with the second end surface, the probe seat is elastically connected with the transition plate, and the device base is fixedly connected with the probe seat and the chip temperature tester respectively; the transition plate comprises transition holes in one-to-one correspondence with the probe holes, the probe seat comprises test probes in one-to-one correspondence with the transition holes, and the test probes sequentially penetrate through the probe holes and the transition holes to be contacted with the chip contacts to be tested.
In a possible implementation manner of the first aspect, the material placing frame further includes a second positioning hole, the ventilation portion further includes a third positioning pin and a clamping portion, and the transition plate further includes a third positioning hole and a second positioning pin; the second positioning holes are arranged on two sides of the material placing frame and are asymmetrically distributed and matched with the second positioning pins; the third locating pin is positioned on the second end surface and matched with the third locating hole; the clamping parts are positioned at two sides of the ventilation part and are used for clamping and fixing the transition plate and the ventilation part.
Compared with the prior art, the embodiment of the invention has the beneficial effects that:
the invention provides a chip full-temperature zone testing mechanism which comprises a material placing frame and a ventilation part, wherein the material placing frame is fixedly connected to the bottom of the ventilation part. The material placing frame comprises a plurality of rows of clamping groove rows, each clamping groove used for placing a chip to be tested in each row of clamping groove row is sequentially communicated through a groove, the clamping grooves at two ends of each clamping groove row are further provided with ventilation grooves, a first air flow channel and a second air flow channel which are communicated with the ventilation part are arranged on the ventilation part, an air inlet of the first air flow channel and an air outlet of the second air flow channel are communicated with the external environment, an air outlet of the first air flow channel and an air inlet of the second air flow channel are arranged on a first end face of the bottom of the ventilation part, and the first end face is located above the material placing frame. External environment gas is led in from the first air flow channel, flows through each chip to be tested in sequence through the grooves, and is discharged from the second air flow channel, so that each chip to be tested in the clamping groove can reach the external environment temperature in a short time, the waiting time is shortened, and the full-temperature-area testing efficiency of the chip is improved. Furthermore, the ventilation groove provided by the invention enables the chips to be tested positioned at the two ends of the material positioning frame to better participate in air flow circulation, and solves the technical problem that the chips to be tested positioned at the edge position are slower in temperature rise or temperature reduction.
In a second aspect, an embodiment of the present invention provides a chip full-temperature area test system, including: the temperature testing machine comprises a plurality of cavities and a control terminal, and a pressing device, a temperature conduction acquisition device and the chip full-temperature area testing mechanism according to any one of the first aspect are fixedly arranged in each cavity; the test terminal is positioned outside the temperature tester and is respectively and electrically connected with the control terminal and the chip full-temperature area test mechanism, and is used for collecting and storing chip parameters of the chip to be tested and sending a collection completion signal to the control terminal; the plurality of cavities are used for providing corresponding preset test temperatures for the chip to be tested; the pressing device is fixedly connected with the ventilation part, and when the pressing device moves for a preset distance, the combination body of the material placing frame, the ventilation part and the transition plate is fixedly connected with each other for a preset distance, so that the contact point of the chip to be tested in the material placing frame is contacted with or separated from the test probe; the temperature conduction acquisition device comprises a gas conduction device and a telescopic guide pipe, wherein the gas conduction device, the telescopic guide pipe and an air inlet of the first air flow channel are sequentially communicated, and the gas conduction device is used for conveying gas in the cavity into the air inlet of the first air flow channel through the telescopic guide pipe; the chip full-temperature zone testing mechanism is used for placing the chip to be tested, a device base in the chip full-temperature zone testing mechanism is fixedly connected with the cavity, and a probe seat in the chip full-temperature zone testing mechanism is electrically connected with the testing terminal. The control terminal is positioned on the cabinet body of the temperature testing machine and is used for receiving a testing instruction, responding to the testing instruction, adjusting the temperature in the cavity to a preset testing temperature, controlling the starting and closing of the gas conduction device, controlling the pressing device to move a preset distance, sending a parameter acquisition signal to the testing terminal, and receiving an acquisition completion signal sent by the testing terminal.
In one possible implementation manner of the second aspect, the temperature conduction collection device further includes a temperature sensor, where the temperature sensor is fixedly connected with the cavity through a moving part in the cavity, and is configured to collect a temperature of gas flowing through the chip to be tested and send the temperature of the gas to the control terminal; the control terminal is also used for controlling the moving part to move according to a preset rule, moving the temperature sensor into the exhaust port of the second airflow channel, receiving the gas temperature, judging whether the gas temperature reaches a preset test temperature, and executing the steps of controlling the pressing device to move a preset distance, sending a parameter acquisition signal to the test terminal and receiving an acquisition completion signal sent by the test terminal if the gas temperature reaches the preset test temperature.
In a third aspect, a method for testing a full temperature area of a chip according to an embodiment of the present invention is applied to a control terminal in a chip temperature testing machine according to any one of the second aspect, and includes: receiving a test instruction; responding to the test instruction to adjust the temperature in the cavity to a preset test temperature, and controlling the starting of the gas conduction device; controlling the pressing device to move a preset distance, and sending a parameter acquisition signal to the test terminal; and receiving a collection completion signal sent by the test terminal.
In a possible implementation manner of the third aspect, after controlling the start-up of the gas conducting device, the method comprises: the control moving part moves according to a preset rule, so that the temperature sensor moves into the exhaust port of the second airflow channel; receiving the gas temperature sent by the temperature sensor, judging whether the gas temperature reaches a preset test temperature, if so, executing the steps of controlling the pressing device to move a preset distance, sending a parameter acquisition signal to the test terminal, and receiving an acquisition completion signal sent by the test terminal; after the step of receiving the acquisition completion signal sent by the test terminal is completed, the pressing device is controlled to move upwards by a preset distance, and the temperature in the cavity is regulated to the next preset test temperature until all preset test temperatures in all the cavity are completed.
In a possible implementation manner of the third aspect, before receiving the test instruction, the method further includes: fixing the chip to be tested in a chip full-temperature zone testing mechanism; fixing the chip full-temperature area testing mechanism in a cavity of a chip temperature testing machine; the gas conduction device, the telescopic guide pipe and the gas inlet of the first gas flow channel are sequentially communicated.
It will be appreciated that the advantages of the second and third aspects may be found in the relevant description of the first aspect and are not described in detail herein.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a chip full temperature zone test mechanism according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a material placing frame according to an embodiment of the present invention;
fig. 3 is a schematic structural view of a ventilation part according to an embodiment of the present invention;
fig. 4 is a schematic structural view of another view ventilation part according to an embodiment of the present invention;
FIG. 5 is a schematic illustration of the flow of external ambient gas provided by an embodiment of the present invention;
FIG. 6 is a schematic diagram of the structures of a transition plate, a probe seat, and a device seat according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of a full temperature area testing mechanism for chips according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of a system for testing a chip full temperature area according to an embodiment of the present invention;
FIG. 9 is a flow chart of a method for testing a chip full temperature area according to an embodiment of the present invention;
FIG. 10 is a flow chart of another method for testing a full temperature area of a chip according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of a control terminal according to an embodiment of the present invention.
In the figure: 100 material placing frames, 110 clamping groove rows, 111 clamping grooves, 112 ventilation grooves, 113 probe holes, 114 first positioning holes, 115 locking clamping grooves, 116 second positioning holes and 117 grooves;
200 ventilating parts, 210 first air flow channels, 211 air inlets of the first air flow channels, 212 air outlets of the first air flow channels, 220 second air flow channels, 221 air inlets of the second air flow channels, 222 air outlets of the second air flow channels, 230 first end surfaces, 231 bosses, 240 second end surfaces, 241 first positioning pins, 242 locking knobs, 243 third positioning pins and 250 clamping parts;
300 transition plates, 301 transition holes, 302 third positioning holes, 303 second positioning pins;
400 probe seats;
500 device base.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth such as the particular system architecture, techniques, etc., in order to provide a thorough understanding of the embodiments of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.
It should be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It should also be understood that the term "and/or" as used in the present specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
As used in the present description and the appended claims, the term "if" may be interpreted in context as "when …" or "upon" or "in response to a determination" or "in response to detection. Similarly, the phrase "if a determination" or "if a [ described condition or event ] is detected" may be interpreted in the context of meaning "upon determination" or "in response to determination" or "upon detection of a [ described condition or event ]" or "in response to detection of a [ described condition or event ]".
Furthermore, the terms "first," "second," "third," and the like in the description of the present specification and in the appended claims, are used for distinguishing between descriptions and not necessarily for indicating or implying a relative importance.
Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the invention. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.
In order to make the objects, technical solutions and advantages of the present invention more clear and clear, the present invention will be described in detail with reference to the accompanying drawings and examples. It should be understood that the following detailed description is merely illustrative of the invention, and is not intended to limit the invention.
Fig. 1 is a schematic structural diagram of a chip full-temperature area testing mechanism provided by an embodiment of the present invention, and with reference to fig. 1, the chip full-temperature area testing mechanism provided by the present invention is described.
In some embodiments, the chip full temperature zone test mechanism may include a material placing frame 100 and a ventilation portion 200, where the material placing frame 100 is fixedly connected to the bottom of the ventilation portion 200.
Fig. 2 is a schematic structural diagram of a material placing frame according to an embodiment of the present invention, referring to fig. 2, a material placing frame 100 is provided with a plurality of rows of card slots 110, each row of card slots 110 includes a plurality of card slots 111 for placing chips to be tested, a groove 117 is formed between adjacent card slots in each row of card slots 110, each card slot 111 in each row of card slots 110 is sequentially communicated through the groove 117, and the card slots 111 at two ends of the card slot rows 110 are further provided with ventilation slots 112.
Fig. 3 is a schematic structural diagram of a ventilation unit according to an embodiment of the present invention, and referring to fig. 3, a first airflow channel 210 and a second airflow channel 220 penetrating the ventilation unit are formed on the ventilation unit 200.
Fig. 4 is a schematic structural view of another view ventilation part according to an embodiment of the present invention, and fig. 5 is a schematic view of external ambient air flow according to an embodiment of the present invention. Referring to fig. 4 and 5 together, the air inlet 211 of the first air flow channel and the air outlet 222 of the second air flow channel are both communicated with the external environment, the air outlet 212 of the first air flow channel and the air inlet 221 of the second air flow channel are both disposed on the first end face 230 at the bottom of the ventilation part, and the first end face 230 is located above the material placing frame 100.
In some scenarios, when the external ambient air is introduced into the air inlet 211 of the first air flow channel, the air is introduced into the card slot row 110 through the air outlet 212 of the first air flow channel, flows through each chip to be tested (indicated by a virtual frame) sequentially through the grooves 117, replaces the air in the card slot row 110, and then the air in the card slot row 110 enters the air inlet 221 of the second air flow channel through the ventilation slot 112 and finally is discharged through the air outlet 222 of the second air flow channel, so that each chip to be tested in the card slot 111 can reach the external ambient temperature in a short time, and the heating or cooling time of the chip to be tested is shortened.
As is known, each chip to be tested has a plurality of pin contacts, ranging from a few to tens of contacts, each of which can be connected to an external circuit for outputting electrical signals such as current, voltage or frequency. In some embodiments, referring to fig. 2, the bottom of the card slot 111 is provided with probe holes 113 for the test probes to pass through, and it should be noted that the number of probe holes 113 in the card slot 111 may be not less than the number of contacts of the chip to be tested, which means that the material placing frame 100 may place chips to be tested in different types, and the versatility of the material placing frame 100 is increased.
In some embodiments, referring to fig. 2, the two sides of the material placing frame 100 are provided with the first positioning holes 114, and the first positioning holes 114 not on the same side are asymmetrically arranged; the lower surface of the material placing frame 100 is also provided with a locking clamping groove 115 for fixedly connecting with the ventilation part 200.
In some embodiments, referring to fig. 4, a first positioning pin 241 engaged with the first positioning hole 114 and a locking knob 242 corresponding to the locking groove 115 are provided on the second end surface 240 of the bottom of the ventilation part.
Illustratively, the second end 240 protrudes from the vent portion as compared to the first end 230.
Illustratively, the first positioning holes 114 distributed on two sides of the material placing frame 100 are asymmetrically arranged, so that the corresponding first positioning pins 241 are also distributed on two sides of the second end surface 240 and are also asymmetrically arranged. This arrangement is to prevent the occurrence of erroneous assembly, and the first positioning pin 241 can be inserted into the first positioning hole 114 only when the placement frame 100 and the ventilation part 200 are properly assembled.
In a real scenario, after the first positioning pins 241 on both sides are respectively inserted into the corresponding first positioning holes 114, the locking knob 242 is turned to enter the locking slot 115, so as to fix the material placing frame 100 and the ventilation portion 200, and the fixed combination of the material placing frame 100 and the ventilation portion 200 is shown in fig. 1.
In some embodiments, referring to fig. 4, a boss 231 corresponding to each card slot 111 is provided on the first end surface 230, and the cooperation of the boss 231 and the card slot 111 is used to fix the position of the chip to be tested.
For example, in order to ensure that each chip to be tested is in contact with the external ambient air when the external ambient air flows through the first air flow channel 210 and the second air flow channel 220, the air outlet 212 of the first air flow channel and the air inlet 221 of the second air flow channel are located at the sides of the card slot row 110.
It should be noted that the number of the exhaust ports 212 of the first airflow channel and the number of the air inlets 221 of the second airflow channel are not necessarily the same, and may be adaptively adjusted according to actual requirements.
As an example, when the number of the exhaust ports 212 of the first air flow channel is the same as the number of the air inlets 221 of the second air flow channel, the diameter of the exhaust ports 212 of the first air flow channel may be larger than the diameter of the air inlets 221 of the second air flow channel, so that the air flow flowing through the chip to be tested is larger, and the temperature exchange speed between the chip to be tested and the external environment air is increased.
In some embodiments, the chip full temperature zone test mechanism may further include a transition plate 300, a probe mount 400, and a device mount 500. Fig. 6 shows a schematic structural diagram of a transition plate, a probe seat, and a device base according to an embodiment of the present invention.
Referring to fig. 6, the transition plate 300, the probe mount 400, and the device base 500 are sequentially disposed from top to bottom. The transition plate 300 is positioned below the material placing frame 100 and is in contact with the second end face 240; the probe holder 400 is elastically connected with the transition plate 300, i.e., the transition plate 300 can move up and down relative to the probe holder 400; the device base 500 is fixedly connected with the probe base 400 and the chip temperature tester, respectively.
Further, the transition plate 300 includes transition holes 301 in one-to-one correspondence with the probe holes 113, and the probe holder 400 includes test probes in one-to-one correspondence with the transition holes 301. The test probes sequentially pass through the probe holes 113 and the transition holes 301 to contact with the chip contacts to be tested.
Referring to fig. 2, 4 and 6, in some embodiments, the placement frame 100 further includes a second positioning hole 116, the ventilation portion 200 further includes a third positioning pin 243 and a clamping portion 250, and the transition plate 300 further includes a third positioning hole 302 and a second positioning pin 303.
Further, the second positioning holes 116 are arranged at two sides of the material placing frame 100 and are asymmetrically arranged to be matched with the second positioning pins 303; the third positioning pin 243 is located on the second end surface 240 and is matched with the third positioning hole 302; the clamping portions 250 are located at two sides of the ventilation portion, and are used for clamping and fixing the transition plate 300 and the ventilation portion 200.
As a further explanation, in order to ensure that the transition holes 301 on the transition plate 300 correspond to the probe holes 113 on the material placing frame 100 one by one, and prevent the occurrence of false assembly, the present invention provides the second positioning holes 116 and the second positioning pins 303, and only when the material placing frame 100 and the transition plate 300 are assembled in a correct direction, the second positioning pins 303 can be inserted into the second positioning holes 116; similarly, after the material placing frame 100 and the ventilation part 200 are fixed to form a combined body, in order to prevent misoperation when the combined body and the transition plate 300 are assembled, the third positioning hole 302 and the third positioning pin 243 are provided, and only when the combined body and the transition plate 300 are assembled in a correct direction, the third positioning pin 243 can be inserted into the third positioning hole 302.
In some embodiments, the chip full temperature zone test mechanism assembled by the placement frame 100 (located within the ventilation portion 200, not shown), the ventilation portion 200, the transition plate 300, the probe mount 400, and the device mount 500 is shown with reference to fig. 7.
The above is a detailed description of the chip full-temperature area testing mechanism, and the testing device provided by the invention not only sets a plurality of technical schemes for preventing false assembly, but also sets an air flow channel between the material placing frame 100 and the first end face 230, so as to improve the temperature exchange speed between the chip to be tested and the external environment, and improve the chip full-temperature area testing efficiency, thereby improving the production efficiency of the chip.
The invention also provides a chip full-temperature zone test system, and fig. 8 is a schematic structural diagram of the chip full-temperature zone test system. Referring to fig. 8, a chip full temperature zone test system is described in detail as follows:
in some embodiments, a chip full temperature zone test system includes a test terminal and a temperature tester. The temperature testing machine comprises a plurality of cavities and a control terminal, and a pressing device, a temperature conduction acquisition device and the chip full-temperature area testing mechanism provided above are fixedly arranged in each cavity.
The test terminal is positioned outside the temperature tester, is electrically connected with the control terminal and the chip full-temperature area test mechanism respectively, and is used for collecting and storing chip parameters of the chip to be tested and sending a collection completion signal to the control terminal.
Illustratively, when the temperature of the temperature testing machine is adjusted, the temperature testing machine is generally divided into a temperature changing stage and a constant temperature stage, wherein the temperature changing stage refers to a stage of raising the temperature in the cavity to a preset testing temperature, and the constant temperature stage refers to a stage of maintaining the preset testing temperature for a period of time to enable the ambient temperature around the chip to be tested to reach the preset testing temperature. The conventional temperature tester usually has only one cavity, and can only provide a preset test temperature for a certain type of chip to be tested at the same time.
The multiple cavities are used for providing corresponding preset test temperatures for the chip to be tested.
Further explaining, providing the chip to be tested with the corresponding preset test temperature may include: each of the plurality of cavities can respectively provide the same preset test temperature for chips to be tested of different types, and can also provide different preset test temperatures for chips to be tested of the same type.
Illustratively, the pressing device is fixedly connected with the ventilation part, and when the pressing device moves by a preset distance, the combination body of the material placing frame, the ventilation part and the transition plate is fixedly connected with the pressing device by a preset distance, so that the chip contact to be tested in the material placing frame is contacted with or separated from the test probe.
The temperature conduction collection device comprises a gas conduction device and a telescopic guide pipe, wherein the gas conduction device, the telescopic guide pipe and an air inlet of the first air flow channel are sequentially communicated, and the gas conduction device is used for conveying gas in the cavity into the air inlet of the first air flow channel through the telescopic guide pipe.
Further explained, the gas conduction means for causing the gas to flow along a predetermined path, such as a fan, a blower, etc.; the telescopic guide pipe is a telescopic and deformable pipeline for guiding the gas flow, and the invention is not limited further.
The device base in the chip full-temperature zone testing mechanism is fixedly connected with the cavity, and the probe seat in the chip full-temperature zone testing mechanism is electrically connected with the testing terminal.
The control terminal is positioned on the cabinet body of the temperature testing machine, is used for receiving a testing instruction, responds to the testing instruction to adjust the temperature in the cavity to a preset testing temperature, controls the starting and closing of the gas conduction device, controls the pressing device to move a preset distance, and receives a collection completion signal sent by the testing terminal.
In some embodiments, the temperature conduction collection device further comprises a temperature sensor, wherein the temperature sensor is fixedly connected with the cavity through a moving part in the cavity and is used for collecting the temperature of gas flowing through the chip to be tested and sending the temperature of the gas to the control terminal.
Correspondingly, the control terminal is further used for controlling the moving part to move according to a preset rule, moving the temperature sensor into the exhaust port of the second airflow channel, receiving the gas temperature, judging whether the gas temperature reaches a preset test temperature, and if the gas temperature reaches the preset test temperature, executing the steps of controlling the pressing device to move a preset distance, sending a parameter acquisition signal to the test terminal and receiving an acquisition completion signal sent by the test terminal.
As described above, the chip full-temperature zone test system provided by the invention may include a plurality of cavities, a test terminal, a control terminal, a temperature conduction acquisition device, and a chip full-temperature zone test mechanism. The multiple cavities can provide one or more preset test temperatures in a targeted manner, so that the full-temperature-area test efficiency of the chip to be tested is improved; the test terminal is matched with the control terminal, so that automation of collecting and storing chip parameters of the chip to be tested is realized, and compared with the traditional manual test operation, the test efficiency is higher while the manual labor is reduced; the temperature conduction acquisition device is matched with the chip full-temperature zone testing mechanism, so that the duration of the constant temperature stage of the temperature testing machine is reduced, the chip to be tested reaches the preset testing temperature in a shorter time, and the testing time of the high temperature and the low temperature of the chip is further shortened.
The invention also provides a chip full-temperature zone test method, and fig. 9 is a flow chart of the chip full-temperature zone test method provided by the embodiment of the invention. Referring to fig. 9, the control terminal of the method applied to the chip full temperature zone test system is described in detail as follows:
in step S101, a test instruction is received.
In some embodiments, a test instruction is input at the control terminal, where the test instruction may include instructions for setting, for the plurality of cavities, a corresponding preset test temperature, a number of test temperature points included in the preset test temperature, a temperature change stage duration and a constant temperature stage duration of the temperature tester, and the like.
For example, assuming that the interval of the preset test temperature is [25 ℃,100 ℃), the total temperature area test requirement of the chip to be tested is that the chip parameters are recorded once every 5 ℃ rise, and the number of the test temperature points is 16.
For another example, the interval of the preset test temperature is [25 ℃,100 ℃) and the number of the test temperature points is 16, the temperature change period time can be set to be 2 minutes, namely, the temperature in the cavity is increased by 5 ℃ for 2 minutes, the constant temperature period time is set to be 20 seconds, namely, the temperature is kept for 20 seconds, the constant temperature period time comprises the time that the ambient temperature of the chip to be tested reaches the preset test temperature, and the test device acquires and records the chip parameters of the chip to be tested.
In step S102, the temperature in the chamber is adjusted to a preset test temperature in response to the test command, and the activation of the gas conduction device is controlled.
In some embodiments, the control terminal responds to the test instruction, adjusts the temperature in the cavity to a preset test temperature, and simultaneously controls the gas conduction device to start, so that the ambient temperature around the chip to be tested is replaced with the temperature in the cavity in real time.
In step S103, the pressing device is controlled to move a preset distance, and a parameter acquisition signal is sent to the test terminal.
In some embodiments, when the temperature in the cavity reaches the preset test temperature, the control terminal controls the pressing device to move downwards by a preset distance (generally 1-2 mm), and then sends a parameter acquisition signal to the test terminal, so that the test terminal acquires and stores the chip parameters of the chip to be tested.
In step S104, a collection completion signal sent by the test terminal is received.
In some embodiments, the control terminal receives a collection completion signal sent by the test terminal, which indicates that the chip parameter test of the preset test temperature is completed. Further, the temperature in the cavity is controlled to a next preset test temperature.
Referring to fig. 10, in some embodiments, based on the embodiment shown in fig. 9, the above-mentioned chip full temperature area test method may further include steps S105 to S107 after the control gas conduction device in step 102 is started, which is specifically as follows:
in step S105, the movement member is controlled to move according to a preset rule so that the temperature sensor moves into the exhaust port of the second air flow passage.
In step S106, the gas temperature sent by the temperature sensor is received, and it is determined whether the gas temperature reaches a preset test temperature.
If the gas temperature reaches the preset test temperature, step S103 and step S104 are performed.
In step S107, the pressing device is controlled to move upward by a preset distance, and the temperature in the cavity is adjusted to the next preset test temperature until all the preset test temperatures in the cavity are completed.
In some embodiments, based on the embodiment shown in fig. 10, before the step S101 of receiving the test instruction, the chip full temperature area test method may further include: fixing the chip to be tested in a chip full-temperature zone testing mechanism; fixing the chip full-temperature area testing mechanism in a cavity of a chip temperature testing machine; the gas conduction device, the telescopic guide pipe and the gas inlet of the first gas flow channel are sequentially communicated.
In the chip full-temperature area test method, the control terminal automatically executes the steps of adjusting the temperature in the cavity to the preset test temperature, controlling the starting of the gas conduction device, controlling the pressing device to move the preset distance, sending the parameter acquisition signal to the test terminal, receiving the acquisition completion signal sent by the test terminal and the like, so that the complex manual operation is replaced, the chip full-temperature area test time is shortened, the test efficiency is improved, and the chip production capacity is improved.
It should be understood that the sequence number of each step in the foregoing embodiment does not mean that the execution sequence of each process should be determined by the function and the internal logic, and should not limit the implementation process of the embodiment of the present invention.
The embodiment of the present invention further provides a control terminal, referring to fig. 11, the control terminal 800 may include: at least one processor 810, a memory 820, and a computer program 821 executable on the at least one processor 810 stored in the memory 820, wherein the processor 810 implements the steps of any of the respective method embodiments described above, such as steps S101 to S104 in the embodiment shown in fig. 9 or steps S101 to S107 in the embodiment shown in fig. 10, when the computer program 821 is executed.
By way of example, the computer program 821 may be partitioned into one or more modules/units that are stored in the memory 820 and executed by the processor 810 to accomplish the present invention. One or more of the modules/units may be a series of computer program segments capable of performing specific functions for describing the execution of the computer program in the control terminal 800.
It will be appreciated by those skilled in the art that fig. 11 is merely an example of a control terminal and is not limiting of the control terminal, and may include more or fewer components than shown, or may combine some components, or different components, such as input-output devices, network access devices, buses, etc.
The processor 810 may be a central processing unit (Central Processing Unit, CPU), but may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), off-the-shelf programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory 820 may be an internal storage unit of the control terminal 800, or may be an external storage device of the control terminal 800, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital Card (SD), a Flash memory Card (Flash Card), or the like. The memory 820 is used to store a computer program 821 and other programs and data required to control the terminal 800. The memory 820 may also be used to temporarily store data that has been output or is to be output.
The bus may be an industry standard architecture (Industry Standard Architecture, ISA) bus, an external device interconnect (Peripheral Component, PCI) bus, or an extended industry standard architecture (Extended Industry Standard Architecture, EISA) bus, among others. The buses may be divided into address buses, data buses, control buses, etc. For ease of illustration, the buses in the drawings of the present invention are not limited to only one bus or to one type of bus.
The chip full-temperature area test method provided by the embodiment of the invention can be applied to terminal equipment such as a computer, wearable equipment, vehicle-mounted equipment, a tablet personal computer, a notebook computer, a netbook, a personal digital assistant (personal digital assistant, PDA), augmented reality (augmented reality, AR)/Virtual Reality (VR) equipment, a mobile phone and the like, and the embodiment of the invention does not limit the specific type of a control terminal.
The embodiment of the invention also provides a computer readable storage medium, wherein the computer readable storage medium stores a computer program, and the computer program realizes the steps in each embodiment of the chip full-temperature region testing method when being executed by a processor.
Embodiments of the present invention provide a computer program product that, when executed on a mobile terminal, enables the mobile terminal to implement the steps in the embodiments of the chip full-temperature zone test method described above.
The above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention, and are intended to be included in the scope of the present invention.
Claims (8)
1. A full temperature zone testing mechanism for a chip, comprising: the material placing frame is fixedly connected to the bottom of the ventilation part;
the material placing frame is provided with a plurality of rows of clamping groove rows, each clamping groove in each row of clamping groove rows for placing chips to be tested is sequentially communicated through a groove, the bottom of each clamping groove is provided with probe holes for test probes to pass through, the number of the probe holes is not less than the number of contacts of the chips to be tested, and the clamping grooves at the two ends of each clamping groove row are also provided with ventilation grooves; the two sides of the material placing frame are respectively provided with a first positioning hole, the first positioning holes which are not on the same side are asymmetrically distributed, and the lower surface of the material placing frame is provided with a locking clamping groove;
the ventilation part is provided with a first airflow channel and a second airflow channel which are communicated with the ventilation part, an air inlet of the first airflow channel and an air outlet of the second airflow channel are communicated with the external environment, and the air outlet of the first airflow channel and the air inlet of the second airflow channel are arranged on a first end face of the bottom of the ventilation part; the second end face of the bottom of the ventilation part is provided with a first positioning pin matched with the first positioning hole and locking knobs in the number of the locking clamping grooves, when the first positioning pin is inserted into the first positioning hole, the locking knobs are rotated to enter the locking clamping grooves, the material placing frame is fixed with the ventilation part, and the first end face protrudes out of the ventilation part compared with the first end face;
the chip full temperature zone test mechanism further comprises: the probe comprises a transition plate, a probe seat and a device base, wherein the transition plate, the probe seat and the device base are sequentially arranged from top to bottom;
the transition plate is positioned below the material placing frame and is contacted with the second end face, the probe seat is elastically connected with the transition plate, and the device base is fixedly connected with the probe seat and the chip temperature tester respectively;
the transition plate comprises transition holes in one-to-one correspondence with the probe holes, the probe seat comprises test probes in one-to-one correspondence with the transition holes, and the test probes sequentially penetrate through the probe holes and the transition holes to be contacted with the chip contacts to be tested.
2. The chip total temperature zone testing mechanism according to claim 1, wherein a boss corresponding to each clamping groove is arranged on the first end face, and the boss and the clamping grooves are matched to fix the position of a chip to be tested;
the exhaust port of the first air flow channel and the air inlet of the second air flow channel are both positioned at the side of the clamping groove row.
3. The chip total temperature zone test mechanism according to claim 1, wherein the material placing frame further comprises a second positioning hole, the ventilation part further comprises a third positioning pin and a clamping part, and the transition plate further comprises a third positioning hole and a second positioning pin;
the second positioning holes are arranged on two sides of the material placing frame and are asymmetrically distributed and matched with the second positioning pins;
the third locating pin is positioned on the second end face and matched with the third locating hole;
the clamping parts are positioned at two sides of the ventilation part and are used for clamping and fixing the transition plate and the ventilation part.
4. A chip full-temperature zone test system, which is characterized by comprising a test terminal and a temperature tester, wherein the temperature tester comprises a plurality of cavities and a control terminal, and a pressing device, a temperature conduction acquisition device and the chip full-temperature zone test mechanism as claimed in any one of claims 1 to 3 are fixedly arranged in each cavity;
the test terminal is positioned outside the temperature tester, is respectively and electrically connected with the control terminal and the chip full-temperature area test mechanism, and is used for collecting and storing chip parameters of the chip to be tested and sending a collection completion signal to the control terminal;
the plurality of cavities are used for providing corresponding preset test temperatures for the chip to be tested;
the pressing device is fixedly connected with the ventilation part, and when the pressing device moves for a preset distance, the combination body of the material placing frame, the ventilation part and the transition plate, which are fixedly connected, moves for a preset distance, so that the chip contact to be tested in the material placing frame is contacted with or separated from the test probe;
the temperature conduction acquisition device comprises a gas conduction device and a telescopic guide pipe, wherein the gas conduction device, the telescopic guide pipe and an air inlet of the first air flow channel are sequentially communicated, and the gas conduction device is used for conveying gas in the cavity into the air inlet of the first air flow channel through the telescopic guide pipe;
the chip full-temperature zone testing mechanism is used for placing the chip to be tested, a device base in the chip full-temperature zone testing mechanism is fixedly connected with the cavity, and a probe seat in the chip full-temperature zone testing mechanism is electrically connected with the testing terminal;
the control terminal is located on the cabinet body of the temperature testing machine and is used for receiving a testing instruction, responding to the testing instruction to adjust the temperature in the cavity to the preset testing temperature, controlling the gas conduction device to start and close, controlling the pressing device to move the preset distance, sending a parameter acquisition signal to the testing terminal, and receiving the acquisition completion signal sent by the testing terminal.
5. The chip total temperature zone test system according to claim 4, wherein the temperature conduction acquisition device further comprises a temperature sensor, wherein the temperature sensor is fixedly connected with the cavity through a moving part in the cavity, and is used for acquiring the temperature of gas flowing through a chip to be tested and sending the temperature of gas to the control terminal;
the control terminal is further configured to control the moving part to move according to a preset rule, move the temperature sensor into the exhaust port of the second airflow channel, receive the gas temperature, determine whether the gas temperature reaches the preset test temperature, and if the gas temperature reaches the preset test temperature, execute the step of controlling the pressing device to move the preset distance, the step of sending a parameter acquisition signal to the test terminal, and the step of receiving the acquisition completion signal sent by the test terminal.
6. A method for testing a chip full temperature region, which is applied to the control terminal in the chip full temperature region test system according to any one of claims 4 to 5, and comprises the following steps:
receiving a test instruction;
responding to the test instruction to adjust the temperature in the cavity to a preset test temperature, and controlling the starting of the gas conduction device;
controlling the pressing device to move a preset distance, and sending a parameter acquisition signal to the test terminal;
and receiving a collection completion signal sent by the test terminal.
7. The method of claim 6, wherein after said controlling the activation of the gas conduction device, the method comprises:
the control moving part moves according to a preset rule, so that the temperature sensor moves into the exhaust port of the second airflow channel;
receiving the gas temperature sent by the temperature sensor, judging whether the gas temperature reaches the preset test temperature, if so, executing the step of controlling the pressing device to move a preset distance, the step of sending a parameter acquisition signal to a test terminal, and the step of receiving an acquisition completion signal sent by the test terminal;
after the step of receiving the acquisition completion signal sent by the test terminal is completed, controlling the pressing device to move upwards by the preset distance, and adjusting the temperature in the cavity to the next preset test temperature until all preset test temperatures in all the cavity are completed.
8. The method of claim 6, wherein prior to said receiving test instructions, said method further comprises:
fixing a chip to be tested in the chip full-temperature zone testing mechanism;
fixing the chip full-temperature zone testing mechanism in a cavity of the chip temperature testing machine;
the gas conduction device, the telescopic guide pipe and the gas inlet of the first gas flow channel are sequentially communicated.
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