CN117312005A - Processing method for solving communication data transmission conflict in SoC - Google Patents

Abstract

The invention discloses a processing method for solving the conflict of data sent by a communication interface in SoC (SystemonChip), and relates to the technical field of embedded development communication. The method comprises the following steps: the message sending device stores the message to be sent into a data buffer; the message receiving device checks the communication interface state and the data storage condition of the data buffer according to the abnormal periodicity of the timer, makes correct judgment, reads the sent message from the data buffer after meeting the receiving condition, and calls the interface sending module to send the message after successfully reading the message. The method can effectively solve the problem of conflict that a plurality of modules in the SoC send data by using the same communication interface, improves the service efficiency of the interface and the performance of the SoC, is particularly suitable for the embedded environment with insufficient hardware resources of the SoC and certain requirements on the system performance, and has the characteristics of high reliability and strong instantaneity.

Description

Processing method for solving communication data transmission conflict in SoC

Technical Field

The invention relates to the technical field of embedded system development communication, in particular to a technology for processing interface communication data transmission conflict in an SoC.

Background

As application scenarios in embedded systems become more and more extensive, communication between various modules in the SoC becomes increasingly complex. In some cases, a plurality of modules simultaneously request an interface resource to transmit data, and the data transmission interface is easy to generate resource conflict due to short-time load increase, and often some high-performance modules are in a blocking state because data cannot be processed in real time, so that the operation efficiency of the whole system is reduced, and the stable operation of the system is influenced.

For the data transmission interface, the transmission content and the transmission data format are not required to be concerned, and only the data is required to be transmitted to the outside of the SoC;

currently, a common approach to solve this problem is to deploy a multitasking real-time system (RTOS) into an SoC, but the RTOS is not deployed sufficiently in a chip and environment where hardware resources are relatively scarce, and therefore, a method capable of efficiently coordinating access requests among multiple modules to solve the problem of data collision sent by a communication interface is needed for a design that is independent of the RTOS and requires less hardware resources.

Disclosure of Invention

The invention provides a processing method for solving communication data transmission conflict in an SoC, in particular to a method for realizing that a plurality of modules in an embedded system use the same communication interface to transmit data.

The method of the invention is as follows:

the message sending device writes the message to be sent into the data buffer;

the message receiving device reads the message to be received from the data buffer;

the data buffer is a message queue model with a point-to-point mode;

the message sending device is started by a module for sending data in the SoC, and is responsible for writing the data to be sent into a data buffer;

the message receiving device can inquire the interface state, read the message in the data buffer, and send out the data by using the interface sending module after the message is successfully read.

The data buffer is a first-in first-out queue structure, is a memory space opened by the software program in the RAM, and is used for storing the information sent by the information sending device; the message receiving device may read the message from the data buffer.

The depth value of the data buffer and the storage size of a single message are preset in advance according to the SoC system, and the depth value of the data buffer determines the quantity of the messages which can be accommodated in the data buffer; each message is stored in a space with a fixed size, wherein the unit is bytes, when the depth of a data buffer is set to 1 in the SoC, the maximum size of a single message is 256 bytes, the data buffer space is 1 x 256 bytes, when the depth of the data buffer is set to 4 in the SoC, the maximum size of the single message is 258 bytes, and the data buffer space is 4 x 258 bytes;

the data buffer can support a plurality of message sending devices to send messages; supporting a data reception message read message;

when the data buffer is read and written, returning to the buffer state: success and failure;

the success can be that the message sending device finishes writing the message, or that the message receiving device finishes reading the message; the meaning of failure includes two types: empty and full; the message sending device returns full after storing the message failure; the message receiving device fails to read the message and returns to null.

After a message is successfully sent to the buffer, the number of the messages in the buffer is increased by one, the failure occurs, and the number of the messages is unchanged;

after a message is successfully received from the buffer, subtracting one from the number of messages in the buffer, failing, and keeping the number of messages unchanged;

the number of messages in the buffer indicates the number of effective messages stored in the current buffer, the minimum is zero, and the maximum is the depth of the buffer.

The effective message is a message which is not read by the message receiving device after the message sending device writes the message;

the data buffer only supports access by the message sending device and the message receiving device, and does not allow access by other devices or modules.

The data buffer only supports single access, the buffer is locked during the access, namely, any one of the message receiving device and the message sending device can lock during the process of reading and writing the buffer, and only one device can operate the buffer during the accessed period, so that the data buffer is prevented from being abnormal.

When the buffer memory stores the message quantity and reaches the depth value, the data buffer memory returns to the space full state when the message sending device sends the message, at this time, the message sending device should actively release the CPU and start the message receiving device, after the message receiving device finishes the operation, the CPU is released again, the message sending device sends the operation, and the process is continued until the message sending device sends the message successfully;

because the buffer depth value and the size of a single message can be configured in advance according to the SoC system operation environment, the situation that the buffer message reaches a threshold value can be avoided in an actual scene;

when the message sending device sends the data with the length larger than the maximum value of a single message of the data buffer, the data needs to be split into a plurality of messages to be stored in the data buffer; for example, when a single message maximum value is set to 258 bytes in the SoC, and when the message transmission device transmits data to 260 bytes, the data is split into 258 bytes and 2 bytes messages, which are sequentially stored in the data buffer, respectively.

When no effective information exists in the data buffer, the information receiving device reads and returns to the empty state, at the moment, the information receiving device actively releases CPU resources, and the number of the buffered information is unchanged.

The message receiving device is a module combining soft and hard, can read the message from the data buffer, and can transmit an interface starting signal event to the transmitting interface after the message is successfully received, so as to start the message transmitting flow.

The message receiving device comprises a hardware timer and an interface checker;

the hardware timer is set as a cycle counter, a preset value can be set in advance according to the SoC running environment, when the preset value is 1 millisecond (ms), the hardware timer generates an abnormal signal every 1 millisecond (ms), the preset value in the SoC is set as 5 milliseconds (ms) at present, and the hardware timer generates the abnormal signal every 5 milliseconds (ms);

the interface checker can reflect the real-time state of the interface, can read the information in the data buffer, and transmit signals to the transmitting interface, and starts the interface transmitting function.

When the message receiving device works, firstly, the hardware timer generates an abnormal signal, then the interface checker is started to acquire the state of the communication interface, and after the receiving condition is met, the message receiving device moves the message out of the data buffer.

Satisfying the reception condition requires that the following two points are satisfied simultaneously:

first point: the communication interface is in an idle state or the communication interface meets the condition of sending data; wherein idle means that the communication interface is not in a transmit mode nor in a receive mode; the communication interface satisfying the data transmission condition indicates that the communication interface is already in a state of waiting for transmitting data;

second point: the message receiving device receives the message successfully through the data buffer;

the interface checker can reflect the working state of the interface in real time, and is realized by hardware, and software can inquire the running state of the interface through the function;

when the checker detects that the interface is idle, the checker reads the information from the data buffer, and after the information is successfully read, the interface sending module is used for sending the information out of the SoC;

and when the interface is detected to be non-idle or does not meet the transmission condition, releasing CPU resources and waiting for the next arrival of the abnormal timer signal.

The message sending device may be one or more functions in the SoC, may be any other hardware module or software module or communication interface than the communication interface connected to the message receiving device;

the message transmitting device comprises a hardware arbiter and a transmission result detector;

the hardware arbiter is used for configuring the priority of the management message sending device;

and a transmission result detector for detecting whether the message transmission apparatus correctly transmits the message to the data buffer.

The configuration of the hardware arbiter is related to the actual SoC running environment, the configuration result of the arbiter is stored in the flash of the SoC, and the memory value of the SoC is loaded to the hardware register after the SoC is powered on and started;

the arbiter configuration value determines the priority of the message sending device, the sending module with high priority is given priority to send the message to the data buffer, and under the same priority, the real-time processing is carried out according to the PC value when the current CPU runs, namely, the sending module currently running sends the message to the data buffer preferentially.

The message sending result detector is realized by software and can detect the sending result;

after the message is successfully sent, releasing the CPU and executing subsequent operations;

and when the message transmission fails, returning to the full state of the data buffer, releasing the CPU, and starting the message receiving device.

Drawings

Fig. 1 is a processing method for resolving communication data transmission conflict in SoC

FIG. 2 is a data buffer storage model

FIG. 3 is a read-write flow during the period when the data buffer is accessed

FIG. 4 is a write data buffer flow

FIG. 5 is a read data buffer flow

Fig. 6 is a flow of message receiving apparatus processing

Fig. 7 is a flow of message sending apparatus processing

Detailed Description

During the operation of the SoC, if a plurality of modules request the same interface to send a message to the outside of the SoC, the data sending process on the current interface becomes the bottleneck of the whole SoC, especially when the main frequency of the CPU is high and the communication rate of the interface is low, the performance of the whole system is easily affected;

the following uses of the technical scheme are described in further detail with reference to the accompanying drawings:

fig. 1 is a basic block diagram of a method and an apparatus for processing a communication data transmission conflict in an SoC, which generally describes a method and a process for resolving the data transmission conflict:

s101, a message sending device comprises a hardware arbiter and a result detector;

before starting, the message sending device configures a preset value into an arbiter; at the same time, the message sending device may receive a plurality of write requests from the SoC, and at this time, the message sending device queries the arbiter first, and writes the messages into the data buffer in turn according to the priority of the request event until all write request events are executed;

after the message sending device writes the data buffer each time, the result detector checks the writing state, the writing is successful, and the program continues to process the following logic; the result detector starts the message receiving device S103 to send the message in the data buffer preferentially when the writing fails, and in this case, the preset value of the data buffer can be adjusted in the product debugging stage to balance all modules of the whole system;

s102, a data buffer is a point-to-point message queue model, and is established by using a preset value after the SoC is electrified; after the creation is successful, the message sending device and the message receiving device can be provided for use;

the data buffer can be reasonably configured according to a preset value, the current SoC configuration buffer depth is 4, and the size of each storage message is 258 bytes;

s103, the message receiving device comprises a hardware timer and an interface checker, wherein the hardware timer periodically generates abnormal signals according to preset values, such as 5 milliseconds (ms), and after each generation of the abnormal signals, the message receiving device checks the communication interface state and the number of effective messages in a data buffer, and after the receiving conditions are met, the message receiving device starts message receiving and sends the messages out of the SoC by using an interface sending module;

fig. 2 illustrates the initial structure of the data buffer after the creation in the memory, the data buffer is composed of two parts: the physical addresses of the buffer structure area and the message storage area can be discontinuous, but overlap is not allowed; the buffer is actually a buffer container of a circular queue structure, and the process of accessing the buffer can determine the message position in the message storage area by changing the variable value and the pointer value in the buffer structure; after the data buffer is created, the initial structure is described as follows:

s201, pointing to the starting address of the message storage area S208, namely the first address of the physical space of the message storage area;

s202, pointing to the end address of the message storage area S211, namely the end address of the physical space of the message storage area;

s203, pointing to the idle address of the next message to be written, and pointing to the starting address of S208 after the buffer is successfully created;

s204, pointing to the next message head address to be read out, and pointing to the starting address of S211 after the buffer is successfully created;

s205, the number of messages in a data buffer, and after the buffer is successfully created, the number of messages is 0;

s206, the depth of the data buffer can be given according to the actual running scene of the SoC when the buffer is created, and the current depth value is set to be 4;

s207, the size of each message of the data buffer is unit Byte, and the current setting value is 258Byte according to the actual operation scene of the SoC;

figure 3 illustrates a read-write request procedure during which a data buffer is accessed,

at S301, a data buffer is created, where a message storage area in the data buffer is empty, and a variable uxMessagesWaiting value is equal to 0;

in S302, the message sending device writes data 0x10 with the length of 1 byte into the data buffer, after success, there is a message in the message storage area in the data buffer, and the variable uxMessagesWaiting value is equal to 1;

in S303, the message sending device writes data 0x20 with the length of 1 byte into the data buffer, after success, two messages exist in the message storage area in the data buffer, and the variable uxMessagesWaiting value is equal to 2;

in S304, the message receiving device reads the data 0x10 from the data buffer, and after success, the position of the message storage area 0x10 in the data buffer is set to be idle, and the variable uxmessage wavering value is equal to 1;

at S305, the message receiving apparatus reads the data 0x20 from the buffer, and after success, the position of the message storage area 0x20 in the data buffer is set to be idle, and the variable uxMessagesWaiting value is equal to 0;

FIG. 4 illustrates the flow of write data register operations:

step S401, the message transmitting device is started;

step S402, the message buffer locks the data buffer first, and the other message sending device or the message receiving device is forbidden to access the data buffer again;

step S403, checking whether the data buffer is full, i.e. judging whether the variable uxMessagesWaitting value is less than 4;

step S404, when the variable uxMessagesWaiting value is more than or equal to 4, the buffer is unlocked;

step S405, returning to the full state of the data buffer;

step S406, when the variable uxMessagesWaiting value is less than 4, the data buffer stores the message at the end of the message storage area; simultaneously updating pointers pcWriteTo to pcwriteto+uxitemsize to be written next (step S407);

step S408, judging whether pcWriteTo points to the end of the storage area; when pcWriteTo points to the tail pcTail of the storage area, adjusting pcWriteTo to point to the head pcHead of the storage area, and adding 1 to the variable uxMessagesWaitting value; when pcWriteTo does not point to the end of the storage area, the variable uxMessagesWaitting value is increased by 1;

step S411, the buffer is unlocked;

step S412, returning the successful message transmission;

fig. 5 illustrates the read data buffer operation flow:

step S501, starting a message receiving device;

step S502, the data buffer locks the buffer first, and the other message sending device or the message receiving device is forbidden to access the buffer again;

step S503, checking whether the data buffer is empty, i.e. determining whether the variable uxMessagesWaitting value is equal to 0;

step S504, the data buffer is empty, no message is in the buffer, and the state that the data is empty is returned;

step S506, the message is not empty, the pcReadFrom is adjusted to the position of the message to be read, whether the pcReadFrom is equal to the end of the storage area is judged, if the pcReadFrom is pointed to the end, the pcReadFrom is adjusted to the starting address of the storage area;

step S509 of copying the data to the message receiving apparatus;

step S510, the number of messages in the data buffer is reduced by one;

step S511, unlocking the data buffer;

step S512, returning to the successful message reception;

fig. 6 illustrates a process of a message receiving apparatus reading a message from a data buffer, which requires a hardware timer and an interface checker to cooperate, the timer time being configured to be 5 milliseconds (ms), specifically as follows:

step S601, a timer generates an abnormal signal;

step S602, starting an interface checker to check the interface state, and if the interface state is not idle or does not meet the interface sending condition, ending the message receiving by the message receiving device;

step S603, the interface checker detects that the interface state is idle, and reads the information from the data buffer;

step S604, the data buffer returns successful reading, and the message sending device starts an interface to send an event S605;

step S606, the data buffer returns to failure of reading and ends the message reception;

fig. 7 illustrates the processing of a message sending device comprising an arbiter and a message result detector:

step S701, the arbiter is triggered and the message sending device is started;

step S702, the message sending device performs segmentation processing on the data to be written into the data buffer, so that each message cannot be larger than the maximum value of 256 bytes of a single message of the data buffer;

step S703, calling a data buffer, and writing the message into the data buffer;

step S704, the result detector checks the return state of the data buffer, returns to be successful, and ends the message transmission;

step S705, detecting that the data buffer fails to return, the message sending device starts the message receiving device to perform the message receiving process, and returns to step S703 to repeatedly execute the process after the message receiving device succeeds in the process.

Claims (15)

1. The processing method for solving the communication data transmission conflict in the SoC is characterized by comprising a message transmitting device, a data buffer, a message receiving device and an interface transmitting module;

the message sending device writes the message to be sent into the data buffer;

the message receiving device reads out the message to be received from the data buffer;

wherein the data buffer is a message queue model in a point-to-point mode;

the message sending device is started by a module for sending data in the SoC, and is responsible for writing the data to be sent into the data buffer;

the message receiving device is triggered by a hardware timer in the device, and is responsible for inquiring the state of a communication interface, reading the message in a data buffer, and using an interface sending module to send the message after the message is successfully read after the timer is abnormal.

2. A processing method according to claim 1, characterized in that:

the data buffer is a first-in first-out queue structure, is a memory space opened by a software program in the RAM, and is used for storing the message sent by the message sending device; the message receiving device can read the message from the data buffer;

the depth value of the data buffer and the storage size of a single message are preset in advance according to an SoC system, and the depth value of the data buffer determines the number of the data buffer capable of accommodating the message; each message is stored in a fixed-size space in bytes (bytes);

the data buffer supports a plurality of message sending devices to send messages; supporting a message receiving device to read the message;

when the data buffer is read and written, returning to the buffer state: success and failure;

wherein success indicates that the message sending device completes writing the message and the message receiving device completes reading the message; the meaning of failure includes two types: empty and full; the message sending device returns full after storing the message failure; the message receiving device fails to read the message and returns to null.

3. A processing method according to claim 2, characterized in that:

after a message is successfully sent to the data buffer, the number of the messages in the data buffer is increased by one, the message fails, and the number of the messages is unchanged;

after a message is successfully received from the data buffer, subtracting one from the number of messages in the data buffer, failing, and keeping the number of messages unchanged;

the message number in the data buffer indicates the number of effective messages stored in the current data buffer, the minimum is zero, and the maximum is the depth of the data buffer;

the valid message is a message which is written in the data by the message transmitting device but is not read by the message receiving device.

4. A processing method according to claim 2, characterized in that:

the data buffer only supports access by the message sending device and the message receiving device, and does not allow access by other devices or modules.

5. A processing method according to claim 2, characterized in that:

the data buffer can only support single device access, any one of the message receiving device and the message sending device can lock the data buffer during the process of reading and writing the data buffer, and only one message receiving device or one message sending device is allowed to operate the data buffer during the accessed period, so that the data buffer is prevented from being abnormal.

6. A process according to claim 3, characterized in that:

when the number of the messages stored in the data buffer reaches the depth value, the data buffer returns to a space full state when the message sending device sends the messages, at this time, the message sending device should actively release the CPU and start the message receiving device, after the message receiving device finishes the operation, the CPU is released again, the message sending device sends the operation is executed, and the process continues until the message sending device successfully sends the messages.

7. A process according to claim 3, characterized in that:

when the message sending device sends data with a length greater than the maximum value of a single message in the data buffer, the data needs to be split into a plurality of messages to be stored in the data buffer.

8. A process according to claim 3, characterized in that:

and when no effective information exists in the data buffer, the information receiving device reads and returns to an empty state, and at the moment, the information receiving device actively releases CPU resources, and the number of the buffered information is unchanged.

9. A processing method according to claim 1, characterized in that:

the message receiving device is a module combining soft and hard, can read the message from the data buffer, and can use the interface sending module to start the message sending flow after the message is received successfully.

10. A processing method according to claim 9, characterized in that:

the message receiving device comprises a hardware timer and an interface checker;

the hardware timer is set as a cycle counter, a preset value is set in advance according to the running environment of the SoC, and the SoC periodically generates an abnormal signal according to the preset value;

the interface checker can reflect the current working state of the interface, can read the information in the data buffer and transmit signals to the transmitting interface, and starts the interface transmitting function.

11. A method of treatment according to claim 10, characterized in that:

when the message receiving device works, firstly, the hardware timer generates an abnormal signal, then the interface checker is started to acquire the state of the communication interface, and after the receiving condition is met, the message receiving device moves the message out of the data buffer;

satisfying the reception condition requires that the following two points are satisfied simultaneously:

first point: the communication interface is in an idle state or the communication interface meets the condition of sending data; wherein idle means that the communication interface is not in a transmit mode nor in a receive mode; the communication interface satisfying the data transmission condition indicates that the communication interface is already in a state of waiting for transmitting data;

second point: the message receiving device receives the message successfully through the data buffer.

12. A processing method according to claim 11, characterized in that:

the interface checker can reflect the working state of the interface in real time;

when the interface checker detects that the interface is idle, the interface checker reads the information from the data buffer and conveys an interface sending signal, and the interface sending module can send the information out of the SoC;

and when the interface checker detects that the interface is not idle or does not meet the transmission condition, releasing CPU resources and waiting for the next arrival of the abnormal signal of the timer.

13. The process according to claim 4, wherein:

the message sending device is one or more functions in the SoC, and may be any other hardware module or software module or communication interface besides the communication interface connected with the message receiving device;

the message transmitting device comprises a hardware arbiter and a transmission result detector;

the hardware arbiter is used for configuring the priority of the management message sending device;

the transmission result detector is used for detecting whether the message transmitting device correctly transmits the message to the data buffer.

14. A method of treatment according to claim 13, characterized in that:

the configuration value of the hardware arbiter can be configured by the actual running condition of the SoC, the configuration result of the arbiter is stored in the flash of the SoC, and the memory value of the SoC is loaded into the hardware register after the SoC is electrified and started;

the arbiter configuration value determines the priority of the message sending device, and the sending module with high priority can send the message to the data buffer preferentially, and under the same priority, the message is processed in real time according to the PC value when the current CPU operates, namely the sending module currently operated sends the message to the data buffer preferentially.

15. A method of treatment according to claim 14, wherein:

the message sending result detector is realized by software and can detect the sending result;

after the message is successfully sent, releasing the CPU and executing subsequent operations;

and when the message transmission fails, returning to the full state of the data buffer, releasing the CPU, and starting the message receiving device.