CN117272914A - Method and device for quickly determining copper-clad shape to form topological structure based on quadtree - Google Patents
Method and device for quickly determining copper-clad shape to form topological structure based on quadtree Download PDFInfo
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Abstract
The invention provides a method and a device for quickly determining a copper-clad shape to form a topological structure based on a quadtree; the method comprises the following steps: obtaining the intersection state of the copper-clad shapes of each layer based on the quadtree according to the layout design of each layer of the integrated circuit; forming connection pairs of each layer by all intersected copper-clad shapes of each layer based on the intersected state of the copper-clad shapes of each layer; based on the layout design of the integrated circuit, different layers of the integrated circuit are connected through via holes or gold wires, and for each via hole or gold wire, all connection pairs are formed by the copper-clad shapes of different layers connected by the corresponding via hole or gold wire; and (3) carrying out network merging on the copper-clad shapes based on all the connection pairs to form the topological structure of the integrated circuit. The invention not only does not need to exclude the copper-clad shapes which are not likely to be intersected in advance, and obviously improves the diagnosis precision of the intersected state of the copper-clad shapes, but also can greatly simplify the number of analyzed topological structures, reduce the diagnosis time of an integrated circuit layout and improve the diagnosis efficiency.
Description
Technical Field
The invention relates to the technical field of integrated circuit layout detection, in particular to a method and a device for quickly determining a copper-clad shape to form a topological structure based on a quadtree.
Background
The fabrication process of integrated circuits typically involves schematic design, layout design, and fabrication of the integrated circuit based on the layout of the design. Integrated circuit fabrication is accomplished by integrated circuit suppliers, whose processes typically include tens of steps of circuit mask fabrication, polishing, oxidizing, hybridizing, photolithography, diffusing, depositing, metallizing, etc., to ultimately effect transfer of the circuit mask to the wafer, thereby achieving very complex circuit functions through high density electronic circuitry and component distribution of the wafer. Because the integrated circuit manufacturing process is extremely complex, in order to ensure the accuracy of chip manufacturing and the highest possible yield, the integrated circuit suppliers require that the designed integrated circuit layout meet strict design rules, and in order to ensure the process requirements of small manufacturing procedures, engineers may not precisely give layout shapes once but give the layout shapes from coarse to fine in batches, the layout shapes of given coarse sizes consider a wide range of design outlines, errors of the magnitude of the coarse sizes are allowed to exist, and the layout shapes of fine sizes accurately correct the design outlines given under the wide range again at different parts, and the magnitude of the allowed errors is of the magnitude of the fine sizes. Therefore, the layout design file generated by the design engineer through the integrated circuit layout design software actually contains information related to the preparation process, and the layout shape from thick to thin is given for different process sizes, and the finally formed layout is the designed layout shape.
For the layout shapes which are overlapped from thick to thin and are large in area, the traditional integrated circuit layout diagnosis method can judge whether different copper-clad shapes are intersected or not in pairs, the calculated amount is huge, although the coordinate transformation is carried out on the different copper-clad shapes and the coordinate range of the copper-clad shapes can be determined to exclude the copper-clad shapes which are impossible to intersect in advance, the method is only effective for the regular copper-clad shapes, and for the copper-clad shapes with a plurality of branches, the coordinate range of the copper-clad shapes can contain the whole layout area no matter what coordinate transformation is carried out, so that the coordinate range of the copper-clad shapes which are impossible to intersect in advance is not capable of obviously improving the intersecting state of the copper-clad shapes. Furthermore, it is also necessary to quickly merge the gold wire networks of copper-clad shapes of all layers of the integrated circuit based on the intersection state of the copper-clad shapes and the connection relationship of the vias or gold wires connecting different layers, so as to form the topology structure of the integrated circuit, so that the design defects of the integrated circuit layout can be diagnosed later.
Disclosure of Invention
Based on the foregoing, it is necessary to provide a method and a device for quickly determining a topology structure formed by a copper-clad shape based on a quadtree.
In a first aspect, the present application proposes a method for quickly determining a topology structure formed by a copper-clad shape based on a quadtree, the method comprising:
s1: obtaining the intersection state of the copper-clad shapes of each layer based on the quadtree according to the layout design of each layer of the integrated circuit;
s2: forming connection pairs of each layer by all intersected copper-clad shapes of each layer based on the intersected state of the copper-clad shapes of each layer;
s3: based on the layout design of the integrated circuit, different layers of the integrated circuit are connected through via holes or gold wires, and for each via hole or gold wire, all connection pairs are formed by the copper-clad shapes of different layers connected by the corresponding via hole or gold wire;
s4: based on all connection pairs, carrying out network merging on the copper-clad shapes to form a topological structure of the integrated circuit;
in step S1, according to the layout design of each layer of the integrated circuit, the intersection state of the copper-clad shapes of each layer is obtained based on the quadtree, which specifically includes:
s101: setting the initial state of the quadtree to only contain tree roots, wherein the copper-clad shape contained by the tree roots is empty, and setting the tree roots as current child nodes;
s102: setting the range of the current sub-node as the range of each layer of integrated circuit layout;
s103: determining the sub-node where each copper-clad shape is located based on the position of the copper-clad shape, adding the corresponding copper-clad shape into the corresponding sub-node to obtain the associated copper-clad shape of the corresponding sub-node, and splitting the current sub-node into 4 sub-nodes when the number of the associated copper-clad shapes of the current sub-node exceeds the maximum value of the preset number;
s104: repeating the step S102 until all copper-clad shapes are added into the child nodes;
s105: and judging whether any two of the associated copper-clad shapes are intersected or not according to the associated copper-clad shapes of each child node, and obtaining the intersection state of the copper-clad shapes of each layer.
In one embodiment, in the step S101, the setting the initial state of the quadtree to include only the tree root, where the copper-clad shape included in the tree root is empty, and setting the tree root as the current child node specifically includes:
setting the initial state of the quadtree to only contain tree roots, wherein the copper-clad shape contained by the tree roots is empty, and setting the tree roots as current child nodesWherein 0 represents the set +.>The child node depth of 0,1 indicates the set +.>The 1 st child node in (a).
In one embodiment, the setting the range of the current child node in step S102 is the range of each layer of integrated circuit layout, and specifically includes:
by usingRepresenting the top position of the ith child node when the child node depth is j, adopt +.>Representing the bottom position of the ith child node when the child node depth is j, adopt +.>Represents the leftmost position of the ith child node when the child node depth is j, adopt +.>Indicating that the depth of the child node is jThe rightmost position of the i-th child node.
In one embodiment, the determining, based on the positions of the copper-clad shapes in S103, the sub-node where each copper-clad shape is located, and adding the corresponding copper-clad shape to the corresponding sub-node to obtain the associated copper-clad shape of the corresponding sub-node specifically includes:
for each copper-clad shape, determining the sub-node to be located based on the location of the copper-clad shapeWherein i represents a setThe ith child node in (j) represents the set +.>And adding the corresponding copper-clad shape into the corresponding child node as the copper-clad shape of the corresponding child node, and obtaining the associated copper-clad shape of the corresponding child node.
In one embodiment, when the number of the associated copper clad shapes of the current child node exceeds the preset number maximum value in S103, splitting the current child node into 4 child nodes specifically includes:
sub-nodeSplitting into child nodes->，/>，/>，/>Wherein k represents the set->Maximum of child nodes in (a)The number of the child nodes when the depth is j is equal to the number of the child nodes, and the range of 4 child nodes after splitting is obtained;
and based on the relation between the range of the associated copper-clad shape of the current sub-node and the range of the 4 sub-nodes after splitting, sequentially updating the new associated sub-nodes of the associated copper-clad shape of the current sub-node.
In one embodiment, the determining in S105 whether any two of the associated copper-clad shapes intersect specifically includes:
firstly judging whether the boundary frames of polygons formed by any two copper-clad shapes of the associated copper-clad shapes are intersected or not, if the boundary frames are not intersected, judging that the polygons formed by the two associated copper-clad shapes are not intersected, and ending; otherwise, judging whether the edges of the polygon formed by the first associated copper-clad shape are intersected with the edges of the polygon formed by the second associated copper-clad shape one by one, and judging that the two associated copper-clad shapes are intersected if any edge is intersected with the edges of the polygon formed by the second associated copper-clad shape; otherwise, intersecting judgment is carried out on the edges of the polygon formed by the first associated copper-clad shape and the edges of the polygon formed by the second associated copper-clad shape one by one, and if any pair of intersecting edges are found, the two associated copper-clad shapes are judged to be intersected, and the process is finished; otherwise, if no intersected edges exist, judging that the two associated copper-clad shapes are not intersected; the bounding box of the polygon is the lower left corner coordinateAnd the upper right corner coordinates->A rectangular shape formed, wherein->For the minimum value of the x-coordinates of all vertices of the polygon, +.>For the maximum value of the x-coordinates of all vertices of said polygon, -/->For the minimum value of the y-coordinates of all vertices of the polygon, +.>Is the maximum of the y coordinates of all vertices of the polygon.
In one embodiment, in S4, based on all the connection pairs, the network merging is performed on the copper-clad shapes to form a topology structure of the integrated circuit, which specifically includes:
s401: modifying the connection pair into a number corresponding to the copper-clad shape;
s402: forming an incidence matrix of the copper-clad shape based on the connection pairs, wherein the incidence matrix is used for defining the connection relation of the copper-clad shape and isWherein N is the number of copper-clad shapes;
s403: and performing network merging on the copper-clad shapes based on the incidence matrix to form a topological structure of the integrated circuit.
In one embodiment, in S403, performing network merging on the copper-clad shape based on the correlation matrix specifically includes:
s4031: initializing all networks of the copper-clad shapes as no network, and setting the current network as the networkT represents the t network of the current merge, initial setup +.>Setting the current treatment copper-clad shape as +.>；
S4032: setting all non-zero elements in the s-th column of the incidence matrix as copper-clad shapes corresponding to rows where all corresponding non-zero elements are located and a network to which the s-th copper-clad shapes belong；
S4033: setting upIf->Ending;
s4034: if the network to which the current copper-clad shape s belongs is no network, settingAnd goes to step S4032;
s4035: if the network to which the current copper-clad shape s belongs is already set, the set network isSetting the affiliated network of the copper-clad shape corresponding to the row of all non-zero elements of the corresponding all non-set networks as +.>Wherein->Representing the network of the current copper-clad shape s;
s4036: step S4033 is performed until all columns in the association matrix are judged.
Second aspect the present application proposes an apparatus for forming a topology based on a quadtree rapid determination of a copper clad shape, the apparatus comprising:
the quad-tree construction module is used for setting the initial state of the quad-tree to only contain tree roots, setting the copper-clad shapes contained in the tree roots to be empty, setting the tree roots to be current sub-nodes, and setting the range of the current sub-nodes to be the range of each layer of integrated circuit layout;
the copper-clad shape association module is used for determining the child node where each copper-clad shape is located based on the position of the copper-clad shape, adding the corresponding copper-clad shape into the corresponding child node, and obtaining the associated copper-clad shape of the corresponding child node;
the sub-node splitting module is used for splitting the current sub-node into 4 sub-nodes when the number of the associated copper-clad shapes of the current sub-node exceeds the maximum value of the preset number;
the copper-clad shape intersection judging module is used for judging whether any two of the associated copper-clad shapes intersect or not for the associated copper-clad shapes of each child node to obtain the intersection state of the copper-clad shapes of each layer;
the connection pair forming module of each layer is used for forming connection pairs of each layer by all intersected copper-clad shapes of each layer based on the intersected state of the copper-clad shapes of each layer;
all connection pair forming modules are used for forming all connection pairs by connecting different layers of the integrated circuit through via holes or gold wires based on layout design of the integrated circuit, and for each via hole or gold wire, copper-clad shapes of different layers connected by the corresponding via hole or gold wire;
and the topological structure forming module is used for carrying out network merging on the copper-clad shapes based on all the connection pairs to form the topological structure of the integrated circuit.
In a third aspect the present application proposes a computer readable storage medium storing a computer program which, when executed by a processor, implements the steps of the above method.
The invention has the advantages that:
aiming at the situation that the copper-clad shapes are mutually overlapped in the integrated circuit layout design, the invention provides a method and a device for quickly determining the copper-clad shapes to form a topological structure based on a quadtree. And the invention can quickly merge the copper-clad gold wire networks of all layers of the integrated circuit based on the intersection state of the copper-clad shapes and the connection relation of the through holes or gold wires connected with different layers to form the topology structure of the integrated circuit, so as to diagnose the design defects of the integrated circuit layout.
Drawings
Fig. 1 is a general flow chart of the present invention.
FIG. 2 is a schematic diagram of forming a specific shape copper-clad area by overlapping wires with different lengths;
FIG. 3 is an effect diagram of forming a copper-clad area with a specific shape after overlapping wires;
FIG. 4 is a schematic diagram of the vertex O being outside the polygon as determined according to rule 2;
FIG. 5 is a schematic diagram of the vertex O being within a polygon as determined according to rule 2;
FIG. 6 is a schematic diagram of the vertex O being outside the polygon as determined according to rule 3;
FIG. 7 is a schematic diagram of the vertex O being within a polygon as determined according to rule 3;
FIG. 8 is a schematic diagram of the intersection of a layer of copper-clad shapes;
fig. 9 is a schematic diagram of an apparatus for quickly determining a copper clad shape forming topology based on a quadtree.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be further described in detail by the following detailed description with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
FIGS. 2-3 are diagrams showing the layout design engineer utilizing overlapping short traces to form copper-clad areas of a specific shape, which would give diagnostic information of design errors of different traces with shorts if the design is diagnosed by a conventional diagnostic method;
based on the above problems, the present application proposes a method, a device, a computer device, and a storage medium for quickly determining the intersection state of the copper-clad shapes based on a quadtree.
Example 1
Referring to fig. 1, fig. 1 is a flow chart of a method for quickly determining a topology structure formed by a copper-clad shape based on a quadtree according to the present embodiment, and the method mainly includes the following steps:
s1: and obtaining the intersection state of the copper-clad shapes of each layer based on the quadtree according to the layout design of each layer of the integrated circuit.
The step S1 is based on quadtree according to layout design of each layer of the integrated circuit, and obtains an intersecting state of copper-clad shapes of each layer, and specifically includes:
s101: setting the initial state of the quadtree to only contain tree roots, wherein the copper-clad shapes contained in the tree roots are empty, and setting the tree roots as current child nodes.
In this embodiment, the method of step S101 specifically includes:
firstly, setting the initial state of a quadtree to only contain tree roots, wherein the copper-clad shape contained by the tree roots is empty, and setting the tree roots as current child nodesWherein 0 represents the set +.>The child node depth of 0,1 indicates the set +.>The 1 st child node in (a).
In this embodiment, the method of step S102 specifically includes:
by usingRepresenting the top position of the ith child node when the child node depth is j, adopt +.>Representing the bottom position of the ith sub-node when the depth of the sub-node is j, adoptingUse->Represents the leftmost position of the ith child node when the child node depth is j, adopt +.>And represents the rightmost position of the ith child node when the child node depth is j.
S103: and determining the child node where each copper-clad shape is located based on the position of the copper-clad shape, adding the corresponding copper-clad shape into the corresponding child node to obtain the associated copper-clad shape of the corresponding child node, and splitting the current child node into 4 child nodes when the number of the associated copper-clad shapes of the current child node exceeds the maximum value of the preset number.
In this embodiment, the method of step S103 specifically includes:
for each copper-clad shape, determining the sub-node to be located based on the location of the copper-clad shapeWherein i represents a setThe ith child node in (j) represents the set +.>The depth of the child node in the tree is j, the corresponding copper-clad shape is added into the corresponding child node, and the corresponding copper-clad shape is called as the copper-clad shape associated with the child node, namely the associated copper-clad shape of the corresponding child node is obtained, when the associated copper-clad shape of the current child node is->The number of (2) exceeds->The current child node is split into 4 child nodes.
In this embodiment, when the current child node is associated with a copper-clad shapeThe number of (2) exceeds->Splitting the current child node into 4 child nodes specifically includes:
s1031: sub-nodeSplitting into child nodes->，/>，/>，/>Wherein k represents the set->The maximum depth of the child nodes in the tree is j, the number of the child nodes is obtained, and the range of 4 child nodes after splitting is obtained, wherein the ranges are respectively as follows:，，，；
s1032: based on the relation between the range of the associated copper-clad shape of the current child node and the range of the 4 child nodes after splitting, the method specifically comprises the following steps: based on the associated copper-clad shape of the current child nodeRange top, bottom, left, right and child node of (2)，/>，/>，/>The relation of the range is updated in turn to update the associated copper-clad shape of the current child node>Is a new associated child node of (a); wherein top, bottom, left, right represents the top, bottom, leftmost and rightmost positions, respectively, of the associated copper-clad shape of the child node; then sequentially updating new associated child nodes of the associated copper-clad shape of the current child node, which specifically comprises the following steps:
in this embodiment, the present invention relates to update rule 1:
if it isSatisfying the following conditions>And is also provided with，
Will beUpdated to->；
Wherein comma indicates that both of the left and right copper clad shapes thereof satisfy the above inequality condition,representation->Range top, & gt>Representation->Is a range of (B) bottom,/B)>Representation->Range left, & gt>Representation->P represents the p-th child node, and +.>；
In this embodiment, the update rule 2 according to the present invention:
if it isSatisfy->And->And is also provided with，
Will beUpdated to->And->Represents the mth copper-clad shapeThe state is located in both child node i and child nodeIn (a) and (b);
wherein comma indicates that both the left and right copper-clad shapes thereof satisfy the above inequality condition;
in this embodiment, the update rule 3 according to the present invention:
if it isSatisfy->And->And->，
Will beUpdated to->And->Indicating that the mth copper-clad shape is located at the sub-node +.>In turn at the child node->In (a) and (b);
wherein comma indicates that both the left and right copper-clad shapes thereof satisfy the above inequality condition;
in one embodiment, the present invention relates to update rule 4: if it isSatisfy->，And->And->，
Will beUpdated to->And->Representing that the mth copper-clad shape is located in both the child node i and the child nodeIn (a) and (b);
wherein comma indicates that both the left and right copper-clad shapes thereof satisfy the above inequality condition;
in this embodiment, the update rule 5 according to the present invention: if it isSatisfy->，And->And->，
Will beUpdated to->And->Representing that the mth copper-clad shape is located in both the child node k+1 and the child nodeIn (a) and (b);
wherein comma indicates that both the left and right copper-clad shapes thereof satisfy the above inequality condition;
in this embodiment, the present invention relates to update rule 6: if it isThe conditions under which the above-mentioned conditions are met,
and->And is also provided withAnd->；
Will beUpdated to->，/>，/>And->Representing that the mth copper-clad shape is located in both the child node i and the child node +.>In turn at the child node->In turn at the child node->Is a kind of medium.
S104: step S102 is repeated until all copper-clad shapes are added to the child nodes.
S105: and judging whether any two of the associated copper-clad shapes are intersected or not according to the associated copper-clad shapes of each child node, and obtaining the intersection state of the copper-clad shapes of each layer.
In this embodiment, in S105 according to the present invention, the determining whether any two of the associated copper-clad shapes intersect specifically includes:
firstly judging whether the boundary frames of polygons formed by any two copper-clad shapes of the associated copper-clad shapes are intersected or not, if the boundary frames are not intersected, judging that the polygons formed by the two associated copper-clad shapes are not intersected, and ending; otherwise, judging whether the edges of the polygon formed by the first associated copper-clad shape are intersected with the edges of the polygon formed by the second associated copper-clad shape one by one, and judging that the two associated copper-clad shapes are intersected if any edge is intersected with the edges of the polygon formed by the second associated copper-clad shape; otherwise, intersecting judgment is carried out on the edges of the polygon formed by the first associated copper-clad shape and the edges of the polygon formed by the second associated copper-clad shape one by one, and if any pair of intersecting edges are found, the two associated copper-clad shapes are judged to be intersected, and the process is finished; otherwise, if no intersected edges exist, judging that the two associated copper-clad shapes are not intersected; the bounding box of the polygon is the lower left corner coordinateAnd the upper right corner coordinates->Rectangular shape formed, said->For the minimum value of the x-coordinates of all vertices of the polygon, +.>For the maximum value of the x-coordinates of all vertices of said polygon, -/->For the minimum value of the y-coordinates of all vertices of the polygon, +.>Is the maximum of the y coordinates of all vertices of the polygon.
For example: copper-clad shape associated with any two child nodes iAnd->The following operations are performed:
s1051: judging the shape of the copper coatingThe bounding box of the polygon formed +_>And copper-clad shape->The bounding box of the polygon formed +_>Whether or not intersecting, if not, namely:
or->Or->Or->The method comprises the steps of carrying out a first treatment on the surface of the Judging the copper-clad shape->And->The intersection is not performed, and the end is reached;
s1052: to copper-clad shapeThe side e of the polygon formed, judging whether it is the same as the copper-clad shape +.>The edges of the formed polygons intersect, and if so, the copper-clad shape is judged>And->Intersecting and ending;
s1053: repeatedly executing step S1052 until the copper-clad shapeAll sides of the formed polygon are judged to be finished;
s1054: to copper-clad shapeEdge e of the polygon formed and copper-clad shape +.>The intersection judgment is carried out on the edge f of the formed polygon, and if the edge e and the edge f intersect (including the common vertex), the copper-clad shape is judged>And->Intersecting and ending;
s1055: step S1054 is repeatedly performed until the copper-clad shapeAll sides of the polygon formed and copper-clad shapesJudging that all sides of the formed polygon are finished, and judging the copper-clad shape>And->Does not intersect.
The step S1052 specifically includes: for copper-clad shapesWhether the end points e1 and e2 are positioned in the polygon is judged, if any end point is positioned on the polygon (including being coincided with a certain vertex of the polygon and the end point is positioned on a certain edge of the polygon), or the end points e1 and e2 are not positioned in the polygon or outside the polygon, the edge e and the copper-clad shape are judged>Edges of the formed polygons intersect.
The above-mentioned judgement copper-clad shapeThe specific steps of whether the end point O (e 1 or e 2) of the edge of (a) is located within a polygon include:
to copper-clad shapeFrom which an arbitrary ray, for example a ray parallel to the x-axis, is taken, the copper-clad shape is examined>If the number of the sides of the formed polygon is odd, determining that the endpoint O is in the copper-clad shape +.>Inside; otherwise, if the number of intersecting bars is even, it is determined that the end point q is in the copper-clad shape +.>Outside of that.
In the present embodiment, the copper-clad shape is inspected in the above stepIf the number of the sides of the formed polygon is odd, determining that the endpoint O is in the copper-clad shape +.>Inside; otherwise, if the number of intersecting bars is even, it is determined that the endpoint O is in the copper-clad shape +.>Besides, the method specifically comprises the following steps:
the following rules apply in order:
in this embodiment, rule 1 related to the present invention: if the end point (end point O) of the ray is on a certain side of the polygon (including the vertex coincident with the side), determining that the end point O is in the copper-clad shapeInside.
In this embodiment, rule 2 related to the present invention: if the intersection point of the ray and the polygon coincides with the polygon vertex P, two sides taking the vertex P as an endpoint are found, the other endpoints of the two sides are P1 and P2 respectively, if P1 and P2 are on the same side of the ray, the number of the intersecting sides is recorded as 2, and if P1 and P2 are on opposite sides of the ray, the number of the intersecting sides is recorded as 1. Referring to fig. 4 to 5, each of the examples of rule 2 is shown, wherein fig. 4 is a schematic diagram of 2 intersecting edges when judged according to rule 2, and fig. 5 is a schematic diagram of 1 intersecting edges when judged according to rule 2.
In this embodiment, rule 3 related to the present invention: if a certain side of the polygon falls on the ray completely, two sides connected with the side are found, the other end points of the polygon are set as Q1 and Q2, if Q1 and Q2 are on the same side of the ray, the number of the intersecting sides is recorded as 2, and if Q1 and Q2 are on the opposite side of the ray, the number of the intersecting sides is recorded as 1. Referring to fig. 6 to 7, fig. 6 is a schematic diagram of 2 intersecting edges when judged according to rule 3, and fig. 7 is a schematic diagram of 1 intersecting edges when judged according to rule 3.
S2: all of the intersecting copper-clad shapes of each layer are formed into connection pairs for each layer based on the intersecting state of the copper-clad shapes of each layer.
In the present embodiment, all the intersecting copper-clad shapes are formed into connection pairs based on the determination result of step S1The method comprises the steps of carrying out a first treatment on the surface of the Wherein v is i All associated copper-clad shapes representing child node i, < +.>Indicating that the mth copper-clad shape is located in the child node i,/>Indicating that the nth copper clad shape is located in child node i; />Representation->And->An electrical connection is made.
S3: based on the layout design of the integrated circuit, different layers of the integrated circuit are connected through via holes or gold wires, and for each via hole or gold wire, all connection pairs are formed by the copper-clad shapes of different layers connected by the corresponding via holes or gold wires.
In the present embodiment, for example: copper-clad shape of a via connected to a first layerAnd a copper-clad shape of the third layerThe two copper-clad shapes are then formed into a connection pair +.>Copper-clad shape of a certain gold wire connected with the first layer +.>And copper-clad shape of fifth layer->The two copper-clad shapes are then formed into a connection pair +.>。
S4: and (3) carrying out network merging on the copper-clad shapes based on all the connection pairs to form the topological structure of the integrated circuit.
In this embodiment, the method described in step S4 specifically includes:
s401: the connection pairs are modified to the numbers corresponding to the copper-clad shapes.
In this embodiment, the steps specifically include: ignoring pairs of connectionsThe connection pair is directly changed into the number corresponding to the copper-clad shape, namely: />。
S402: forming an incidence matrix of the copper-clad shape based on the connection pairs, wherein the incidence matrix is used for defining the connection relation of the copper-clad shape and isWherein N is the number of copper clad shapes.
In this embodiment, the method for forming the association matrix a: 1) Initializing an association matrix as a zero matrix; 2) For all of the pairs of connections,matrix corresponding element->The method comprises the steps of carrying out a first treatment on the surface of the Wherein (1)>Representing the elements of the m-th row and n-th column of the matrix.
S403: and performing network merging on the copper-clad shapes based on the incidence matrix to form a topological structure of the integrated circuit.
In this embodiment, in the method described in step S403, network merging is performed on the copper-clad shape based on the correlation matrix, which specifically includes:
s4031: initializing all networks of the copper-clad shapes as no network, and setting the current network as the networkT represents the t network of the current merge, initial setup +.>Setting the current treatment copper-clad shape as +.>；
S4032: setting all non-zero elements in the s-th column of the incidence matrix as copper-clad shapes corresponding to rows where all corresponding non-zero elements are located and a network to which the s-th copper-clad shapes belong；
S4033: setting upIf->Ending;
s4034: if the network to which the current copper-clad shape s belongs is no network, settingAnd goes to step S4032;
s4035: if the network to which the current copper-clad shape s belongs is already set, the set network isSetting the affiliated network of the copper-clad shape corresponding to the row of all non-zero elements of the corresponding all non-set networks as +.>Wherein->Representing the network of the current copper-clad shape s;
s4036: step S4033 is performed until all columns in the association matrix are judged.
In the present embodiment, specific steps of step S403 are as follows: according to the schematic diagram of the intersection relationship of the copper-clad shapes shown in fig. 8, a connection pair can be obtained, and the finally obtained association matrix is:
initially all copper-clad shapes have no network;
for column 1 of matrix A, since initial copper-clad shape 1 has no network, its non-zero element is row 3, then V will be 3 ，V 1 Is set as the affiliated network of (1)；
Column 2, line 4, will be，/>Is set as the affiliated network of (1)；
The copper-clad shape corresponding to column 3 isSince it was already set at column 1 of matrix a and there are no more other non-zero elements in this column, skip;
the copper-clad shape corresponding to the 4 th row isWhich was already set at column 2 of matrix a, the network set is +.>Checking the non-zero element of column 4, line 6 not set, set +.>Is->；
Column 5, copper-clad shape 5 without network, line 7 with non-zero, will，/>Is set to +.>；
Column 6, already set, similar to column 3, skip;
column 7, already set, similar to column 3, skip.
The invention relates to the technical field of integrated circuit layout detection, and provides a method for quickly determining a copper-clad shape to form a topological structure based on a quadtree, which comprises the following steps: obtaining the intersection state of the copper-clad shapes of each layer based on the quadtree according to the layout design of each layer of the integrated circuit; forming connection pairs of each layer by all intersected copper-clad shapes of each layer based on the intersected state of the copper-clad shapes of each layer; based on the layout design of the integrated circuit, different layers of the integrated circuit are connected through via holes or gold wires, and for each via hole or gold wire, all connection pairs are formed by the copper-clad shapes of different layers connected by the corresponding via hole or gold wire; and (3) carrying out network merging on the copper-clad shapes based on all the connection pairs to form the topological structure of the integrated circuit. According to the method, the intersection states of the copper-clad shapes are rapidly diagnosed based on the quadtree technology and the correlation matrix technology are adopted to carry out network merging on the overlapped layout, so that the copper-clad shapes which cannot be intersected are not required to be removed in advance, the diagnosis precision of the intersection states of the copper-clad shapes is remarkably improved, the number of analyzed topological structures can be greatly simplified, the diagnosis time of the integrated circuit layout is shortened, and the diagnosis efficiency is improved.
Example two
The present embodiment further provides an apparatus 20 for quickly determining a topology structure formed by a copper-clad shape based on a quadtree, please refer to fig. 9, for implementing the method steps for quickly determining a topology structure formed by a copper-clad shape based on a quadtree described in the first embodiment, which mainly includes a quadtree construction module 21, a copper-clad shape association module 22, a sub-node splitting module 23, a copper-clad shape intersection judgment module 24, a connection pair forming module 25 of each layer, all connection pair forming modules 26 and a topology structure forming module 27,
the quad-tree construction module 21 is configured to set an initial state of the quad-tree to include only tree roots, wherein the tree roots include copper-clad shapes that are empty, set the tree roots as current sub-nodes, and set a range of the current sub-nodes as a range of each layer of integrated circuit layout;
the copper-clad shape association module 22 is configured to determine a child node where each copper-clad shape is located based on a position of the copper-clad shape, and add the corresponding copper-clad shape to the corresponding child node, to obtain an associated copper-clad shape of the corresponding child node;
a sub-node splitting module 23, configured to split the current sub-node into 4 sub-nodes when the number of associated copper-clad shapes of the current sub-node exceeds a preset number maximum;
a copper-clad shape intersection judging module 24, configured to judge, for each sub-node, whether any two of the associated copper-clad shapes intersect, to obtain an intersection state of the copper-clad shapes of each layer;
a connection pair forming module 25 for forming connection pairs of each layer by all the intersected copper-clad shapes of each layer based on the intersecting state of the copper-clad shapes of each layer;
the all-connection-pair forming module 26 is configured to form all connection pairs for each via or gold wire by connecting different layers of the integrated circuit through the via or gold wire based on the layout design of the integrated circuit;
the topology forming module 27 is configured to perform network merging on the copper-clad shapes based on all the connection pairs to form a topology of the integrated circuit.
Example III
The present embodiment further provides a computer readable storage medium storing a computer program, which when executed by a processor implements the steps of the method according to the first embodiment, and the computer may be a part of the aforementioned device for quickly determining a copper clad shape based on a quadtree to form a topology.
Those skilled in the art will appreciate that implementing all or part of the above-described methods in accordance with the embodiments may be accomplished by way of a computer program stored on a computer readable storage medium, which when executed may comprise the steps of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a Read-Only Memory (ROM), a random access Memory (RandomAccessMemory, RAM), or the like.
It will be appreciated by those skilled in the art that the modules or steps of the invention described above may be implemented in a general purpose computing device, they may be centralized on a single computing device, or distributed across a network of computing devices, or they may alternatively be implemented in program code executable by computing devices, such that they may be stored on a computer storage medium (ROM/RAM, magnetic or optical disk) for execution by computing devices, and in some cases, the steps shown or described may be performed in a different order than what is shown or described herein, or they may be individually manufactured as individual integrated circuit modules, or a plurality of modules or steps in them may be manufactured as a single integrated circuit module. Therefore, the present invention is not limited to any specific combination of hardware and software.
The foregoing is a further detailed description of the invention in connection with specific embodiments, and is not intended to limit the practice of the invention to such descriptions. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the invention, and these should be considered to be within the scope of the invention.
Claims (10)
1. The method for quickly determining the copper-clad shape to form the topological structure based on the quadtree is characterized by comprising the following steps of:
s1: obtaining the intersection state of the copper-clad shapes of each layer based on the quadtree according to the layout design of each layer of the integrated circuit;
s2: forming connection pairs of each layer by all intersected copper-clad shapes of each layer based on the intersected state of the copper-clad shapes of each layer;
s3: based on the layout design of the integrated circuit, different layers of the integrated circuit are connected through via holes or gold wires, and for each via hole or gold wire, all connection pairs are formed by the copper-clad shapes of different layers connected by the corresponding via hole or gold wire;
s4: based on all connection pairs, carrying out network merging on the copper-clad shapes to form a topological structure of the integrated circuit;
in step S1, according to the layout design of each layer of the integrated circuit, the intersection state of the copper-clad shapes of each layer is obtained based on the quadtree, which specifically includes:
s101: setting the initial state of the quadtree to only contain tree roots, wherein the copper-clad shape contained by the tree roots is empty, and setting the tree roots as current child nodes;
s102: setting the range of the current sub-node as the range of each layer of integrated circuit layout;
s103: determining the sub-node where each copper-clad shape is located based on the position of the copper-clad shape, adding the corresponding copper-clad shape into the corresponding sub-node to obtain the associated copper-clad shape of the corresponding sub-node, and splitting the current sub-node into 4 sub-nodes when the number of the associated copper-clad shapes of the current sub-node exceeds the maximum value of the preset number;
s104: repeating the step S102 until all copper-clad shapes are added into the child nodes;
s105: and judging whether any two of the associated copper-clad shapes are intersected or not according to the associated copper-clad shapes of each child node, and obtaining the intersection state of the copper-clad shapes of each layer.
2. The method according to claim 1, wherein the setting the initial state of the quadtree in step S101 to include only the tree root, and the copper-clad shape included in the tree root is empty, and setting the tree root as the current child node specifically includes:
setting the initial state of the quadtree to only contain tree roots, wherein the copper-clad shape contained by the tree roots is empty, and setting the tree roots as current child nodesWherein 0 represents the set +.>The child node depth of 0,1 indicates the set +.>The 1 st child node in (a).
3. The method according to claim 2, wherein the setting the range of the current sub-node in step S102 is the range of each layer of integrated circuit layout, specifically comprising:
by usingRepresenting the top position of the ith child node when the child node depth is j, adopt +.>Representing the bottom position of the ith child node when the child node depth is j, adopt +.>Represents the leftmost position of the ith child node when the child node depth is j, adopt +.>And represents the rightmost position of the ith child node when the child node depth is j.
4. The method according to claim 3, wherein the determining the sub-node where each copper-clad shape is located based on the position of the copper-clad shape in S103, and adding the corresponding copper-clad shape to the corresponding sub-node, to obtain the associated copper-clad shape of the corresponding sub-node, specifically includes:
for each copper-clad shape, determining the sub-node to be located based on the location of the copper-clad shapeWherein i represents the set +.>The ith child node in (j) represents the set +.>The depth of the child node in the tree is j, and the corresponding copper-clad shape is added into the corresponding child node to be used as the copper-clad shape of the corresponding child node, so that the relationship of the corresponding child node is obtainedAnd (5) a copper-clad shape.
5. The method according to claim 4, wherein splitting the current sub-node into 4 sub-nodes in S103 when the number of associated copper-clad shapes of the current sub-node exceeds a preset number maximum value, specifically comprises:
sub-nodeSplitting into child nodes->，/>，/>，/>Wherein k represents the set->The maximum depth of the child nodes in the tree is j, and the range of 4 child nodes after splitting is obtained;
and based on the relation between the range of the associated copper-clad shape of the current sub-node and the range of the 4 sub-nodes after splitting, sequentially updating the new associated sub-nodes of the associated copper-clad shape of the current sub-node.
6. The method according to claim 1, wherein the determining in S105 whether any two of the associated copper clad shapes intersect specifically includes:
firstly judging whether the boundary frames of polygons formed by any two copper-clad shapes of the associated copper-clad shapes are intersected or not, if the boundary frames are not intersected, judging that the polygons formed by the two associated copper-clad shapes are not intersected, and ending; otherwise, for the first associated copper cladJudging whether the edges of the polygon formed by the shapes intersect with the edges of the polygon formed by the second associated copper-clad shape one by one, and judging that the two associated copper-clad shapes intersect if any edge is found to intersect with the edges of the polygon formed by the second associated copper-clad shape, and ending; otherwise, intersecting judgment is carried out on the edges of the polygon formed by the first associated copper-clad shape and the edges of the polygon formed by the second associated copper-clad shape one by one, and if any pair of intersecting edges are found, the two associated copper-clad shapes are judged to be intersected, and the process is finished; otherwise, if no intersected edges exist, judging that the two associated copper-clad shapes are not intersected; the bounding box of the polygon is the lower left corner coordinateAnd the upper right corner coordinates->A rectangular shape formed, wherein->For the minimum value of the x-coordinates of all vertices of the polygon, +.>For the maximum value of the x-coordinates of all vertices of said polygon, -/->For the minimum value of the y-coordinates of all vertices of the polygon, +.>Is the maximum of the y coordinates of all vertices of the polygon.
7. The method according to claim 1, wherein the step S4 of performing network merging on the copper-clad shapes based on all the connection pairs to form a topology of the integrated circuit specifically includes:
s401: modifying the connection pair into a number corresponding to the copper-clad shape;
s402: forming an incidence matrix of the copper-clad shape based on the connection pairs, wherein the incidence matrix is used for defining the connection relation of the copper-clad shape and isWherein N is the number of copper-clad shapes;
s403: and performing network merging on the copper-clad shapes based on the incidence matrix to form a topological structure of the integrated circuit.
8. The method according to claim 7, wherein the step S403 of performing network merging on the copper-clad shape based on the correlation matrix specifically includes:
s4031: initializing all networks of the copper-clad shapes as no network, and setting the current network as the networkT represents the t network of the current merge, initial setup +.>Setting the current treatment copper-clad shape as +.>；
S4032: setting all non-zero elements in the s-th column of the incidence matrix as copper-clad shapes corresponding to rows where all corresponding non-zero elements are located and a network to which the s-th copper-clad shapes belong；
S4033: setting upIf->Ending;
s4034: if the network to which the current copper-clad shape s belongs is no network, settingAnd goes to step S4032;
s4035: if the network to which the current copper-clad shape s belongs is already set, the set network isSetting the affiliated network of the copper-clad shape corresponding to the row of all non-zero elements of the corresponding all non-set networks as +.>Wherein->Representing the network of the current copper-clad shape s;
s4036: step S4033 is performed until all columns in the association matrix are judged.
9. Device for quickly determining copper-clad shape to form topological structure based on quadtree, which is characterized by comprising:
the quad-tree construction module is used for setting the initial state of the quad-tree to only contain tree roots, setting the copper-clad shapes contained in the tree roots to be empty, setting the tree roots to be current sub-nodes, and setting the range of the current sub-nodes to be the range of each layer of integrated circuit layout;
the copper-clad shape association module is used for determining the child node where each copper-clad shape is located based on the position of the copper-clad shape, adding the corresponding copper-clad shape into the corresponding child node, and obtaining the associated copper-clad shape of the corresponding child node;
the sub-node splitting module is used for splitting the current sub-node into 4 sub-nodes when the number of the associated copper-clad shapes of the current sub-node exceeds the maximum value of the preset number;
the copper-clad shape intersection judging module is used for judging whether any two of the associated copper-clad shapes intersect or not for the associated copper-clad shapes of each child node to obtain the intersection state of the copper-clad shapes of each layer;
the connection pair forming module of each layer is used for forming connection pairs of each layer by all intersected copper-clad shapes of each layer based on the intersected state of the copper-clad shapes of each layer;
all connection pair forming modules are used for forming all connection pairs by connecting different layers of the integrated circuit through via holes or gold wires based on layout design of the integrated circuit, and for each via hole or gold wire, copper-clad shapes of different layers connected by the corresponding via hole or gold wire;
and the topological structure forming module is used for carrying out network merging on the copper-clad shapes based on all the connection pairs to form the topological structure of the integrated circuit.
10. A computer readable storage medium storing a computer program, characterized in that the computer program when executed by a processor implements the steps of the method according to any of claims 1-8.
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