CN117147441B - Gas detector and preparation method thereof - Google Patents

Gas detector and preparation method thereof Download PDF

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Publication number
CN117147441B
CN117147441B CN202310883067.3A CN202310883067A CN117147441B CN 117147441 B CN117147441 B CN 117147441B CN 202310883067 A CN202310883067 A CN 202310883067A CN 117147441 B CN117147441 B CN 117147441B
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semiconductor substrate
pixel unit
carrier
gas detector
shallow trench
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CN117147441A (en
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Radium Youxin Technology Suzhou Co ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/01Arrangements or apparatus for facilitating the optical investigation
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/17Systems in which incident light is modified in accordance with the properties of the material investigated
    • G01N21/25Colour; Spectral properties, i.e. comparison of effect of material on the light at two or more different wavelengths or wavelength bands
    • G01N21/31Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry
    • G01N21/39Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry using tunable lasers
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2201/00Features of devices classified in G01N21/00
    • G01N2201/02Mechanical
    • G01N2201/022Casings
    • G01N2201/0222Pocket size

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Abstract

The invention discloses a gas detector and a preparation method thereof, comprising the following steps: a semiconductor substrate, and a pixel unit positioned on the surface of the semiconductor substrate; the air chamber cavity is positioned in the semiconductor substrate and corresponds to the projection position of each pixel unit in the pixel units in the semiconductor substrate; the invention provides process compatibility and device accuracy by integrating a light source, a light path, a gas chamber and a detector in the same semiconductor structure by utilizing a semiconductor process.

Description

Gas detector and preparation method thereof
Technical Field
The invention relates to the technical field of photoelectricity, in particular to a gas detector and a preparation method thereof.
Background
The gas sensor is one of the most effective ways to acquire gas information in real time and in situ, and plays an irreplaceable important role in the fields of environmental protection, security alarm, flow industry and the like. A methane gas sensor based on tunable semiconductor laser absorption spectroscopy (TDLAS) is a gas sensing device that selects absorption characteristics based on near infrared spectra of different gas molecules, uses a relationship of gas concentration to absorption intensity (lambert-beer law) to identify gas components and determines their concentration. Currently, a methane sensor infrared gas sensor of a tunable semiconductor laser absorption spectroscopy (TDLAS) technology is generally composed of discrete elements such as a light source, a light path, a gas chamber, a detector and the like; meanwhile, according to a measurement principle, indexes such as sensitivity, detection limit, measuring range and the like of the sensor depend on the size of the air chamber. Therefore, low integration, poor measurement accuracy, and the like become major problems restricting the application of the infrared gas sensor.
Disclosure of Invention
In order to solve the problem of the device performance, the invention provides a gas detector and a preparation method thereof, wherein a first semiconductor substrate is provided, and comprises a semiconductor substrate and a pixel unit;
providing a first carrier, bonding a first semiconductor substrate on the first carrier, and thinning the semiconductor substrate;
forming a shallow groove on the surface of the semiconductor substrate and a through hole connected with the shallow groove;
bonding a second carrier on the surface of the semiconductor substrate;
forming an opening in the second slide exposing the shallow trench;
removing the first slide;
forming a deep trench in the semiconductor substrate of the first semiconductor substrate and the second carrier, wherein the deep trench is communicated with the shallow trench;
and embedding a laser in the deep groove.
The invention also provides a gas detector comprising:
a semiconductor substrate having a semiconductor layer formed thereon,
a pixel unit located on the surface of the semiconductor substrate;
the air chamber cavity is positioned in the semiconductor substrate and corresponds to the projection position of the pixel unit in the semiconductor substrate;
an embedded laser in a semiconductor substrate has a waveguide path in the semiconductor substrate to a cavity of the gas cell for light transmission.
The scheme integrates the light source, the light path, the air chamber and the detector in the same semiconductor structure by utilizing the semiconductor technology, thereby providing the compatibility of the technology and the accuracy of the device.
Drawings
FIG. 1 is a schematic diagram of a gas detector according to the present invention;
fig. 2 to 7 are schematic diagrams illustrating an embodiment of a method for manufacturing a gas detector according to the present invention.
Detailed Description
The present invention will now be described with reference to the drawings, wherein like reference numerals are used to refer to like elements throughout, and wherein the depicted structures are not necessarily drawn to scale. It should be understood that the detailed description and corresponding drawings are not intended to limit the scope of the invention in any way, but are merely provided as examples to illustrate some of the ways in which the inventive concepts may be manifested.
The invention provides many different embodiments, or examples, for implementing different features of the invention. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to limit the invention. For example, in the following description, forming a first component over or on a second component may include an embodiment in which the first component and the second component are formed in direct contact, and may also include an embodiment in which additional components may be formed between the first component and the second component, such that the first component and the second component may not be in direct contact. Furthermore, the present invention may repeat reference numerals and/or characters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
Moreover, for ease of description, spatially relative terms such as "below" …, "" below "…," "lower," "above," "upper," and the like may be used herein to describe one element or component's relationship to another element(s) or component(s) as illustrated. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
An embodiment of the present invention provides a gas detector, referring to fig. 1, including:
the semiconductor substrate 100 is provided with a semiconductor layer,
a pixel unit 110 located on the surface of the semiconductor substrate 100;
a plenum cavity 120 within the semiconductor substrate 100 corresponding to a projected location of the pixel cell 110 within the semiconductor substrate 100;
an embedded laser 140 is located in the semiconductor substrate 100, and has a waveguide path 141 leading to the plenum cavity 120 in the semiconductor substrate 100 on its side for light transmission.
The reflective member 130 is located on the surface of the semiconductor substrate 100, and has a reflective layer 131 facing the pixel unit, and a waveguide path 132 leading to the cavity of the air chamber is located in the bottom semiconductor substrate 100 for transmitting light.
The invention also provides a preparation method of the gas detector, which comprises the following steps:
a first semiconductor substrate 300 is provided, which includes a semiconductor substrate 310 and a pixel unit 320.
Specifically, referring to fig. 2, in this embodiment, the substrate includes a semiconductor substrate 310 and a pixel unit 320, where the material of the semiconductor substrate may be a semiconductor material such as Si, ge, siGe, siC, siGeC. The pixel units 320 are distributed in an array on the substrate, each pixel unit may include a read-out circuit (ROIC) array 330 and a signal processing circuit array (not shown), and a photoelectric conversion layer 340 electrically connected to the read-out circuit and the signal processing circuit, where the read-out circuit array is responsible for providing a stable and reliable voltage bias for the pixel units formed subsequently, converting the input current integral into a voltage signal, amplifying and buffering the voltage signal into a suitable output voltage for use by a subsequent module, the photoelectric conversion layer converting the optical signal into an electrical signal, and the signal processing circuit processing the electrical signal to image.
Next, a first carrier is provided, a first semiconductor substrate is bonded on the first carrier, and the semiconductor substrate is thinned.
Specifically, referring to fig. 3, in the embodiment, the first carrier 400 is a silicon wafer bare chip, and the bonding dielectric material 410 is formed on the surface of the pixel unit of the first semiconductor substrate 300, for example, the bonding dielectric material may be silicon dioxide, silicon nitride or photoresist material, and the bonding dielectric material may also be formed on the surface of the first carrier 400. The bonding dielectric material 410 covers the pixel unit 320 on the surface of the first semiconductor substrate 300 and the surface of the semiconductor substrate, and is subjected to chemical mechanical polishing or other methods to make the surface planar, then the bonding dielectric material 410 on the surface of the first carrier 400 and the first semiconductor substrate is attached, and heated, for example, to a molten state of the bonding dielectric material or other chemical treatments, so that the first carrier 400 and the first semiconductor substrate 300 are bonded together, and the specific bonding dielectric material and bonding method adopt any one of germanium, aluminum, gold, tin and copper or an alloy thereof in the embodiment, for example, the forming method can be physical vapor deposition, chemical vapor deposition, electroplating, 3D printing, and the like, and in the embodiment, firstly, an etching pattern layer is formed through deposition, photoetching and etching, then tin is selected by using a physical vapor deposition method, and the material is selected under the conditions of 10-7-10-2Pa, the direct current power is 50-800W, the radio frequency power is 200-800W, the flow rate is 50-350 cm, and then the bonding pattern layer is prepared by removing the bonding material layer with the thickness of 50 um-300 um. And then carrying out heat treatment, wherein the bonding temperature is 250-800 ℃, the bonding pressure is 0.3-200 mpa, the bonding time is 3-80min, and the gas nitrogen or hydrogen or nitrogen-hydrogen mixture is protected to bond the materials. In other embodiments, methods well known to those skilled in the art may be employed, and will not be described in detail.
Then, the other surface of the semiconductor substrate 310 of the first semiconductor substrate 300 is thinned by using the first carrier 400 as a support, and for example, the thinning may be performed by using a chemical mechanical polishing method. For example, a method of mechanical grinding after bonding the slide glass can be adopted, the grinding pressure is 1-5bar, the grinding wheel particles are selected, the thickness is 20-70 um, and the thickness is 50-250um after thinning.
Next, shallow trenches 510 and vias 520 connected to the shallow trenches are formed on the surface of the semiconductor substrate 310.
Specifically, referring to fig. 4, in implementation, the bonding structure formed in the above steps is turned over first, the thinned side of the semiconductor substrate 310 faces upwards, then an etching pattern layer is formed on the surface of the thinned semiconductor substrate 310, for example, a photoresist layer is formed first, after exposure and cleaning, a row of hardened first etching pattern layers is formed on the surface of the semiconductor substrate, and openings are formed in the first etching pattern layers at the corresponding positions of the pixel units, where the openings expose the surface of the semiconductor substrate. Next, a shallow trench 510 is formed on the surface of the semiconductor substrate 310 by etching, such as plasma etching or other etching, where the depth of the shallow trench 510 may be 1/5, 1/4, 1/3, and 1/2 of the depth of the semiconductor substrate, for example, the thickness of the semiconductor substrate may be 200um-1000um, the depth of the shallow trench may be 50um-250um, and the shape of the shallow trench 510 is rectangular, and the rectangular corresponds to the projection of the surface of the vertical semiconductor substrate and is located in the peripheral area of the pixel unit, in other words, the projection range of the shallow trench surrounds the projection range of the pixel unit, so as to ensure that the pixel unit is located above the air chamber.
Next, a second etching pattern layer is formed on the surface of the semiconductor substrate 310, and the forming method is not repeated, where the second etching pattern layer forms an opening at the edge of the shallow trench, and a through hole 520 penetrating the semiconductor substrate and exposing the bonding dielectric layer is formed in the opening area by plasma etching.
Next, a second carrier 600 is bonded to the surface of the semiconductor substrate 310.
Specifically, referring to fig. 5, in this embodiment, the second carrier 600 is a silicon wafer bare chip, a bonding dielectric material is formed on the surface of the second carrier, for example, the bonding dielectric material may be silicon dioxide, silicon nitride or photoresist material, and the surface is made planar by Chemical Mechanical Polishing (CMP) or other methods, for example, dry etching, liquid phase etching, ion implantation/etching, etc., then the bonding dielectric material of the second carrier 600 is attached to one surface of the shallow trench 510 of the structure formed in the above steps, heating or other chemical treatment is performed, so that the second carrier 600 and the first semiconductor substrate 300 are bonded together, and the specific bonding dielectric material and bonding method adopt any one of germanium, aluminum, gold, tin and copper or an alloy thereof in this embodiment, for example, the forming method may be physical vapor deposition, chemical vapor deposition, electroplating, 3D printing, etc., in this embodiment, the etching pattern layer is formed by deposition, photolithography, etching, then the material is selected by using a physical vapor deposition method, and the bonding material is prepared under the conditions of a vacuum power of 10 Pa-10W-200-800 cm-50 cm, and the bonding material is removed by using a vacuum power of the bonding machine of the wafer 300-50 cm. And then carrying out heat treatment, wherein the bonding temperature is 250-800 ℃, the bonding pressure is 0.3-200 mpa, the bonding time is 3-80min, and the gas nitrogen or hydrogen or nitrogen-hydrogen mixture is protected to bond the materials. In other embodiments, methods well known to those skilled in the art may be employed, and will not be described in detail.
In an alternative embodiment of the present invention, the second carrier 600 includes a second semiconductor substrate 605, and a reflective structure 620 located on a surface of the second semiconductor substrate 605, the reflective structure 620 having a reflective layer 630 at a specific angle to the surface of the semiconductor substrate 605, and the reflective structure 620 having a height less than the depth of the shallow trench. In the step of bonding the second carrier on the surface of the semiconductor substrate, the reflecting structure is positioned at the junction of the shallow trench and the through hole. The reflecting layer of the reflecting structure and the surface of the semiconductor substrate form an angle of 45 degrees, so that the light is fully reflected at the corner in the process of transmitting along the light transmission path formed by the through hole and the shallow trench, and the loss is avoided.
The reflective structure may be formed by means of 3D printing or by means of chemical vapor deposition, the material being a metal, for example any one of copper, gold, aluminium or an alloy. In this embodiment, after the dielectric layer is formed by etching, the side wall on one side is etched, then blocked, and then the side wall on the other side is etched, the etching gas flow rate and concentration are gradually adjusted in the etching process, and the etching strength is gradually reduced, so that a triangle gradually increasing from top to bottom is formed, and then the metal reflecting layer is deposited by vapor deposition.
Next, an opening 610 is formed in the second slide 600 exposing the shallow trench.
Specifically, referring to fig. 6, a third etching pattern layer is formed on the surface of the second carrier 600, and the forming method is not repeated, where the third etching pattern layer has an opening, and a projection area of the opening into the semiconductor substrate is smaller than the shallow trench area, in other words, the opening is formed below the pixel unit corresponding to the shallow trench. A deep trench 610 is formed through the second slide using plasma etching, the deep trench 610 communicating with the shallow trench.
The third etch pattern layer is cleaned away, forming a cavity that communicates from the deep trench 610 of the second carrier 600 to the semiconductor shallow trench 510.
Next, the first slide 400 is removed.
Specifically, the removal may be performed by a method of heat softening or chemical cleaning, and the bonding medium material is removed, in this embodiment, by a Lift off (Lift off) method, and specific process parameters are as follows: TMAH (tetramethyl ammonium hydroxide) is selected as the photoresist removing solution, the ultrasonic power is 200-600W, and the photoresist removing time is 5-80 minutes. Then, the first semiconductor substrate is inverted so that one side of the pixel unit faces upward.
Next, an embedded deep trench 640 is formed within the semiconductor substrate 310 of the first semiconductor substrate 300 and the second carrier 600, the embedded deep trench 640 being in communication with the shallow trench 510.
Specifically, referring to fig. 7, a fourth etching pattern layer is formed on one side of the pixel unit 320 of the first substrate 300, that is, the fourth etching pattern layer covers the pixel unit 320 and the semiconductor substrate 310 at the periphery of the pixel unit, and has an opening exposing the semiconductor substrate 310.
Then, laser trenches are formed in the semiconductor substrate 310 and the second carrier 600 by plasma etching, the laser trenches penetrating the semiconductor substrate 310, and then the fourth etching pattern layer is cleaned off.
Next, a laser is embedded within the laser trench.
Specifically, with continued reference to fig. 7, an embedded laser 650 is disposed in the laser trench 640. The embodiment further includes continuously forming a reflective member 130 on the surface of the semiconductor substrate 100 on one side of the pixel unit on the surface of the semiconductor substrate 310, where the reflective member has a reflective layer 131 facing the pixel unit, specifically in this embodiment, after the dielectric layer is formed by etching, etching a side wall on one side first, then shielding the side wall on the other side, then etching the side wall on the other side, gradually adjusting the flow rate and concentration of the etching gas during etching, gradually reducing the etching intensity, thereby forming a triangle gradually increasing from top to bottom, and then vapor depositing a metal reflective layer. The reflector bottom semiconductor substrate 100 has a waveguide path 132 therein leading to the plenum cavity for light transmission.
The scheme integrates the light source, the light path, the air chamber and the detector in the same semiconductor structure by utilizing the semiconductor technology, thereby providing the compatibility of the technology and the accuracy of the device.
The foregoing description is only of the preferred embodiments of the present invention and is not intended to limit the scope of the invention, and all equivalent structures or equivalent processes using the descriptions and the drawings of the present invention or directly or indirectly applied to other related technical fields are included in the scope of the invention.

Claims (10)

1. A method of manufacturing a gas detector, comprising:
providing a first semiconductor substrate, wherein the first semiconductor substrate comprises a semiconductor substrate and a pixel unit;
providing a first carrier, forming a bonding dielectric material on the surface of a pixel unit of a first semiconductor substrate, attaching the first carrier to the surface of the pixel unit of the first semiconductor substrate, bonding the first carrier on the first carrier, and thinning the semiconductor substrate;
forming a shallow groove and a through hole connected with the shallow groove on the surface of the semiconductor substrate, wherein the shallow groove is formed at a corresponding position of a pixel unit on the thinned surface of the semiconductor substrate, and the projection range of the shallow groove vertical to the surface of the semiconductor substrate surrounds the projection range of the pixel unit; the through hole is positioned at the edge of the shallow trench and communicated with the shallow trench, penetrates through the semiconductor substrate and exposes the bonding dielectric layer;
bonding a second carrier on the surface of the semiconductor substrate facing away from the pixel unit;
forming an opening in the second slide exposing the shallow trench;
removing the first slide;
forming a deep trench in the semiconductor substrate of the first semiconductor substrate and the second carrier, wherein the deep trench is communicated with the shallow trench;
and embedding a laser in the deep groove.
2. The method of manufacturing a gas detector according to claim 1, further comprising the steps of: a reflective member is formed on the surface of the semiconductor substrate at the side of the pixel unit, and has a reflective layer facing the pixel unit, and a waveguide path leading to the cavity of the air cell is formed in the semiconductor substrate at the bottom thereof for light transmission.
3. The method of claim 1, wherein the second carrier comprises a second semiconductor substrate and a reflective structure on a surface of the second semiconductor substrate, the reflective structure having a height less than a depth of the shallow trench.
4. A method of manufacturing a gas detector according to claim 3, wherein in the step of bonding the surface of the semiconductor substrate to the second carrier, the reflective structure is located at the interface of the shallow trench and the via.
5. The method of claim 4, wherein the reflective layer of the reflective structure and the surface of the second semiconductor substrate are at an angle of 45 °.
6. A gas detector formed by the method of manufacturing a gas detector according to claim 1, comprising:
a semiconductor substrate;
a pixel unit located on the surface of the semiconductor substrate;
a second carrier sheet located on a side of the semiconductor substrate facing away from the pixel unit;
the shallow groove is positioned in the semiconductor substrate, the deep groove is positioned in the second slide glass and communicated with the shallow groove, and the shallow groove and the deep groove form a communicated air chamber cavity which corresponds to the projection position of the pixel unit in the semiconductor substrate;
the embedded laser is positioned in the semiconductor substrate and the second slide glass, and the semiconductor substrate at the side edge of the embedded laser is internally provided with a waveguide light path leading to the cavity of the air chamber for transmitting light.
7. The gas detector of claim 6, further comprising a reflective member on a surface of the semiconductor substrate having a reflective layer facing the pixel cell, and having a waveguide path within the bottom semiconductor substrate leading to the plenum cavity for light transmission.
8. The gas detector of claim 7, wherein the second carrier comprises a second semiconductor substrate, and a reflective structure on a surface of the second semiconductor substrate, the reflective structure having a height less than a depth of the shallow trench.
9. The gas detector of claim 8, wherein the reflective structure is located at an intersection of the shallow trench and the via.
10. The gas detector of claim 9, wherein the reflective layer of the reflective structure and the surface of the second semiconductor substrate are at a 45 ° angle.
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