CN117131552A - Chip operation method and device, electronic equipment and storage medium - Google Patents
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- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
- G06F21/76—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in application-specific integrated circuits [ASIC] or field-programmable devices, e.g. field-programmable gate arrays [FPGA] or programmable logic devices [PLD]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
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Abstract
The application provides a chip operation method, a chip operation device, electronic equipment and a storage medium. The method comprises the following steps: acquiring a first identifier from a one-time programmable memory of a chip and acquiring an initial license from a nonvolatile memory of the chip; decrypting the initial license to obtain a first hash value and decrypted data; performing verification processing through the first identifier, the first hash value and the decrypted data to obtain a target verification result; and if the target verification result is that the verification is passed, the chip is operated. According to the scheme, the license is stored through the nonvolatile memory supporting erasing, and the data used for verification in the license can be flexibly modified according to requirements, so that independent data used for verification can be added to each chip, and the security of the chip is improved.
Description
Technical Field
The present application relates to the field of semiconductors, and in particular, to a chip operation method, apparatus, electronic device, and storage medium.
Background
With the development of semiconductor technology, the functions of chip products are increasingly expanding, and chips perform different functions in a plurality of fields. In order to distinguish between different functions of the chip, chip data is written into the one-time programmable memory of the chip during chip production, the chip data comprises verification information and bit values, the verification information is used for verifying authenticity of the chip data, and the bit values are used for representing the functions of the chip.
In practical application, the data of the chips in the one-time programmable memory are determined and cannot be modified during production, the chips are produced in batches, verification information stored in the one-time programmable memory of the chips in the same batch is the same, and the chips in the same batch cannot be distinguished.
On the basis, when the chip is verified, the difficulty exists in verifying the authenticity of the chips in the same batch, and the safety of the chips is reduced.
Disclosure of Invention
The application provides a chip operation method, a chip operation device, electronic equipment and a storage medium, which are used for improving the safety of a chip.
In a first aspect, the present application provides a chip operation method, including: acquiring a first identifier from a one-time programmable memory of a chip and acquiring an initial license from a nonvolatile memory of the chip; decrypting the initial license to obtain a first hash value and decrypted data; performing verification processing through the first identifier, the first hash value and the decrypted data to obtain a target verification result; and if the target verification result is that the verification is passed, the chip is operated.
In one possible implementation, the decrypted data includes a second identification; and performing verification processing through the first identifier, the first hash value and the decrypted data to obtain a target verification result, wherein the verification processing comprises the following steps: performing a first verification process through the first hash value and the decrypted data to obtain a first verification result; if the first verification result is that verification passes, performing second verification processing through the first mark and the second mark to obtain a second verification result; and if the second checking result is checking passing, determining that the target checking result is checking passing.
In one possible implementation manner, performing a first verification process through the first hash value and the decrypted data to obtain a first verification result, where the first verification result includes: processing the decrypted data through a hash algorithm to obtain a second hash value corresponding to the decrypted data; if the first hash value is the same as the second hash value, the first check result is that the check is passed; and if the first hash value is different from the second hash value, the first check result is that the check is not passed.
In one possible implementation manner, performing a second check process through the first identifier and the second identifier to obtain a second check result, where the second check result includes: if the first identifier is the same as the second identifier, the second checking result is that the checking is passed; and if the first mark is different from the second mark, the second checking result is that the checking is not passed.
In one possible implementation, the decrypted data comprises a plurality of initial feature items; for any one of the initial feature items; running the chip, comprising: determining a bit value corresponding to the initial feature item; and if the bit value is 1, determining a function corresponding to the initial feature item, and running the function.
In one possible implementation manner, the decrypting the initial license to obtain the first hash value and the decrypted data includes: determining an asymmetric encryption algorithm public key; and decrypting the initial license through the asymmetric encryption algorithm public key to obtain a first hash value and decrypted data.
In one possible embodiment, the method further comprises: sending an initial license generation request to a server, wherein the initial license generation request comprises a first identification of the chip and a plurality of initial feature items of the chip; receiving an initial license sent by the server, wherein the initial license is generated by the server through encryption processing of the first identifier and the plurality of initial feature items by an asymmetric encryption algorithm private key; the initial license is burned into a non-volatile memory of the chip.
In one possible embodiment, the method further comprises: sending a license update request to a server, wherein the license update request comprises a first identification of the chip and a plurality of update feature items of the chip; receiving an update license sent by the server, wherein the update license is generated by the server according to the first identifier and the plurality of update feature items; the update license is burned into the non-volatile memory of the chip and the initial license is deleted.
In a second aspect, the present application provides a chip operating device, comprising: the acquisition module is used for acquiring a first identifier from a one-time programmable memory of the chip and acquiring an initial license from a nonvolatile memory of the chip; the decryption module is used for decrypting the initial license to obtain a first hash value and decrypted data; the verification module is used for performing verification processing through the first identifier, the first hash value and the decrypted data to obtain a target verification result; and the operation module is used for operating the chip if the target verification result is that the verification is passed.
In one possible implementation, the decrypted data includes a second identification; the verification module is specifically configured to perform a first verification process through the first hash value and the decrypted data to obtain a first verification result; the verification module is specifically further configured to perform a second verification process through the first identifier and the second identifier if the first verification result is that verification passes, so as to obtain a second verification result; the verification module is specifically further configured to determine that the target verification result is the verification pass if the second verification result is the verification pass.
In a possible implementation manner, the verification module is specifically configured to process the decrypted data through a hash algorithm to obtain a second hash value corresponding to the decrypted data; the verification module is specifically further configured to, if the first hash value is the same as the second hash value, determine that the first verification result is verification passing; the verification module is specifically further configured to, if the first hash value is different from the second hash value, determine that the first verification result is that verification is not passed.
In a possible implementation manner, the verification module is specifically configured to, if the first identifier is the same as the second identifier, determine that the second verification result is verification; the verification module is specifically further configured to, if the first identifier is different from the second identifier, determine that the second verification result is that verification is not passed.
In one possible implementation, the decrypted data comprises a plurality of initial feature items; for any one of the initial feature items; the apparatus further comprises: the determining module is used for determining a bit value corresponding to the initial characteristic item; and the determining module is further used for determining a function corresponding to the initial feature item and running the function if the bit value is 1.
In one possible embodiment, the apparatus further comprises: the algorithm module is used for determining an asymmetric encryption algorithm public key; the algorithm module is further configured to decrypt the initial license through the asymmetric encryption algorithm public key to obtain a first hash value and decrypted data.
In one possible embodiment, the apparatus further comprises: the generating module is used for sending an initial license generation request to the server, wherein the initial license generation request comprises a first identifier of the chip and a plurality of initial characteristic items of the chip; the generating module is further configured to receive an initial license sent by the server, where the initial license is generated by the server through encrypting the first identifier and the plurality of initial feature items by using an asymmetric encryption algorithm private key; the generating module is further configured to burn the initial license into a nonvolatile memory of the chip.
In one possible embodiment, the apparatus further comprises: an update module, configured to send a license update request to a server, where the license update request includes a first identifier of the chip and a plurality of update feature items of the chip; the updating module is further configured to receive an updating license sent by the server, where the updating license is generated by the server according to the first identifier and the plurality of updating feature items; the updating module is further configured to burn the updating license into the nonvolatile memory of the chip, and delete the initial license.
In a third aspect, the present application provides an electronic device comprising: a processor, and a memory communicatively coupled to the processor; the memory stores computer-executable instructions; the processor executes computer-executable instructions stored in the memory to implement the method of any one of the first aspects.
In a fourth aspect, the present application provides a computer-readable storage medium having stored therein computer-executable instructions for performing the method of any of the first aspects by a processor.
In a fifth aspect, the present application provides a computer program product comprising a computer program for execution by a processor of the method according to any one of the first aspects.
The application provides a chip operation method, a device, electronic equipment and a storage medium, which comprise the following steps: acquiring a first identifier from a one-time programmable memory of a chip and acquiring an initial license from a nonvolatile memory of the chip; decrypting the initial license to obtain a first hash value and decrypted data; performing verification processing through the first identifier, the first hash value and the decrypted data to obtain a target verification result; and if the target verification result is that the verification is passed, the chip is operated. According to the scheme, the license is stored through the nonvolatile memory supporting erasing, and the data used for verification in the license can be flexibly modified according to requirements, so that independent data used for verification can be added to each chip, and the security of the chip is improved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application.
Fig. 1 is a schematic diagram of an application scenario of a chip operation method according to an embodiment of the present application;
FIG. 2 is a schematic flow chart of a chip operation method according to an embodiment of the present application;
FIG. 3 is a schematic flow chart of a chip operation method according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a first verification provided in an embodiment of the present application;
FIG. 5 is a schematic diagram of a feature item provided in an embodiment of the present application;
FIG. 6 is a schematic diagram of a generated license according to an embodiment of the present application;
fig. 7 is a schematic structural diagram of a chip running device according to an embodiment of the present application;
fig. 8 is a schematic structural diagram of a chip running device according to an embodiment of the present application;
fig. 9 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Specific embodiments of the present application have been shown by way of the above drawings and will be described in more detail below. The drawings and the written description are not intended to limit the scope of the inventive concepts in any way, but rather to illustrate the inventive concepts to those skilled in the art by reference to the specific embodiments.
Detailed Description
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples do not represent all implementations consistent with the application. Rather, they are merely examples of apparatus and methods consistent with aspects of the application as detailed in the accompanying claims.
Fig. 1 is a schematic diagram of an application scenario of a chip operation method according to an embodiment of the present application, and is exemplified by combining the illustrated scenario: the equipment provided with the chip needs to check the authenticity of the chip when running the chip, and the chip is only run after the verification is passed, so that the condition that the forged chip influences the project is avoided.
The technical scheme of the present application and the technical scheme of the present application will be described in detail with specific examples. The following embodiments may be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments. In describing the present application, the terms should be construed broadly in the art unless explicitly stated and limited otherwise. Embodiments of the present application will be described below with reference to the accompanying drawings.
Fig. 2 is a flow chart of a chip operation method according to an embodiment of the present application, where the method includes the following steps:
s201, acquiring a first identifier from a one-time programmable memory of a chip, and acquiring an initial license from a nonvolatile memory of the chip.
As an example, the execution body of the embodiment may be a chip running device, and the implementation of the chip running device is various. For example, the program may be software, or a medium storing a related computer program, such as a usb disk; alternatively, the apparatus may be a physical device, such as a chip, a smart terminal, a computer, a server, etc., in which the relevant computer program is integrated or installed.
The chip is mounted in a device, and the device comprises a program capable of running the chip. The one-time programmable memory realizes the programming function by blowing fuses, which are already determined and cannot be modified at the time of chip production. The data in the nonvolatile memory supports erasing and writing, and the stored data can be flexibly modified.
It should be noted that the present application is not limited to a specific type of device.
Optionally, the first identifier is a unique identifier of the chip, and is determined at the time of chip production.
Still alternatively, the initial license may be modified as desired.
S202, decrypting the initial license to obtain a first hash value and decrypted data.
The first hash value and the decryption data are stored in an encrypted mode in the initial license, and the first hash value and the decryption data are generated by encrypting the server.
It can be appreciated that by encrypting the storage, the chip data is prevented from being stolen.
S203, performing verification processing through the first identifier, the first hash value and the decrypted data to obtain a target verification result.
The verification process is used for verifying whether the license corresponds to the chip or not and verifying whether the license is valid or not, and if the license corresponds to the chip and the license is valid, verification is passed.
Alternatively, the license may be reportedly updated, with the updated license replacing the old license.
S204, if the target verification result is that verification passes, the chip is operated.
For a scene example, if the target verification result is that verification passes, the chip can be operated on the premise of ensuring safety.
Optionally, if the verification is not passed, displaying a prompt message and closing the device.
The chip operation method provided by the embodiment of the application comprises the following steps: acquiring a first identifier from a one-time programmable memory of a chip and acquiring an initial license from a nonvolatile memory of the chip; decrypting the initial license to obtain a first hash value and decrypted data; performing verification processing through the first identifier, the first hash value and the decrypted data to obtain a target verification result; and if the target verification result is that the verification is passed, the chip is operated. According to the scheme, the license is stored through the nonvolatile memory supporting erasing, and the data used for verification in the license can be flexibly modified according to requirements, so that independent data used for verification can be added to each chip, and the security of the chip is improved.
On the basis of any of the above embodiments, a detailed process of the chip operation will be described below with reference to fig. 3.
Fig. 3 is a schematic flow chart of a chip operation method according to an embodiment of the present application. As shown in fig. 3, the method includes:
s301, acquiring a first identifier from a one-time programmable memory of a chip, and acquiring an initial license from a nonvolatile memory of the chip.
It should be noted that, the execution process of S301 is referred to S201, and will not be described herein.
S302, determining an asymmetric encryption algorithm public key.
The application encrypts through an asymmetric encryption algorithm.
By combining with a scene example, the encryption and decryption scene comprises equipment and a server, the encryption at the server side can be realized through two keys of an asymmetric encryption algorithm, and the decryption at the equipment side is realized.
S303, decrypting the initial license through the asymmetric encryption algorithm public key to obtain a first hash value and decrypted data.
The first hash value is generated for the server, and the server encrypts the first hash value and the decrypted data to obtain the license.
Optionally, the decrypted data includes an identification of the chip and an initial feature of the chip.
In combination with the scenario example, the chips include different functions, only a portion of the functions are supported for a particular chip, and the initial feature item includes the functions supported by the chip.
S304, performing first verification processing through the first hash value and the decrypted data to obtain a first verification result.
In combination with the scenario example, the verification process includes a first verification and a second verification, where the first verification is used to verify the validity of the decrypted data, and if the first verification passes, it indicates that the decrypted data is valid, and the next verification process is continued.
Specifically, in one possible implementation manner, the first verification process includes: processing the decrypted data through a hash algorithm to obtain a second hash value corresponding to the decrypted data; if the first hash value is the same as the second hash value, the first check result is that the check is passed; and if the first hash value is different from the second hash value, the first check result is that the check is not passed.
Next, the first verification will be described with reference to fig. 4.
Fig. 4 is a schematic diagram of a first verification provided in an embodiment of the present application. As shown in fig. 4, the first hash value is used to determine the validity of the decrypted data, the decrypted data cannot be directly compared with the first hash value, the decrypted data is first processed through a hash algorithm to obtain a second hash value, and a verification result is obtained through comparing the first hash value with the second hash value.
In combination with the scenario example, the first hash value is generated by the server side according to the decrypted data, the second hash value is generated by the device side according to the decrypted data, and if the first hash value is the same as the second hash value, it is indicated that the decrypted data of the device side is the same as the decrypted data of the server side.
In such a possible implementation manner, the hash value is obtained through the hash algorithm, and since the hash value is the unique value, the accuracy of the first check can be improved.
S305, performing second checking processing through the first identifier and the second identifier to obtain a second checking result.
Specifically, in one possible implementation manner, the second checking process includes: if the first identifier is the same as the second identifier, the second checking result is that the checking is passed; and if the first mark is different from the second mark, the second checking result is that the checking is not passed.
In combination with the scene example, the first identifier is obtained from the one-time programmable memory of the chip, the second identifier is obtained from the license, and if the first identifier is the same as the second identifier, the license is indicated to correspond to the chip, and the chip is indicated to be effective.
In such a possible implementation, the hash value is obtained by the hash algorithm, and since the hash value is a unique value, the accuracy of the second check can be improved.
S306, determining a bit value corresponding to the initial feature item.
For example, in combination with a scene, there are a plurality of initial feature items, each initial feature item corresponds to a function, each initial feature item corresponds to a bit value, and the bit value is used to indicate whether the chip supports the corresponding function.
The characteristic items are described below with reference to fig. 5.
Fig. 5 is a schematic diagram of a feature item provided in an embodiment of the present application. As shown in fig. 5, each feature item corresponds to a bit value and a function, wherein if the bit values of the feature item 1 and the feature item 3 are 1, the chip supports the corresponding function 1 and function 3, and if the ratio of the feature item 2 is 0, the chip does not support the corresponding function 2.
S307, if the bit value is 1, determining a function corresponding to the initial feature item, and running the function.
In combination with the scene example, a function corresponding to an initial feature item with a bit value of 1 is turned on by a module of the program control device, and a function corresponding to an initial feature item with a bit value of 0 is turned off. The run chip runs the functions supported by the chip.
The above scheme exemplifies the scheme of chip operation, and the generation license is exemplified next.
A possible implementation manner, the chip running method includes: sending an initial license generation request to a server, wherein the initial license generation request comprises a first identification of the chip and a plurality of initial feature items of the chip; receiving an initial license sent by the server, wherein the initial license is generated by the server through encryption processing of the first identifier and the plurality of initial feature items by an asymmetric encryption algorithm private key; the initial license is burned into a non-volatile memory of the chip.
Next, the generation license will be described with reference to fig. 6.
Fig. 6 is a schematic diagram of a generated license according to an embodiment of the present application. As shown in fig. 6, the authorizing means is used to acquire chip information, and the device sends a license generation request to the authorizing means. The authorization tool obtains a first identification of the chip and a plurality of initial feature items and sends the first identification and the initial feature items to the server. The server encrypts the first identifier and the plurality of initial feature items to obtain an initial license. Since the nonvolatile memory does not need to update the firmware, the initial license can be burned into the nonvolatile memory of the chip that has been produced by the authorization tool.
Alternatively, the first identifier may be an identifier such as a unique number of the chip, a unique number of the item, or a unique number of the user.
Based on the above embodiment, the license can be flexibly generated after the chip production is completed, the unique license which can be used for verifying the chip is generated according to the unique identifier of each chip, compared with the same verification information used by the chips in a unified batch, the independent verification can be carried out on each chip, and therefore the security of the chip is improved.
Further, in a possible implementation manner, the chip running method further includes: sending a license update request to a server, wherein the license update request comprises a first identification of the chip and a plurality of update feature items of the chip; receiving an update license sent by the server, wherein the update license is generated by the server according to the first identifier and the plurality of update feature items; the update license is burned into the non-volatile memory of the chip and the initial license is deleted.
In combination with the scenario example, if the chip needs to perform a function that is supported by the chip but is not included in the initial license, the license needs to be updated, a first identifier of the chip and a plurality of updated feature items are sent to the server, the server determines the identity of the device according to the first identifier, and the license is regenerated according to the updated feature items.
Optionally, the device sends a third identifier to the server, and generates the license according to the third identifier, where the third identifier is different from the first identifier.
In the feasible implementation mode, the functions specifically executed by the chip can be flexibly updated according to the application requirements through the flexible license, so that the efficiency of operating the chip is improved.
Fig. 7 is a schematic structural diagram of a chip running device according to an embodiment of the present application. As shown in fig. 7, the chip operating device 70 may include: an acquisition module 71, a decryption module 72, a verification module 73, and an operation module 74, wherein,
the acquiring module 71 is configured to acquire the first identifier from the one-time programmable memory of the chip, and acquire the initial license from the nonvolatile memory of the chip.
The decryption module 72 is configured to decrypt the initial license to obtain a first hash value and decrypted data.
The verification module 73 is configured to perform verification processing through the first identifier, the first hash value, and the decrypted data, to obtain a target verification result.
The operation module 74 is configured to operate the chip if the target verification result is that verification is passed.
Alternatively, the acquisition module 71 may perform S201 in the embodiment of fig. 2.
Alternatively, the decryption module 72 may perform S202 in the embodiment of fig. 2.
Alternatively, the verification module 73 may perform S203 in the embodiment of fig. 2.
Alternatively, the execution module 74 may execute S204 in the embodiment of fig. 2.
It should be noted that, the chip running device shown in the embodiment of the present application may execute the technical solution shown in the embodiment of the method, and its implementation principle and beneficial effects are similar, and will not be described herein again.
In one possible implementation, the decrypted data includes a second identification; the verification module 73 is specifically configured to:
performing a first verification process through the first hash value and the decrypted data to obtain a first verification result;
if the first verification result is that verification passes, performing second verification processing through the first mark and the second mark to obtain a second verification result;
and if the second checking result is checking passing, determining that the target checking result is checking passing.
In one possible implementation, the verification module 73 is specifically configured to:
processing the decrypted data through a hash algorithm to obtain a second hash value corresponding to the decrypted data;
if the first hash value is the same as the second hash value, the first check result is that the check is passed;
and if the first hash value is different from the second hash value, the first check result is that the check is not passed.
In one possible implementation, the verification module 73 is specifically configured to:
if the first identifier is the same as the second identifier, the second checking result is that the checking is passed;
and if the first mark is different from the second mark, the second checking result is that the checking is not passed.
Fig. 8 is a schematic structural diagram of a chip running device according to an embodiment of the present application. On the basis of the embodiment shown in fig. 7, as shown in fig. 8, the chip running apparatus 80 further includes: a determination module 75, an algorithm module 76, a generation module 77, and an update module 78, wherein:
the determining module 75 is configured to:
determining a bit value corresponding to the initial feature item;
and if the bit value is 1, determining a function corresponding to the initial feature item, and running the function.
The algorithm module 76 is configured to:
determining an asymmetric encryption algorithm public key;
and decrypting the initial license through the asymmetric encryption algorithm public key to obtain a first hash value and decrypted data.
The generating module 77 is configured to:
sending an initial license generation request to a server, wherein the initial license generation request comprises a first identification of the chip and a plurality of initial feature items of the chip;
receiving an initial license sent by the server, wherein the initial license is generated by the server through encryption processing of the first identifier and the plurality of initial feature items by an asymmetric encryption algorithm private key;
the initial license is burned into a non-volatile memory of the chip.
The update module 78 is configured to:
sending a license update request to a server, wherein the license update request comprises a first identification of the chip and a plurality of update feature items of the chip;
receiving an update license sent by the server, wherein the update license is generated by the server according to the first identifier and the plurality of update feature items;
the update license is burned into the non-volatile memory of the chip and the initial license is deleted.
Fig. 9 is a schematic structural diagram of an electronic device according to an embodiment of the present application, as shown in fig. 9, where the electronic device includes:
a processor 291, the electronic device further comprising a memory 292; a communication interface (Communication Interface) 293 and bus 294 may also be included. The processor 291, the memory 292, and the communication interface 293 may communicate with each other via the bus 294. Communication interface 293 may be used for information transfer. The processor 291 may call logic instructions in the memory 292 to perform the methods of the above-described embodiments.
Further, the logic instructions in memory 292 described above may be implemented in the form of software functional units and stored in a computer-readable storage medium when sold or used as a stand-alone product.
The memory 292 is a computer readable storage medium, and may be used to store a software program, a computer executable program, and program instructions/modules corresponding to the methods in the embodiments of the present application. The processor 291 executes functional applications and data processing by running software programs, instructions and modules stored in the memory 292, i.e., implements the methods of the method embodiments described above.
Memory 292 may include a storage program area that may store an operating system, at least one application program required for functionality, and a storage data area; the storage data area may store data created according to the use of the terminal device, etc. Further, memory 292 may include high-speed random access memory, and may also include non-volatile memory.
Embodiments of the present application provide a non-transitory computer-readable storage medium having stored therein computer-executable instructions that, when executed by a processor, are configured to implement a method as described in the previous embodiments.
The embodiment of the application also provides a computer program product, which comprises a computer program stored in a computer readable storage medium, wherein at least one processor can read the computer program from the computer readable storage medium, and the technical scheme of the chip running method in the embodiment can be realized when the at least one processor executes the computer program.
The embodiment of the application also provides a chip for running the instructions, wherein a computer program is stored on the chip, and when the computer program is executed by the chip, the chip runs the method.
Other embodiments of the application will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses, or adaptations of the application following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the application pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the application being indicated by the following claims.
It should be noted that, the user information (including but not limited to user equipment information, user personal information, etc.) and the data (including but not limited to data for analysis, stored data, presented data, etc.) related to the present application are information and data authorized by the user or fully authorized by each party, and the collection, use and processing of the related data need to comply with the related laws and regulations and standards of the related country and region, and provide corresponding operation entries for the user to select authorization or rejection.
It is to be understood that the application is not limited to the precise arrangements and instrumentalities shown in the drawings, which have been described above, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the application is limited only by the appended claims.
Claims (19)
1. A method of operating a chip, comprising:
acquiring a first identifier from a one-time programmable memory of a chip and acquiring an initial license from a nonvolatile memory of the chip;
decrypting the initial license to obtain a first hash value and decrypted data;
performing verification processing through the first identifier, the first hash value and the decrypted data to obtain a target verification result;
and if the target verification result is that the verification is passed, the chip is operated.
2. The method of claim 1, wherein the decrypted data comprises a second identification; and performing verification processing through the first identifier, the first hash value and the decrypted data to obtain a target verification result, wherein the verification processing comprises the following steps:
performing a first verification process through the first hash value and the decrypted data to obtain a first verification result;
if the first verification result is that verification passes, performing second verification processing through the first mark and the second mark to obtain a second verification result;
and if the second checking result is checking passing, determining that the target checking result is checking passing.
3. The method of claim 2, wherein performing a first verification process with the first hash value and the decrypted data to obtain a first verification result comprises:
processing the decrypted data through a hash algorithm to obtain a second hash value corresponding to the decrypted data;
if the first hash value is the same as the second hash value, the first check result is that the check is passed;
and if the first hash value is different from the second hash value, the first check result is that the check is not passed.
4. The method according to claim 2, wherein performing a second check-up process through the first identifier and the second identifier to obtain a second check-up result includes:
if the first identifier is the same as the second identifier, the second checking result is that the checking is passed;
and if the first mark is different from the second mark, the second checking result is that the checking is not passed.
5. The method according to any of claims 1-4, wherein the decrypted data comprises a plurality of initial feature items; for any one of the initial feature items; running the chip, comprising:
determining a bit value corresponding to the initial feature item;
and if the bit value is 1, determining a function corresponding to the initial feature item, and running the function.
6. The method according to any one of claims 1-5, wherein decrypting the initial license results in a first hash value and decrypted data, comprising:
determining an asymmetric encryption algorithm public key;
and decrypting the initial license through the asymmetric encryption algorithm public key to obtain a first hash value and decrypted data.
7. The method according to any one of claims 1-6, further comprising:
sending an initial license generation request to a server, wherein the initial license generation request comprises a first identification of the chip and a plurality of initial feature items of the chip;
receiving an initial license sent by the server, wherein the initial license is generated by the server through encryption processing of the first identifier and the plurality of initial feature items by an asymmetric encryption algorithm private key;
the initial license is burned into a non-volatile memory of the chip.
8. The method of claim 7, wherein the method further comprises:
sending a license update request to a server, wherein the license update request comprises a first identification of the chip and a plurality of update feature items of the chip;
receiving an update license sent by the server, wherein the update license is generated by the server according to the first identifier and the plurality of update feature items;
the update license is burned into the non-volatile memory of the chip and the initial license is deleted.
9. A chip operation device, comprising:
the acquisition module is used for acquiring a first identifier from a one-time programmable memory of the chip and acquiring an initial license from a nonvolatile memory of the chip;
the decryption module is used for decrypting the initial license to obtain a first hash value and decrypted data;
the verification module is used for performing verification processing through the first identifier, the first hash value and the decrypted data to obtain a target verification result;
and the operation module is used for operating the chip if the target verification result is that the verification is passed.
10. The apparatus of claim 9, wherein the decrypted data comprises a second identification;
the verification module is specifically configured to perform a first verification process through the first hash value and the decrypted data to obtain a first verification result;
the verification module is specifically further configured to perform a second verification process through the first identifier and the second identifier if the first verification result is that verification passes, so as to obtain a second verification result;
the verification module is specifically further configured to determine that the target verification result is the verification pass if the second verification result is the verification pass.
11. The apparatus of claim 10, wherein the device comprises a plurality of sensors,
the verification module is specifically configured to process the decrypted data through a hash algorithm to obtain a second hash value corresponding to the decrypted data;
the verification module is specifically further configured to, if the first hash value is the same as the second hash value, determine that the first verification result is verification passing;
the verification module is specifically further configured to, if the first hash value is different from the second hash value, determine that the first verification result is that verification is not passed.
12. The apparatus of claim 10, wherein the device comprises a plurality of sensors,
the verification module is specifically configured to, if the first identifier is the same as the second identifier, pass the second verification result;
the verification module is specifically further configured to, if the first identifier is different from the second identifier, determine that the second verification result is that verification is not passed.
13. The apparatus according to any of claims 9-12, wherein the decrypted data comprises a plurality of initial feature items; for any one of the initial feature items; the apparatus further comprises:
the determining module is used for determining a bit value corresponding to the initial characteristic item;
and the determining module is further used for determining a function corresponding to the initial feature item and running the function if the bit value is 1.
14. The apparatus according to any one of claims 9-13, wherein the apparatus further comprises:
the algorithm module is used for determining an asymmetric encryption algorithm public key;
the algorithm module is further configured to decrypt the initial license through the asymmetric encryption algorithm public key to obtain a first hash value and decrypted data.
15. The apparatus according to any one of claims 9-14, wherein the apparatus further comprises:
the generating module is used for sending an initial license generation request to the server, wherein the initial license generation request comprises a first identifier of the chip and a plurality of initial characteristic items of the chip;
the generating module is further configured to receive an initial license sent by the server, where the initial license is generated by the server through encrypting the first identifier and the plurality of initial feature items by using an asymmetric encryption algorithm private key;
the generating module is further configured to burn the initial license into a nonvolatile memory of the chip.
16. The apparatus of claim 15, wherein the apparatus further comprises:
an update module, configured to send a license update request to a server, where the license update request includes a first identifier of the chip and a plurality of update feature items of the chip;
the updating module is further configured to receive an updating license sent by the server, where the updating license is generated by the server according to the first identifier and the plurality of updating feature items;
the updating module is further configured to burn the updating license into the nonvolatile memory of the chip, and delete the initial license.
17. An electronic device, comprising: a processor, and a memory communicatively coupled to the processor;
the memory stores computer-executable instructions;
the processor executes computer-executable instructions stored in the memory to implement the method of any one of claims 1-8.
18. A computer readable storage medium having stored therein computer executable instructions which when executed by a processor are adapted to carry out the method of any one of claims 1-8.
19. A computer program product comprising a computer program which, when executed by a processor, implements the method of any of claims 1-8.
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| CN202311097848.6A CN117131552A (en) | 2023-08-28 | 2023-08-28 | Chip operation method and device, electronic equipment and storage medium |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117540439A (en) * | 2024-01-10 | 2024-02-09 | 深圳市一恒科电子科技有限公司 | Method and device for automatically authorizing number writing of equipment, storage medium and electronic equipment |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117540439A (en) * | 2024-01-10 | 2024-02-09 | 深圳市一恒科电子科技有限公司 | Method and device for automatically authorizing number writing of equipment, storage medium and electronic equipment |
| CN117540439B (en) * | 2024-01-10 | 2024-04-19 | 深圳市一恒科电子科技有限公司 | Method and device for automatically authorizing number writing of equipment, storage medium and electronic equipment |
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