CN117056982A - Multi-machine data signing verification method, system and storage medium - Google Patents

Multi-machine data signing verification method, system and storage medium Download PDF

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Publication number
CN117056982A
CN117056982A CN202311092831.1A CN202311092831A CN117056982A CN 117056982 A CN117056982 A CN 117056982A CN 202311092831 A CN202311092831 A CN 202311092831A CN 117056982 A CN117056982 A CN 117056982A
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firmware
public key
data
slave
hash value
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CN117056982B (en
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汤彩芸
冯春阳
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Guangzhou Guangdong Hong Kong Macao Greater Bay Area Frontier Innovation Technology Research Institute
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Guangzhou Guangdong Hong Kong Macao Greater Bay Area Frontier Innovation Technology Research Institute
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60—Protecting data
    • G06F21/64—Protecting data integrity, e.g. using checksums, certificates or signatures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60—Protecting data
    • G06F21/602—Providing cryptographic facilities or services

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  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Health & Medical Sciences (AREA)
  • Bioethics (AREA)
  • General Health & Medical Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)

Abstract

The invention provides a multi-machine data signing verification method, a system and a storage medium, which are suitable for a host, wherein the multi-machine data signing verification method comprises the following steps: reading a public key from the flash memory, wherein the public key comprises a firmware trust root public key, and verifying the validity of the firmware public key according to a pre-stored first hash value and the firmware trust root public key; when the firmware public key is valid, the firmware public key and a first digital signature of the firmware public key are read from the flash memory, and the validity of the firmware is verified according to the firmware public key and the first digital signature; when the firmware is valid, reading the firmware data and a second digital signature of the firmware data from the flash memory, and calculating a second hash value of the firmware data; acquiring a first data packet from the flash memory, and transmitting the first data packet to the slave machine so that the slave machine performs signature verification on the received second data packet according to the second hash value and the second digital signature; the invention can improve the safety of multi-machine transmission.

Description

Multi-machine data signing verification method, system and storage medium
Technical Field
The present invention relates to the field of multi-machine data transmission technologies, and in particular, to a multi-machine data signing method, system and storage medium.
Background
In the prior art for implementing data transmission by multiple computers, the factors such as cost are generally considered to be that code data is stored in a flash memory and other media externally loaded on a host computer, so that the host computer can directly read the code data from the flash memory, and the code data of a slave computer needs to be forwarded by the host computer.
Disclosure of Invention
The invention aims to overcome the defects in the prior art, and provides a multi-machine data signing method, a multi-machine data signing system and a storage medium, which can improve the security of multi-machine transmission.
In a first aspect, the present invention provides a method for checking labels with multiple sets of data, including: the multi-machine data signing verification method comprises the following steps:
reading a public key from a flash memory, wherein the public key comprises a firmware trust root public key, and verifying the validity of the firmware public key according to a pre-stored first hash value and the firmware trust root public key;
when the firmware public key is valid, reading the firmware public key and a first digital signature of the firmware public key from the flash memory, and verifying the validity of the firmware according to the firmware public key and the first digital signature;
When the firmware is valid, reading the firmware data and a second digital signature of the firmware data from the flash memory, and calculating a second hash value of the firmware data;
and acquiring a first data packet from the flash memory, and transmitting the first data packet to a slave machine so that the slave machine performs signature verification on the received second data packet according to the second hash value and the second digital signature.
The invention adopts the first verification of the public key of the root of trust of the firmware to verify the validity of the public key of the firmware, and on the basis of the validity of the public key of the firmware, the validity of the firmware is verified, if the firmware is valid, the verified data packet is transmitted to the slave, in the process, the host respectively carries out twice verification of the public key of the firmware and the firmware, the validity of the data packet received by the host can be enhanced, and the data packet obtained after the twice verification process is transmitted to the slave, so that the slave can carry out the third verification of the received data packet, the validity of the data packet received by the slave can be enhanced, and the verification flow is respectively added in the process of transmitting the data between the host and the slave, thereby improving the correctness and the safety of the data transmission of the master and the slave, and preventing the attacker from stealing and effectively defending illegal attacks on the data transmitted by the master and the slave.
Further, the secondary machine performs signature verification on the received second data packet according to the second hash value and the second digital signature, and the method comprises the following steps:
decrypting the second digital signature according to an asymmetric algorithm to obtain first abstract information of the firmware data, and if the first abstract information is consistent with the second hash value, successfully signing the second data packet; wherein, the number of the slaves is at least 1.
The invention adopts the additional signature verification process at the slave to ensure the correctness of the data received by the slave, can prevent an attacker from embezzling the data transmitted by the slave and effectively resist illegal attacks, and ensures that the slave executes corresponding operation according to the received transmission data, thereby ensuring the safety of data transmission between the host and the slave.
Further, if the first digest information is consistent with the second hash value, the method further includes:
if the first abstract information is inconsistent with the second hash value, resetting a first state register and notifying a baseboard management controller of signature verification failure.
Further, before the reading the public key from the flash memory includes the firmware trust root public key, the method further includes: the host computer is initialized, specifically:
Receiving an initialization event subscribed from a C2C module, and performing initialization operation according to the initialization event; wherein the C2C module is formed by I 2 And C channel realization, and subscribing the initialization event to a system by the host through the C2C module.
Further, the method further comprises the following steps: forwarding the initialization event to a slave so that the slave initializes according to the initialization event, specifically:
receiving an initialization event sent by a C2C module, performing self initialization operation, and receiving the root of the C2C moduleAccording to I 2 C, driving a first sending command and a first receiving command sent by the transmission command;
sending a first command of the initialization event to the slave according to the first sending command so as to acquire the state of the slave fed back after the slave executes the received first command;
and when receiving the slave state fed back by the slave, unsubscribing an initialization event according to the slave state.
According to the invention, the host and the slave are initialized before public key verification, so that the consistency of the public parameters corresponding to the host and the slave and the system can be ensured, the state of the host and the slave is ensured to be consistent when the host and the slave carry out data signature verification, and the signature verification is not interrupted due to accidents; and the C2C module can facilitate data interaction in the initialization process of the master and slave computers, and compared with the prior art that the initialization is carried out through interruption and the command is sent to the slave computers through interruption of a host computer, the initialization efficiency can be improved, whether received data are correct or not is not fed back to the host computer through an interruption mechanism, and further the complexity of hardware implementation and the hardware cost can be reduced.
Further, the verifying the validity of the firmware public key according to the pre-stored first hash value and the firmware trust root public key includes:
and carrying out hash calculation on the first data containing the firmware trust root public key to obtain a third hash value, and when the third hash value is consistent with the pre-stored first hash value, enabling the firmware public key to be effective.
Further, the verifying the validity of the firmware according to the firmware public key and the first digital signature includes:
performing hash calculation on the second data containing the firmware public key to obtain a fourth hash value, decrypting the first digital signature according to an asymmetric algorithm to obtain second abstract information of the firmware public key, and enabling the firmware to be effective when the fourth hash value is consistent with the second abstract information; otherwise, the firmware is not valid.
Still further, before said transmitting said first data packet to the slave, further comprises:
unpacking the first data packet to obtain code data and a check code, and packing the obtained check data and the check code after checking and correcting the code data according to the check code so as to transmit the packed first data packet to the slave.
In a second aspect, the present invention further provides a multi-machine data signing system, including:
the firmware trust root public key verification module is used for reading the public key comprising the firmware trust root public key from the flash memory and verifying the validity of the firmware public key according to the pre-stored first hash value and the firmware trust root public key;
the firmware public key verification module is used for reading the firmware public key and the first digital signature of the firmware public key from the flash memory when the firmware public key is valid, and verifying the validity of the firmware according to the firmware public key and the first digital signature;
the firmware data verification module is used for reading the firmware data and the second digital signature of the firmware data from the flash memory and calculating a second hash value of the firmware data when the firmware is valid;
and the data packet signature verification module is used for acquiring a first data packet from the flash memory and transmitting the first data packet to a slave machine so that the slave machine can verify the signature of the received second data packet according to the second hash value and the second digital signature.
In a third aspect, the present invention also provides a computer-readable storage medium comprising: the computer readable storage medium includes a stored computer program; wherein the device in which the computer readable storage medium is controlled to execute the multi-machine data signing method according to the first aspect when the computer program runs.
The multi-machine data signing verification method can be applied to specific computer equipment or terminal equipment through the multi-machine data signing verification computer readable storage medium, can process multi-machine data signing verification of different structures, and can process more complex multi-machine data signing verification scenes, so that the efficiency of large-scale multi-machine data signing verification is further improved, and the method has higher applicability.
Drawings
FIG. 1 is a schematic diagram of a master-slave interconnection provided by an embodiment of the present invention;
FIG. 2 is a schematic flow chart of multi-machine initialization according to an embodiment of the present invention;
FIG. 3 is a schematic flow chart of a multi-machine data signing method according to the present invention;
FIG. 4 is a schematic diagram of a data flow of a multi-machine data tag according to an embodiment of the present invention;
fig. 5 is a complete flow diagram of a multi-machine data signing verification based on a power architecture according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a multi-machine data signing system according to the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be noted that, the interconnection of the master and slave machines includes: first pass through I 2 C bus carries out communication, carries out high-speed interconnection after that, specifically does: the master machine and the slave machine pass through I 2 C bus interface interconnects, and I2C bus dock after, master slave machine can communicate, includes: the host computer sends a command to the slave computer to acquire the information of the slave computer or send a data packet to the slave computer, and the slave computer executes corresponding operation according to the received command or the data packet. Then, PCIE (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) initialization is performed, and a high-speed interconnection based on CCIX (Cache Coherent Interconnect for Accelerators, cache coherent interconnection protocol for accelerator) -PCIE is entered.
In a preferred embodiment, in said slaveBefore the reading of the public key in the flash memory comprises the firmware trust root public key, the method comprises the following steps: the host computer is initialized, specifically: receiving an initialization event subscribed from a C2C module, and performing initialization operation according to the initialization event; wherein the C2C module is formed by I 2 And C channel realization, and subscribing the initialization event to a system by the host through the C2C module.
In a preferred embodiment, before said reading the public key from the flash memory includes the firmware trust root public key, further comprising: forwarding the initialization event to a slave so that the slave initializes according to the initialization event, specifically: receiving an initialization event sent by a C2C module, performing self initialization operation, and receiving the I of the C2C module 2 C, driving a first sending command and a first receiving command sent by the transmission command; sending a first command of the initialization event to the slave according to the first sending command so as to acquire the state of the slave fed back after the slave executes the received first command; and when receiving the slave state fed back by the slave, unsubscribing an initialization event according to the slave state.
According to the invention, the host and the slave are initialized before public key verification, so that the consistency of the public parameters corresponding to the host and the slave and the system can be ensured, the state of the host and the slave is ensured to be consistent when the host and the slave carry out data signature verification, and the signature verification is not interrupted due to accidents; and the C2C module can facilitate data interaction in the initialization process of the master and slave computers, and compared with the prior art that the initialization is carried out through interruption and the command is sent to the slave computers through interruption of a host computer, the initialization efficiency can be improved, whether received data are correct or not is not fed back to the host computer through an interruption mechanism, and further the complexity of hardware implementation and the hardware cost can be reduced.
First, referring to fig. 1, a schematic diagram of master-slave interconnection provided in an embodiment of the present invention is shown. The master (master) and the slave (slave) first pass through I 2 The C bus communicates and then interconnects at high speed via CCIX-PCIE. Wherein, through the arranged C2C (Chip to Chip) module, the high-speed communication of the interconnection of the master and slave machines is establishedAnd (5) information. And the master-slave machine interconnection is established, so that the master-slave machine signature verification is convenient to realize.
In a preferred embodiment, the method comprises the steps of 2 C2C module is established to C bus for communication between master and slave, C2C module mainly utilizes I2C channel to realize interconnection between master and slave, then utilizes I 2 And C, transmitting a command to realize interconnection of the CCIX-PCIE. In other words, the C2C module is located between the master and the slave, and the data is acquired from the C2C module by the host and forwarded to the slave.
In a preferred embodiment, according to a C2C module of a pre-subscribed event, a host receives the subscribed event according to the C2C module and forwards the subscribed event to a slave, so that the slave performs an initialization operation according to the subscribed event; wherein the subscription event is automatically triggered when system time occurs. The subscription event includes: PCIE power-up, PCIE PHY (Physical Layer) initialization, PCIE-CCIX configuration, PCIE Controller (Controller) initialization, CMN configuration, clock synchronization, and the like.
In a preferred embodiment, after the slave completes the initialized subscription event, the C2C module may cancel the subscription of the corresponding initialization command. After the slaves are initialized, the master reads the slave information of each slave so as to confirm the number of the slaves which are connected and started and the ID of the slaves.
In a preferred embodiment, the communication process specifically sets a subscription manner, that is, subscribes to system events (such as clock changes) that need to be focused on in the C2C module, and the like. When a system event occurs (e.g., a clock frequency change), the event is handled in the C2C module. Taking clock frequency change as an example, a system clock message is subscribed in the C2C module, when the system clock is changed, the C2C module is notified, the C2C module receives notification of clock change, and then the C2C processes the event, including judging whether a slave exists, if the slave exists, the master enters a multi-machine initialization flow (initialization for the current clock), otherwise, the master self-initializes.
It should be noted that, the host not only receives the initialization event from the C2C module, but also includes: on PCIESubscription events such as electricity and clock synchronization are carried out through the receiving C2C module according to I 2 And after the command is sent by the C-driven transmission command, the command is sent to remind the host of sending the command corresponding to the subscription event to the slave, the command is received to tell the host which information should be acquired to the slave, in the first embodiment, the command is accepted to indicate that the host acquires the state of the slave to the slave, and the command is sent to indicate that the host sends the command to the slave.
Fig. 2 is a schematic flow chart of multi-machine initialization according to an embodiment of the present invention. In the figure, the host receives a series of commands required for initializing multi-machine interconnection, including PCIE power-up, PCIE phy initialization, PCIE-CCIX configuration, PCIE controller initialization, CMN configuration, clock synchronization, and the like. The commands to be processed indicate whether the commands are to be run on the slave, if so, the corresponding commands are sent to the slave, the slave processes the corresponding commands, and when the slave processes the corresponding commands, the slave returns to the processing state of the current commands of the host. It should be noted that, the processing command in the C2C is not processed by the present module, but automatically jumps to the corresponding module, and the processing in the own module includes: PCIE, CMN, clock, etc. When some operations which only need to be completed in the initialization are completed, the subscription can be canceled in the C2C module, namely, when the master-slave machine is started, the messages are not needed to be received any more. And if other notifications, such as I 2 C by calling I 2 The driving of the C module realizes the transmission of commands.
Specifically, in the process of initializing a master-slave machine, after a C2C module subscribes to a system event, when the system sends a notification, the C2C module classifies and processes the message according to a message class processing system; wherein the subscription event is automatically triggered when system time occurs. The subscription event includes: PCIE power-up, PCIE PHY initialization, PCIE-CCIX configuration, PCIE controller initialization, CMN configuration, clock synchronization, and the like.
When the notification is a subscription event, the C2C module transmits the subscription event to the host, when the host judges that the slave exists, the command which needs to be operated by the slave is marked for the subscription event, the corresponding command is sequentially sent to the slave according to the marking, the slave in a waiting state receives the command issued by the host, after the operation is executed according to the command, the state of the slave is fed back to the host, and after the state of the slave is received by the host, the host unsubscribes from the subscription event corresponding to the initialization stage; if the host judges that the slave does not exist, the host initializes the single machine according to the received subscription event.
When the notification is that the command is received, the host needs to acquire the slave state, and the host issues the command to the slave so that the slave feeds back the slave state, and the received command can be a command issued independently and received by the host or issued to the host simultaneously with the subscription event so as to prompt the host to acquire the slave state after executing the subscription event from the slave in time.
When the notification is a sending command, the host needs to send the command to the slave so that the slave adds the received command to a queue to be processed for processing. The sending command can be issued independently or simultaneously with the subscription event and the receiving command to the host, so that the host issues a command corresponding to the subscription event to the slave according to the sending command, and the slave feeds back the state of the slave according to the receiving command received by the host.
According to the invention, the host and the slave are initialized before public key verification, so that the consistency of the public parameters corresponding to the host and the slave and the system can be ensured, the state of the host and the slave is ensured to be consistent when the host and the slave carry out data signature verification, and the signature verification is not interrupted due to accidents; and the C2C module can facilitate data interaction in the initialization process of the master and slave computers, and compared with the prior art that the initialization is carried out through interruption and the command is sent to the slave computers through interruption of a host computer, the initialization efficiency can be improved, whether received data are correct or not is not fed back to the host computer through an interruption mechanism, and further the complexity of hardware implementation and the hardware cost can be reduced.
It should be noted that, in order to ensure the security of data transmission of the master-slave machine, the technical concept of signature verification in the invention is to perform signature verification while data transmission so as to ensure the security of data transmission. The verification process comprises three times of verification, namely verifying the validity of the public key of the firmware through the public key of the root of trust of the firmware, verifying the validity of the public key of the firmware according to the public key of the root of trust of the firmware when the public key of the root of trust of the firmware is valid, verifying the validity of the firmware according to the public key of the firmware when the public key of the firmware is valid, and verifying the validity of the data of the firmware; wherein the first two verifications are performed at the master and the third verification is performed at the slave.
When verifying the validity of the firmware trust root public key, carrying out Hash (Hash) calculation on data containing the firmware trust root public key to obtain a corresponding Hash value, comparing the obtained Hash value with a Hash value prestored by the firmware trust root public key, and if the two values are consistent, indicating that the firmware trust root public key is valid, so as to verify the validity of the firmware public key; if not, entering a process for processing the error includes: sets a status register and informs the baseboard management controller (Baseboard Management Controlle, BMC).
When verifying the validity of the firmware public key, performing Hash calculation on data containing the firmware public key to obtain a corresponding Hash value, performing decryption calculation on a digital signature corresponding to the firmware public key to obtain original abstract information of the firmware public key, comparing the obtained Hash value with the abstract information, and if the two values are consistent, indicating that the firmware public key is valid so as to verify the validity of key data; if not, the process of processing the error is also required to be entered, including: the status register is set and the BMC is notified.
Reading a public key from a flash memory to verify the firmware data, wherein the public key comprises a firmware trust root public key, when the validity information of the firmware public key is verified according to a pre-stored first Hash value and the firmware trust root public key, carrying out Hash calculation on the firmware data to obtain a corresponding Hash value, carrying out decryption operation on a digital signature corresponding to the firmware data to obtain original abstract information of the firmware data, comparing the obtained Hash value with the abstract information, and if the two values are consistent, indicating that the firmware public key is valid, and jumping a ROM program to an initial address for executing the firmware data; if not, the process of processing the error is also required to be entered, including: the status register is set and the BMC is notified.
In a preferred embodiment, the Hash calculation process needs to call the master-slave machine to call the corresponding Jiayu module to calculate, and the firmware trust root public key, the firmware public key and the firmware data, and the corresponding digital signatures are stored in the flash memory, and the ROM program needs to read and verify the next time after each verification pass.
In the third embodiment, based on the three verification process proposed by the present invention, signature verification is performed in the process of master-slave data transmission, referring to fig. 3, which is a flow chart of the multi-machine data signature verification method proposed by the present invention, including steps S11 to S14, specifically:
step S11, reading the public key from the flash memory, wherein the public key comprises a firmware trust root public key, and verifying the validity of the firmware public key according to a pre-stored first hash value and the firmware trust root public key.
Verifying the validity of the firmware public key according to a pre-stored first hash value and the firmware trust root public key, comprising: and carrying out hash calculation on the first data containing the firmware trust root public key to obtain a third hash value, and when the third hash value is consistent with the pre-stored first hash value, enabling the firmware public key to be effective.
And when the third hash value is inconsistent with the pre-stored first hash value, the firmware public key is invalid, the second state register is reset, and the baseboard management controller is informed of signature verification failure.
In a preferred embodiment, there are only 1 baseboard management controller no matter how many chips are interconnected, so if master-slave verification fails, a notification needs to be sent to baseboard management controller.
And step S12, when the firmware public key is valid, reading the firmware public key and a first digital signature of the firmware public key from the flash memory, and verifying the validity of the firmware according to the firmware public key and the first digital signature.
Verifying the validity of the firmware according to the firmware public key and the first digital signature, comprising: performing hash calculation on the second data containing the firmware public key to obtain a fourth hash value, decrypting the first digital signature according to an asymmetric algorithm to obtain second abstract information of the firmware public key, and enabling the firmware to be effective when the fourth hash value is consistent with the second abstract information; otherwise, the firmware is not valid. And when the firmware is invalid, resetting the second state register and informing the baseboard management controller of signature verification failure.
And step S13, when the firmware is valid, reading the firmware data and a second digital signature of the firmware data from the flash memory, and calculating a second hash value of the firmware data.
And S14, acquiring a first data packet from the flash memory, and transmitting the first data packet to a slave machine so that the slave machine performs signature verification on the received second data packet according to the second hash value and the second digital signature.
Before the first data packet is transmitted to the slave, the method further comprises: unpacking the first data packet to obtain code data and a check code, and packing the obtained check data and the check code after checking and correcting the code data according to the check code so as to transmit the packed first data packet to the slave.
Decrypting the second digital signature according to an asymmetric algorithm to obtain first abstract information of the firmware data, and if the first abstract information is consistent with the second hash value, successfully signing the second data packet; wherein, the number of the slaves is at least 1.
If the first digest information is consistent with the second hash value, further including: if the first abstract information is inconsistent with the second hash value, resetting a first state register and notifying a baseboard management controller of signature verification failure.
The invention adopts the first verification of the public key of the root of trust of the firmware to verify the validity of the public key of the firmware, and on the basis of the validity of the public key of the firmware, the validity of the firmware is verified, if the firmware is valid, the verified data packet is transmitted to the slave, in the process, the host respectively carries out twice verification of the public key of the firmware and the firmware, the validity of the data packet received by the host can be enhanced, and the data packet obtained after the twice verification process is transmitted to the slave, so that the slave can carry out the third verification of the received data packet, the validity of the data packet received by the slave can be enhanced, and the verification flow is respectively added in the process of transmitting the data between the host and the slave, thereby improving the correctness and the safety of the data transmission of the master and the slave, and preventing the attacker from stealing and effectively defending illegal attacks on the data transmitted by the master and the slave.
In a fourth embodiment, refer to fig. 4, which is a schematic diagram of a data flow of a multi-machine data signature according to an embodiment of the present invention. The figure comprises a flash memory, a host and a slave, wherein main data interaction comprises two processes of information interaction between the host and the flash memory and information interaction between the host and the slave. Firstly, loading a firmware trust root public key and data corresponding to the firmware trust root from a flash memory by a host, carrying out hash calculation on the data containing the firmware trust root public key in the host to obtain a third hash value, comparing the third hash value with a pre-stored first hash value, and reading the firmware public key and a first digital signature corresponding to the firmware public key from the flash memory when the two values are consistent to each other to indicate that the firmware public key is effective.
In a preferred embodiment, the firmware trust root public key and corresponding data structure, comprises: the standard format of the X.509 public key infrastructure, X.509 certificates are mainly used for identifying the identity in Internet communication and computer networks, and the protection data transmission security is stored in a flash memory.
In a preferred embodiment, the ROM program reads the firmware trust root and corresponding data structure from the flash memory to the on-chip memory area, and the ROM program also reads the firmware public key and corresponding first digital signature from the flash memory to the on-chip memory area.
In a preferred embodiment, the storage areas of both the master and the slave are SRAM (Static Random-Access Memory).
In a preferred embodiment, the host performs hash computation by calling the Jiayu module, which is an Arm hardware encryption and decryption engine, and the operations that can be performed include: hash calculation and encryption and decryption operations. The method comprises the steps that the Jiayu hardware modules are mounted on AXI buses of a host side and a slave side, so that a CPU of a master-slave machine accesses the Jiayu hardware modules of each side through the AXI buses and then carries out hash calculation.
In a preferred embodiment, the algorithm of hash calculation comprises: SM3 algorithm and SHA256 algorithm.
In a preferred embodiment, the pre-stored first hash value is stored in an OTP (One Time Programmable Storage, one-time programmable storage) in the Jiayu module, and after the first hash value is stored in the OTP, the data in the OTP cannot be modified, so that the security of the first hash value can be ensured.
And under the condition that the public key of the firmware is effective, the host computer carries out hash calculation on the data containing the public key of the firmware to obtain a fourth hash value, decrypts the first digital signature to obtain second abstract information, compares the fourth hash value with the second abstract, and indicates that the firmware is effective when the two values are consistent.
In a preferred embodiment, the hash computation is also performed by the host invoking the Jiayu module.
In a preferred embodiment, the decryption algorithm comprises: SM2 algorithm and RSA2048 algorithm.
And under the condition that the firmware is effective, reading the firmware data and a second digital signature corresponding to the firmware data from the flash memory, and carrying out hash calculation on the firmware data to obtain a second hash value. At this time, the host computer performs data interaction with the slave computer, mainly the host computer obtains the online condition of the slave computers from a plurality of slave computers which are interconnected, and obtains the information of the slave computers, so that the host computer sends the first data packet obtained from the flash memory to the slave computers after verification. After the information of the slave is obtained, the host acquires the code data and the first data packet packed by the check code from the flash memory, unpacks the first data packet to obtain the code data and the check code, checks the check data according to the check code, corrects errors to obtain check data passing the check, stores the check data and the corresponding check code, acquires the stored check data and the check code, and packs the check data and the check code again to be sent to the slave.
In a preferred embodiment, the second hash value is also obtained by reading the firmware data and the corresponding second digital signature from the flash memory by the ROM program into a memory area within the chip, and invoking the corresponding Jiayu module by the host for hash computation.
In a preferred embodiment, the firmware data is a firmware portion in the on-chip memory area and running on the Cortex-M7 processor, or a firmware portion running on the power p8 chip, or other processor, without limitation; if Cortex-M7 is used, two Cortex-M7 processors are required for each chip (chip).
In a preferred embodiment, the host needs to confirm the number of interconnected and started slaves and the IDs of the slaves, and read the information of the slaves of the interconnected slaves, so that the data packet can be conveniently sent to the slaves for signature verification by acquiring the information of the slaves in advance.
In a preferred embodiment, the host computer QSPI (Queued SPI) obtains the first data packet in the flash memory, checks the code data of the first data, stores the obtained check data and check code in the memory area, and invokes the C2C module, i.e. through I between chips 2 C bus interconnects the chip, and the host computer takes out the check data and check code package from the memory area and transmits to the slave computer.
In a preferred embodiment, after obtaining the second data packet sent by the host, the slave decrypts the second digital signature to obtain the first digest information, and if the first digest information is consistent with the second hash value, the slave signs the second data packet successfully.
In a preferred embodiment, when there are a plurality of slaves, each slave invokes a corresponding Jiayu module to asymmetrically decrypt the second digital signature to obtain the first summary information of the firmware original, and if each slave obtains that the corresponding first summary information is consistent with the second hash value, it indicates that the second data packet is successfully carried.
In a preferred embodiment, if the firmware public key is invalid, the firmware is invalid, or the first digest information is inconsistent with the second hash value, the corresponding status register needs to be reset and the corresponding BMC needs to be notified.
The invention adopts the first verification of the public key of the root of trust of the firmware to verify the validity of the public key of the firmware, and on the basis of the validity of the public key of the firmware, the validity of the firmware is verified, if the firmware is valid, the verified data packet is transmitted to the slave, in the process, the host respectively carries out twice verification of the public key of the firmware and the firmware, the validity of the data packet received by the host can be enhanced, and the data packet obtained after the twice verification process is transmitted to the slave, so that the slave can carry out the third verification of the received data packet, the validity of the data packet received by the slave can be enhanced, and the verification flow is respectively added in the process of transmitting the data between the host and the slave, thereby improving the correctness and the safety of the data transmission of the master and the slave, and preventing the attacker from stealing and effectively defending illegal attacks on the data transmitted by the master and the slave.
In a fifth embodiment, referring to fig. 5, a complete flow diagram of multi-machine data signing on the basis of the power architecture according to the embodiment of the present invention is provided, where a master-slave machine is initialized, and then multi-machine data signing is performed.
In the initialization process of the master-slave machine, after the C2C module subscribes to a system event, when the system sends a notification, the C2C module classifies and processes the message according to the message class processing system; wherein the subscription event is automatically triggered when system time occurs. The subscription event includes: PCIE power-up, PCIE PHY initialization, PCIE-CCIX configuration, PCIE controller initialization, CMN configuration, clock synchronization, and the like.
When the notification is a subscription event, the C2C module transmits the subscription event to the host, when the host judges that the slave exists, the command which needs to be operated by the slave is marked for the subscription event, the corresponding command is sequentially sent to the slave according to the marking, the slave in a waiting state receives the command issued by the host, after the operation is executed according to the command, the state of the slave is fed back to the host, and after the state of the slave is received by the host, the host unsubscribes from the subscription event corresponding to the initialization stage; if the host judges that the slave does not exist, the host initializes the single machine according to the received subscription event.
Since fig. 5 is too large, the processing procedure when the notification is a received command and when the notification is a received command is omitted herein, in fact, when the notification is a received command, the host needs to acquire the slave state, and the host issues a command to the slave so that the slave feeds back the slave state, and the received command may be a command issued separately and received by the host, or may be issued to the host simultaneously with the subscription event, so as to prompt the host to acquire the slave state after executing the subscription event from the slave in time. When the notification is a sending command, the host needs to send the command to the slave so that the slave adds the received command to a queue to be processed for processing. The sending command can be issued independently or simultaneously with the subscription event and the receiving command to the host, so that the host issues a command corresponding to the subscription event to the slave according to the sending command, and the slave feeds back the state of the slave according to the receiving command received by the host.
After the initialization of the master-slave machine is completed, the C2C (chip to chip) transmits data and performs signature verification on the data at the same time so as to ensure the safety of data transmission.
As a preferred embodiment, the Firmware trusts the public key of the root (for verifying the validity of Firmware public key); a Firmware public key (for verifying the validity of Firmware); firmware RAM (Firmware portion loaded into on-chip SRAM and running on Cortex-M7).
As a preferred embodiment, the Hash value of the public key of the firmware trust root is stored in the Jiayu OTP, which can be obtained by SM3, SHA256, etc. algorithms, the public key of the firmware trust root and the related data structure (such as x.509, standard format of public key infrastructure, x.509 certificate is mainly used to identify the identity in internet communication and computer network, and protect the data transmission security.) are stored in the flash memory, and loaded into the on-chip SRAM by rom program.
When verifying the validity of the root public key is trusted by the firmware:
(1) Carrying out Hash calculation (called Jiayu, SM3 or SHA 256) on the data containing the firmware trust root public key to obtain a corresponding Hash value and a third Hash value;
(2) Comparing the third hash value with a pre-stored first hash value in the Jiayu OTP, if the third hash value is consistent with the pre-stored first hash value, indicating that the firmware trust root public key is valid, and if the third hash value is inconsistent with the pre-stored first hash value, entering a corresponding error processing flow (comprising setting a status register and the like and notifying the BMC).
When verifying the validity of the Firmware public key, the Firmware public key and its digital signature are stored in the flash memory, and are loaded into the SRAM inside the chip by rom, specifically:
(1) HASH calculation is carried out on the data packet containing the Firmware public key (Jiayu is called, a HASH algorithm is used, and SM3 and SHA256 are included), and a fourth HASH value is obtained;
(2) Performing decryption operation on the first digital signature of Firmware (Jiayu is an asymmetric algorithm according to the public key in the Firmware trust root and ACA, wherein the ACA comprises SM2, RSA2048 and the like)), so as to obtain second abstract information of the Firmware public key;
(3) Comparing whether the fourth hash value is consistent with the second digest, if so, indicating that the public key corresponding to the fourth hash value is valid, and if not, entering a corresponding error processing flow (including setting a status register, notifying a BMC and the like).
When verifying the validity of Firmware RAM (Firmware data), firmware_ram and its digital signature are also stored in flash memory, loaded by ROM program into the on-chip SRAM.
(1) HASH calculation is performed on firmware_ram (Jiayu is called, and a HASH algorithm such as SM3 or SHA256 is used) to obtain a second HASH value;
(2) Performing decryption operation on the second digital signature corresponding to the firmware_RAM (calling Jiayu, using Firmware Pubkey or ACA asymmetric algorithm including SM2 and RSA2048, etc.), to obtain first abstract information originally corresponding to the firmware_RAM;
(3) And comparing whether the first abstract information is consistent with the second hash value. If the two addresses are consistent, the ROM program jumps to the starting address of the execution firmware_RAM; if not, the corresponding error processing flow (including setting a status register and notifying the BMC) is entered.
According to the invention, through the set C2C module, high-speed communication of interconnection of the master machine and the slave machine is established, so that the efficiency of multi-machine transmission can be improved; the method has the advantages that the host and the slave are initialized before public key verification, and the fact that the public parameters corresponding to the host and the slave are consistent with the public parameters corresponding to the system can be guaranteed, so that the state of the host and the slave is consistent when the host and the slave carry out data signature verification, and the fact that the signature verification is interrupted due to accidents cannot occur is guaranteed; and the C2C module can facilitate data interaction in the initialization process of the master and slave computers, and compared with the prior art that the initialization is carried out through interruption and the command is sent to the slave computers through interruption of a host computer, the initialization efficiency can be improved, whether received data are correct or not is not fed back to the host computer through an interruption mechanism, and further the complexity of hardware implementation and the hardware cost can be reduced.
In addition, the validity of the firmware public key can be verified by carrying out first signature verification on the firmware trust root public key, the validity of the firmware is verified on the basis that the firmware public key has the validity, if the firmware is valid, the verified data packet is transmitted to the slave, in the process, the host carries out signature verification on the firmware public key and the firmware twice respectively, the validity of the data packet received by the host can be enhanced, and the data packet obtained after the two verification processes is transmitted to the slave, so that the slave can carry out third signature verification on the received data packet, the validity of the data packet received by the slave can be enhanced, and the correctness and the safety of data transmission of the master and the slave can be further improved by adding signature verification processes in the process of transmitting the data of the host and the slave respectively, and the attacker can be prevented from stealing and effectively defending illegal attacks on the data transmitted by the master and the slave.
In a sixth embodiment, referring to fig. 6, a schematic structural diagram of a multi-machine data signing system according to the present invention includes: firmware trust root public key verification module 31, firmware public key verification module 32, firmware data verification module 33, and data packet verification module 34.
It should be noted that, the firmware trust root public key verification module 31 verifies the validity of the firmware public key with respect to the firmware trust root public key, and when the firmware trust root public key is valid, the firmware trust root public key verification module 31 transmits the information that the firmware trust root public key is valid to the firmware public key verification module 32; the firmware public key verification module 32 verifies the validity of the firmware public key according to the firmware trust root public key and transmits the information of the validity of the firmware public key to the firmware data verification module 33; after the firmware data verification module 33 obtains the information of the validity of the firmware public key, the validity of the firmware is verified according to the firmware public key, and the valid information of the firmware data is transmitted to the data packet signing module 34; after the packet signing module 34 receives the valid information of the firmware data, the signature is verified on the received packet of the slave.
The firmware trust root public key verification module 31 is configured to read the public key from the flash memory, including the firmware trust root public key, and verify the validity of the firmware public key according to the pre-stored first hash value and the firmware trust root public key.
Verifying the validity of the firmware public key according to a pre-stored first hash value and the firmware trust root public key, comprising: and carrying out hash calculation on the first data containing the firmware trust root public key to obtain a third hash value, and when the third hash value is consistent with the pre-stored first hash value, enabling the firmware public key to be effective.
And when the third hash value is inconsistent with the pre-stored first hash value, the firmware public key is invalid, the second state register is reset, and the baseboard management controller is informed of signature verification failure.
And the firmware public key verification module 32 is configured to read the firmware public key and the first digital signature of the firmware public key from the flash memory when the firmware public key is valid, and verify the validity of the firmware according to the firmware public key and the first digital signature.
Verifying the validity of the firmware according to the firmware public key and the first digital signature, comprising: performing hash calculation on the second data containing the firmware public key to obtain a fourth hash value, decrypting the first digital signature according to an asymmetric algorithm to obtain second abstract information of the firmware public key, and enabling the firmware to be effective when the fourth hash value is consistent with the second abstract information; otherwise, the firmware is not valid. And when the firmware is invalid, resetting the second state register and informing the baseboard management controller of signature verification failure.
And the firmware data verification module 33 is configured to read the firmware data and the second digital signature of the firmware data from the flash memory and calculate a second hash value of the firmware data when the firmware is valid.
And the data packet signature verification module 34 is configured to obtain a first data packet from the flash memory, and transmit the first data packet to a slave, so that the slave performs signature verification on the received second data packet according to the second hash value and the second digital signature.
Before the first data packet is transmitted to the slave, the method further comprises: unpacking the first data packet to obtain code data and a check code, and packing the obtained check data and the check code after checking and correcting the code data according to the check code so as to transmit the packed first data packet to the slave.
Decrypting the second digital signature according to an asymmetric algorithm to obtain first abstract information of the firmware data, and if the first abstract information is consistent with the second hash value, successfully signing the second data packet; wherein, the number of the slaves is at least 1.
If the first digest information is consistent with the second hash value, further including: if the first abstract information is inconsistent with the second hash value, resetting a first state register and notifying a baseboard management controller of signature verification failure.
The invention adopts the firmware trust root public key verification module 31 to carry out the first signature verification on the firmware trust root public key, can verify the validity of the firmware public key, and on the basis that the firmware public key has the validity, the firmware public key verification module 32 verifies the validity again on the firmware, if the firmware is valid, the verified data packet is transmitted to the slave, in the process, the host carries out the signature verification on the firmware public key and the firmware for two times respectively, the validity of the data packet received by the host can be enhanced, and the data packet obtained after the two verification processes is transmitted to the slave, so that the data packet signature verification module 34 carries out the third signature verification on the data packet received by the slave, the validity of the data packet received by the slave can be enhanced, and the validity and the security of the data transmission of the master can be further improved by adding the signature verification flow in the process of the data transmission of the host and the slave, and the attacker can be prevented from stealing and effectively defending illegal attacks on the data transmitted by the master and the slave.
The invention also provides a multi-machine data signing verification computer readable storage medium, wherein the computer readable storage medium comprises a stored computer program; and controlling the equipment where the computer readable storage medium is located to execute the multi-machine data signing method when the computer program runs.
The method has the advantages that the validity of the firmware public key can be verified by checking the root public key for the first time on the basis that the host trusts the firmware public key through the multi-machine data checking computer readable storage medium, the validity of the firmware public key can be verified on the basis that the firmware public key has the validity, and the firmware is verified again, if the firmware is valid, the checked data packet is transmitted to the slave machine, in the process, the host performs the checking on the firmware public key and the firmware for two times respectively, the validity of the data packet received by the host can be enhanced, and the data packet obtained after the two times of verification process is transmitted to the slave machine, so that the validity of the data packet received by the slave machine can be enhanced, the checking flow is increased through the processes of transmitting the data between the host machine and the slave machine respectively, the correctness and the safety of data transmission of the master machine and the slave machine can be further improved, and the attacker can be prevented from stealing and effectively resisting illegal attacks on the data transmitted by the master machine and the slave machine; in addition, according to the multi-machine data signature verification computer readable storage medium, the multi-machine data signature verification method can be applied to specific computer equipment or terminal equipment, multi-machine data signature verification of chips or wafers or sockets with different structures can be processed, more complex multi-machine data signature verification scenes can be processed, and therefore the efficiency of large-scale multi-machine data signature verification is further improved, and the method has higher applicability.
The invention also provides a multi-machine data signing method, which comprises the steps of storing a multi-machine data signing program in a memory, and executing the multi-machine data signing method by the processor.
The verification process comprises the steps of carrying out first verification on a root public key of a firmware trust at a host through a multi-machine data verification computer device, verifying the validity of the firmware public key, and transmitting the verified data packet to a slave machine if the firmware is valid on the basis that the firmware public key has the validity.
It will be appreciated by those skilled in the art that embodiments of the present application may also be provided including a computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The foregoing is merely a preferred embodiment of the present invention, and it should be noted that modifications and variations could be made by those skilled in the art without departing from the technical principles of the present invention, and such modifications and variations should also be regarded as being within the scope of the invention.

Claims (10)

1. The multi-machine data signature verification method is characterized by being suitable for a host, and comprises the following steps:
reading a public key from a flash memory, wherein the public key comprises a firmware trust root public key, and verifying the validity of the firmware public key according to a pre-stored first hash value and the firmware trust root public key;
when the firmware public key is valid, reading the firmware public key and a first digital signature of the firmware public key from the flash memory, and verifying the validity of the firmware according to the firmware public key and the first digital signature;
when the firmware is valid, reading the firmware data and a second digital signature of the firmware data from the flash memory, and calculating a second hash value of the firmware data;
and acquiring a first data packet from the flash memory, and transmitting the first data packet to a slave machine so that the slave machine performs signature verification on the received second data packet according to the second hash value and the second digital signature.
2. The multi-machine data signing method of claim 1, wherein the slave machine signing the received second data packet based on the second hash value and the second digital signature, comprising:
Decrypting the second digital signature according to an asymmetric algorithm to obtain first abstract information of the firmware data, and if the first abstract information is consistent with the second hash value, successfully signing the second data packet; wherein, the number of the slaves is at least 1.
3. The multi-machine data signing method of claim 2, wherein if said first digest information is consistent with said second hash value, further comprising:
if the first abstract information is inconsistent with the second hash value, resetting a first state register and notifying a baseboard management controller of signature verification failure.
4. The multi-machine data signing method of claim 1, wherein before said reading the public key from flash memory comprises firmware trust root public key, further comprising: the host computer is initialized, specifically:
receiving an initialization event subscribed from a C2C module, and performing initialization operation according to the initialization event; wherein the C2C module is formed by I 2 And C channel realization, and subscribing the initialization event to a system by the host through the C2C module.
5. The multi-machine data signing method of claim 4, further comprising: forwarding the initialization event to a slave so that the slave initializes according to the initialization event, specifically:
Receiving an initialization event sent by a C2C module, performing self initialization operation, and receiving the I of the C2C module 2 After the first sending command and the first receiving command sent by the C-drive transmission command；
Sending a first command of the initialization event to the slave according to the first sending command so as to acquire the state of the slave fed back after the slave executes the received first command;
and when receiving the slave state fed back by the slave, unsubscribing an initialization event according to the slave state.
6. The multi-machine data signing method of claim 1, wherein said verifying the validity of the firmware public key based on the pre-stored first hash value and the firmware trusted root public key comprises:
and carrying out hash calculation on the first data containing the firmware trust root public key to obtain a third hash value, and when the third hash value is consistent with the pre-stored first hash value, enabling the firmware public key to be effective.
7. The multi-machine data signing method of claim 1, wherein said verifying the validity of the firmware based on said firmware public key and said first digital signature comprises:
performing hash calculation on the second data containing the firmware public key to obtain a fourth hash value, decrypting the first digital signature according to an asymmetric algorithm to obtain second abstract information of the firmware public key, and enabling the firmware to be effective when the fourth hash value is consistent with the second abstract information; otherwise, the firmware is not valid.
8. The multi-machine data signing method of claim 1, wherein prior to said transmitting said first data packet to a slave machine, further comprising:
unpacking the first data packet to obtain code data and a check code, and packing the obtained check data and the check code after checking and correcting the code data according to the check code so as to transmit the packed first data packet to the slave.
9. A multi-machine data signing system comprising:
the firmware trust root public key verification module is used for reading the public key comprising the firmware trust root public key from the flash memory and verifying the validity of the firmware public key according to the pre-stored first hash value and the firmware trust root public key;
the firmware public key verification module is used for reading the firmware public key and the first digital signature of the firmware public key from the flash memory when the firmware public key is valid, and verifying the validity of the firmware according to the firmware public key and the first digital signature;
the firmware data verification module is used for reading the firmware data and the second digital signature of the firmware data from the flash memory and calculating a second hash value of the firmware data when the firmware is valid;
And the data packet signature verification module is used for acquiring a first data packet from the flash memory and transmitting the first data packet to a slave machine so that the slave machine can verify the signature of the received second data packet according to the second hash value and the second digital signature.
10. A computer-readable storage medium, comprising: the computer readable storage medium includes a stored computer program; wherein the computer program, when executed, controls a device in which the computer readable storage medium resides to perform the multi-machine data signing method as claimed in any one of claims 1 to 8.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109446815A (en) * 2018-09-30 2019-03-08 华为技术有限公司 Management method, device and the server of basic input output system firmware
US20210143990A1 (en) * 2019-11-07 2021-05-13 Micron Technology, Inc. Delegation of cryptographic key to a memory sub-system
CN115329321A (en) * 2022-08-12 2022-11-11 超聚变数字技术有限公司 Firmware starting method, chip and computing device
CN115409503A (en) * 2021-05-26 2022-11-29 恒宝股份有限公司 Information signature checking method and device, hardware wallet, terminal equipment and storage medium

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109446815A (en) * 2018-09-30 2019-03-08 华为技术有限公司 Management method, device and the server of basic input output system firmware
US20210143990A1 (en) * 2019-11-07 2021-05-13 Micron Technology, Inc. Delegation of cryptographic key to a memory sub-system
CN115409503A (en) * 2021-05-26 2022-11-29 恒宝股份有限公司 Information signature checking method and device, hardware wallet, terminal equipment and storage medium
CN115329321A (en) * 2022-08-12 2022-11-11 超聚变数字技术有限公司 Firmware starting method, chip and computing device

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