CN117011258A - Circuit board defect image verification display method, device, equipment and storage medium - Google Patents
Circuit board defect image verification display method, device, equipment and storage medium Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
- G06T7/0002—Inspection of images, e.g. flaw detection
- G06T7/0004—Industrial image inspection
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- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
- G06F3/147—Digital output to display device ; Cooperation and interconnection of the display device with other functional units using display panels
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- G06T2207/30—Subject of image; Context of image processing
- G06T2207/30108—Industrial image inspection
- G06T2207/30141—Printed circuit board [PCB]
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Abstract
The application discloses a circuit board defect image verification display method, device, equipment and storage medium, which relate to the field of image detection, respond to the selection operation of a target defect image received in a reinspection interface, amplify the target defect image and display a defect amplified image in a defect display area; responding to the amplifying operation of the target defect map, determining a target pcs corresponding to the target defect map, and marking and displaying the target pcs on the panoramic material map of the reinspection interface; in response to receiving a verification display operation on the target defect map, displaying a defect-free verification map corresponding to the target pcs in the defect display area, and displaying the defect-free verification map synchronously with the defect enlarged map; according to the scheme, the defect map, the corresponding defect-free check map and the panoramic material map are displayed on the recheck page together, and defect labeling display is carried out on the panoramic material map, so that the defect condition of the material can be visually checked, checking recheck can be carried out, and recheck efficiency and recheck accuracy can be effectively improved.
Description
Technical Field
The present application relates to the field of image display, and in particular, to a method, apparatus, device and storage medium for checking and displaying a circuit board defect image.
Background
In the semiconductor chip production process, a strip material board is stamped on a production PCB circuit board, a plurality of pcs particles are distributed on the material board, pcs are minimum composition particles or minimum composition units for forming the PCB, and a plurality of electronic components are included in the region. But is limited by the problems of environment, equipment precision and the like, and defects, blemishes, defects and the like are inevitably generated in the punching production process of the pcs particles. While the material plates need to be automatically scanned and filtered by a machine in the early production stage, the defects identified by the machine need to be rechecked manually in the later production stage so as to screen the PCB meeting the conditions and carry out subsequent production procedures.
In the related art, the operation process of manual rechecking requires personnel to check images recognized by a machine one by one, specifically, the defect images are amplified and then matched with a field material plate for verification, so that the detection precision is ensured. The manual rechecking mode needs to consider the problems of the size of the material plate and the image display precision, and an operator needs to continuously adjust the cameras one by one and observe the actual material plate image and the defect image, so that the operation efficiency is low, and the rechecking precision is not high.
Disclosure of Invention
The embodiment of the application provides a circuit board defect image verification display method, device and equipment and a storage medium, which solve the problem of low manual verification efficiency.
In one aspect, the present application provides a method for checking and displaying a defective image of a circuit board, the method comprising:
amplifying a target defect map in response to receiving a selection operation of the target defect map in a recheck interface, and displaying the defect amplified map in a defect display area; the target defect images are pcs defect images scanned on a material plate by a line scanning camera and identified by a machine, and each target defect image comprises at least one defect point;
responding to the amplifying operation of the target defect map, determining a target pcs corresponding to the target defect map, and marking and displaying the target pcs on the panoramic material map of the rechecking interface;
in response to receiving a verification display operation on a target defect map, displaying a defect-free verification map corresponding to the target pcs in the defect display area, and displaying the defect-free verification map synchronously with the defect enlarged map; the defect-free check graph and the defective target pcs are in one-to-one correspondence.
Further, a material display area is arranged in the rechecking interface, a panoramic material image which is scanned and transmitted by a wire scanning camera is displayed in the material display area, a plurality of pcs images are displayed in the panoramic material image, and the target defect image is obtained by intercepting based on defect points identified in the panoramic material image.
Further, an image display list is further arranged in the rechecking interface, and the image display list contains all pcs defect images identified and intercepted from the panoramic material map;
and displaying a defect enlarged image in the defect display area in response to receiving a selection operation of the target defect image in the image display list.
Further, the image display list also comprises pcs number information, picture classification information, defect type information and identification results; the ps number information is used for indicating the position number of the pcs corresponding to the material plate, the picture classification information is used for indicating the position area of the defects on the pcs, the defect type information is used for indicating the type of the defects identified by the machine, the identification result is used for indicating the target pcs as the defective material, and the operator is used for rechecking and screening.
Further, all the pcs defect images in the image display list establish a position index label based on the pcs number information and the picture classification information; and in response to receiving the selection operation of the target defect map, positioning and labeling display are performed on the panoramic material map according to the target position index label corresponding to the target defect map.
Further, a check display control is further arranged in the rechecking interface and used for an operator to execute check display operation;
responding to the received verification display operation of the target defect map, inquiring a panoramic image database according to the material number of the panoramic material map, and obtaining a defect-free panoramic map matched with the panoramic material map;
based on the target defect map and a position index label corresponding to the target pcs, intercepting the defect-free check map which is matched with the coordinate position of the target defect map from the defect-free panorama;
and setting the defect-free check map to be the same as the target defect map in resolution and size, and synchronously displaying the defect-free check map and the defect enlarged map in the defect display area.
Further, a check display control is further arranged in the rechecking interface and used for an operator to execute check display operation;
responding to the received verification display operation of the target defect map, inquiring a pcs image database according to the material number and the pcs number information corresponding to the target defect map, and obtaining a defect-free pcs verification map matched with the target; wherein, the pcs image database stores a plurality of defect-free pcs image check lists, the pcs image verification lists are classified according to the material numbers, and each pcs image verification list contains all pcs images on the corresponding material;
intercepting the defect-free verification graph which is matched with the coordinate position of the target defect graph from the defect-free pcs verification graph;
and setting the defect-free check map to be the same as the target defect map in resolution and size, and synchronously displaying the defect-free check map and the defect enlarged map in the defect display area.
In another aspect, the present application provides a circuit board defect image verification display apparatus, the apparatus comprising:
the amplifying display module is used for amplifying the target defect map in response to receiving the selection operation of the target defect map in the reinspection interface and displaying the defect amplifying map in the defect display area; the target defect images are pcs defect images scanned on a material plate by a line scanning camera and identified by a machine, and each target defect image comprises at least one defect point;
the marking display module is used for responding to the amplifying operation of the target defect map, determining a target pcs corresponding to the target defect map, and marking and displaying the target pcs on the panoramic material map of the review interface;
the verification display module is used for displaying a defect-free verification graph corresponding to the target pcs in the defect display area in response to receiving verification display operation on the target defect graph, and displaying the defect-free verification graph and the defect-free verification graph synchronously; the defect-free check graph and the defective target pcs are in one-to-one correspondence.
In yet another aspect, the present application provides a computer device, where the computer device includes a processor and a memory, where at least one instruction, at least one section of program, a code set, or an instruction set is stored in the memory, where the at least one instruction, the at least one section of program, the code set, or the instruction set is loaded and executed by the processor to implement the circuit board defect image verification display method described in the above aspect.
In yet another aspect, the present application provides a computer readable storage medium having stored therein at least one instruction, at least one program, a code set, or an instruction set, which is loaded and executed by a processor to implement the circuit board defect image verification display method described in the above aspect.
The technical scheme provided by the embodiment of the application has the beneficial effects that at least: setting a panoramic display area and a defect display area on the recheck interface, wherein the defect display area displays a target defect map selected by an operator and displays the target defect map in an enlarged manner, and the panoramic display area marks and displays the panoramic material map according to the enlargement operation of the target defect map so that the operator can know the specific position of a material plate where the defect is located; in order to improve the accuracy of the defect recheck check, defect-free check graphs corresponding to the target defect graphs are displayed in parallel in the defect display area, and the defect-free check graphs represent images of normal defect-free targets pcs, so that the defect-free check graphs can be used as defect contrast of the target defect graphs, recheck check on machine identification results is realized, and recheck efficiency and recheck accuracy are improved.
Drawings
FIG. 1 is a schematic view of a review system for a strip material review;
FIG. 2 is a flowchart of a method for verifying and displaying a defective image of a circuit board according to an embodiment of the present application;
FIG. 3 is an interface schematic diagram showing a defect magnification at a review interface;
FIG. 4 is an interface schematic diagram of a panoramic material icon defect pcs at a review interface;
FIG. 5 is an interface schematic diagram of a display list of display images at a review interface;
FIG. 6 is a schematic diagram of an interface for turning on a synchronous check display via a check display control;
FIG. 7 is a schematic diagram of a circuit board defect image verification display device according to an embodiment of the present application;
fig. 8 is a block diagram of a computer device according to an exemplary embodiment of the present application.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present application more apparent, the embodiments of the present application will be described in further detail with reference to the accompanying drawings.
References herein to "a plurality" means two or more. "and/or", describes an association relationship of an association object, and indicates that there may be three relationships, for example, a and/or B, and may indicate: a exists alone, A and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship.
Fig. 1 is a schematic view of a review system for review of strip materials according to an embodiment of the present application, where the system includes a computer device, a database, and a line scan camera. The line scanning camera is located above strip materials of the assembly line and is used for scanning panoramic pictures of all materials, namely panoramic material pictures. The computer equipment runs the Fujian system and is linked with the line scanning camera and the database. The panoramic material diagram comprises a plurality of pcs images, and for pcs with defects, the detection system can find and intercept the pcs defect images in the defect detection process, and transmit the pcs defect images to the recheck system for storage and display for manual recheck by an operator. The database is a server or other computer device that stores defect-free images for purposes of performing defect-matching checks. Because the layout typesetting and the structure of different model materials on the assembly line are different, for the defect of machine identification, an operator is required to be manually matched, and a defect-free comparison object is the key of matching verification so as to avoid machine false detection.
Fig. 2 is a flowchart of a circuit board defect image verification display method according to an embodiment of the present application, including the following steps:
in step 201, in response to receiving the selection operation of the target defect map in the review interface, the target defect map is enlarged, and a defect enlarged map is displayed in the defect display area.
The target defect images are pcs defect images scanned and machine-identified on the material plate by a line scanning camera, wherein each target defect image corresponds to one pcs and comprises at least one defect point. The defective spot or defective area is machine-identified and requires manual review to ensure product yield.
The rechecking interface at least comprises two parts, which are respectively used for displaying the panoramic material diagram and the defect enlarged diagram which are shot and transmitted by the line scanning camera, wherein the area for displaying the panoramic material diagram is a panoramic display area, and the area for displaying the defect enlarged diagram is a defect display area. After the operator inputs or selects a target defect map, the target defect map is enlarged and generated in the defect display area. Because the panoramic material image has larger area, the detail information can not be seen in the displayed image, and therefore, the defect position in the area needs to be scratched out for separate enlarged display.
In one possible embodiment, the cut-out defect-enlarged image is cut out with the defect point as the geometric center, that is, the blemish/defect is located at the center of the image, so that the normal area around the blemish can be observed to the maximum. As shown in fig. 3, at a target size of 900×900, the pcs defect image of the missing element is placed in the center of the frame for display.
Step 202, in response to the amplifying operation of the target defect map, determining a target pcs corresponding to the target defect map, and marking and displaying the target pcs on the panoramic material map of the review interface.
The purpose of showing the panoramic view is to be able to know the location of the defect while the operator is rechecking the defect, because pcs are arranged in an array on the strip material board, and the overall structure may be the same or different. After the panoramic material diagram is marked and displayed, operators can know the defect positions conveniently, the defect conditions of the production batch or the strip material plates are integrally mastered, and follow-up production processes and rechecking key points are controlled.
As shown in FIG. 4, because the target defect map and the pcs in the panoramic material map are in one-to-one correspondence, after a certain target defect map is selected and enlarged, the position can be marked in the panoramic material map. The labeling mode can be used for selecting the whole pcs region or labeling the region range of the target defect map. In fig. 4, the entire ps range is illustrated by frame selection, and after the defect enlarged view is selected and displayed on the right side, and the corresponding target pcs are marked in the left and right array views on the left strip material board, so that the operator can intuitively see the positions of the defective target pcs.
Step 203, in response to receiving the verification display operation on the target defect map, displaying a defect-free verification map corresponding to the target pcs in the defect display area, and displaying the defect-free verification map synchronously with the defect enlarged map; the defect-free check map has a one-to-one correspondence with the defective target pcs.
Because only the enlarged view of the defect is shown in the defect display area on the right, the operator can determine directly, such as breakage, missing components, positional deviation, tilting, etc., in the case where the defect is apparent. However, for different types and contents of the strip material boards, the operator cannot clearly know all the detail features, such as text missing print, elements and text multiple print, and deviation of the arrangement direction of the elements, which may affect the normal operation of the chip or affect acceptance, the machine defines the chip as a pcs defect image, and the operator must perform defect verification. The present scheme reintroduces a defect-free verification pattern.
As shown in FIG. 4, the defect-free verification map is located in a computer local or database. When comparison and verification are needed, the display is called, all strip material board models and all pcs images in the material boards are stored in the database, and the database is a defect-free image and is specially used for the operator to call and verify. Specifically, a defect-free check map corresponding to the target pcs is displayed in the defect display area, and is synchronously displayed with the defect enlarged map. The left box in fig. 4 is a pcs defect image matching the right defect magnification. The defect-free check image (right) and the defect enlarged image (left) in the defect display area are displayed in parallel or up and down so that an operator can analyze the defect condition and prepare for subsequent marking.
In summary, the panoramic display area and the defect display area are arranged on the recheck interface, the defect display area displays the target defect map selected by the operator and displays the target defect map in an enlarged mode, and the panoramic display area marks and displays the panoramic material map according to the enlarging operation of the target defect map, so that the operator can know the specific position of the material plate where the defect is located clearly; in order to improve the accuracy of the defect recheck check, defect-free check graphs corresponding to the target defect graphs are displayed in parallel in the defect display area, and the defect-free check graphs represent images of normal defect-free targets pcs, so that the defect-free check graphs can be used as defect contrast of the target defect graphs, recheck check on machine identification results is realized, and recheck efficiency and recheck accuracy are improved.
In some scenes, if a plurality of pcs defect images are detected on a strip material board, operators need to select the intercepted pcs defect images one by one or select the pcs defect images in a targeted manner to check and amplify the pcs defect images when matching and checking are performed on a rechecking interface. Therefore, the application selects to set an image display list on the recheck interface, wherein the image display list contains all the pcs defect images identified and intercepted from the panoramic material map. Specifically, the image display list may be displayed in a tabular form or in an image preview form, that is, a thumbnail of the pcs defect image is displayed in the defect display area or at the bottom of the review interface. In response to receiving a selection operation of a target defect map in the image display list, a defect enlarged map is displayed in the defect display area.
For example, as shown in fig. 5, an image display list is displayed below the defect display area, and when one of them is selected as a target defect map to be enlarged, an enlarged map of the image is generated in the defect display area above.
Considering that the strip material board contains a plurality of pcs arrays, if the panoramic material diagram is marked and displayed when one target defect diagram is selected, the panoramic material diagram must be positioned, and specifically the following strategy is adopted:
when the strip materials are scanned by the line scanning camera, numbers or coordinates are set for each pcs or pcs with defects identified, and all defects need to be described in the defect detection process, namely, the pcs number information, the picture classification information, the defect type information, the identification result and other information are set for each pcs defect image. Correspondingly, when the target defect map is selected, the information is displayed in the defect display area for the operator to review. The pcs number information is used for indicating the position number of the pcs corresponding to the material plate; the picture classification information is used for indicating the position area of the defect on the pcs; the defect type information is used for indicating the type of the defect identified by the machine, the identification result is used for indicating the target pcs as the defect material, and the defect type information is used for rechecking and screening by an operator.
For example, referring to fig. 5, assuming that the pcs identified with number 005 identify defects, the defect type is device defect, and thus the picture is classified as defect located in the device region, the resolution of the enlarged display is 900×900.
When the rechecking system receives the pcs defect images, establishing position index labels for all the pcs defect images according to the pcs numbering information and the picture classification information;
and in response to receiving the selection operation of the target defect map, positioning and labeling display are performed on the panoramic material map according to the target position index label corresponding to the target defect map. Specifically, the method is determined according to the number and the position of the pcs.
In some embodiments, for the defect comparison function, the following function may be further adopted:
a, a check display control is further arranged in the review interface and used for an operator to execute check display operation;
b, responding to the received verification display operation of the target defect map, inquiring a panoramic image database according to the material number of the panoramic material map, and obtaining a defect-free panoramic map matched with the panoramic material map;
c, based on the target defect map and the position index label of the corresponding target pcs, intercepting a defect-free check map which is suitable for the coordinate position of the target defect map from the defect-free panorama;
and d, setting the defect-free check map to be the same in resolution and size as the target defect map, and synchronously displaying the defect-free check map and the defect enlarged map in a defect display area.
As shown in fig. 6, the above steps rely on the database function to store the panoramic images of all normal and defect-free strip material boards in advance in the database, match the panoramic images from the panoramic image database based on the current strip material model when the check display operation is started, index the labels according to the positions of the target pcs after matching the consistent panoramic images, intercept defect-free check images corresponding to the coordinate positions of the target defect images from the defect-free panoramic images, and then enlarge the defect-free check images to the same resolution and size as the target defect images.
Of course, the above process needs to identify pcs and intercept from the complete panoramic material map, and the image identification operand is increased under the condition of a large number, and in some possible embodiments, the defect-free strip material can be scanned and stored in advance in regions, which is specifically as follows:
e, responding to the received verification display operation of the target defect map, inquiring a pcs image database according to the material number and the pcs number information corresponding to the target defect map, and obtaining a defect-free pcs verification map matched with the target;
according to the scheme, after strip material plates of various types are scanned in advance, all pcs on the plates are scanned into images independently and then stored and numbered, and after the comparison and verification are started later, the strip material plates are directly extracted according to the types of the strip material plates. That is, the ps image database stores a plurality of defect-free ps image verification lists, the ps image verification lists are classified according to material numbers, the number of specific lists is equal to the number of strip types, and each ps image verification list contains all ps images on corresponding materials. In this way, the corresponding defect-free pcs verification graph can be extracted by directly searching the pcs number from the list in the subsequent step.
f, intercepting a defect-free check map which is adaptive to the coordinate position of the target defect map from the defect-free pcs check map;
and g, setting the defect-free check map to be the same as the target defect map in resolution and size, and synchronously displaying the defect-free check map and the defect enlarged map in a defect display area.
Compared with the scheme of matting from the panoramic image, the scheme of inquiring and displaying verification has the advantages of relatively less operation amount and faster response speed.
Fig. 7 shows a circuit board defect image verification display device provided by an embodiment of the present application, where the device includes:
the amplifying display module is used for amplifying the target defect map in response to receiving the selection operation of the target defect map in the reinspection interface and displaying the defect amplifying map in the defect display area; the target defect images are pcs defect images scanned on a material plate by a line scanning camera and identified by a machine, and each target defect image comprises at least one defect point;
the marking display module is used for responding to the amplifying operation of the target defect map, determining a target pcs corresponding to the target defect map, and marking and displaying the target pcs on the panoramic material map of the review interface;
the verification display module is used for displaying a defect-free verification graph corresponding to the target pcs in the defect display area in response to receiving verification display operation on the target defect graph, and displaying the defect-free verification graph and the defect-free verification graph synchronously; the defect-free check graph and the defective target pcs are in one-to-one correspondence.
In addition, the application also provides a computer device, which comprises a processor and a memory, wherein at least one instruction, at least one section of program, code set or instruction set is stored in the memory, and the at least one instruction, the at least one section of program, the code set or the instruction set is loaded and executed by the processor to realize the circuit board defect image verification display method in the aspect.
In addition, the application also provides a computer readable storage medium, wherein at least one instruction, at least one section of program, code set or instruction set is stored in the readable storage medium, and the at least one instruction, the at least one section of program, the code set or instruction set is loaded and executed by a processor to realize the circuit board defect image verification display method in the aspect.
The circuit board defect image verification display device provided by the embodiment of the application can be applied to the circuit board defect image verification display method provided by the embodiment, and related details refer to the method embodiment, so that the implementation principle and the technical effect are similar, and the description is omitted.
It should be noted that, when the circuit board defect image verification display device provided in the embodiment of the present application performs the caliper operation, only the division of the above functional modules/functional units is used as an example, in practical application, the above functional allocation may be completed by different functional modules/functional units according to needs, that is, the internal structure of the circuit board defect image verification display device is divided into different functional modules/functional units, so as to complete all or part of the functions described above. In addition, the implementation of the method for verifying and displaying a circuit board defect image provided by the above-mentioned method embodiment and the implementation of the circuit board defect image verification and display device provided by the present embodiment belong to the same concept, and the specific implementation process of the circuit board defect image verification and display device provided by the present embodiment is detailed in the above-mentioned method embodiment, and will not be described herein again.
Fig. 8 shows a block diagram of a computer device according to an exemplary embodiment of the present application. Is a computer device such as a desktop computer, a notebook computer, a palm computer, a cloud server, and the like. The computer device may include, but is not limited to, a processor and a memory. Wherein the processor and the memory may be connected by a bus or other means. The processor may be a central processing unit (Central Processing Unit, CPU). The processor may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), field programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, graphics processors (Graphics Processing Unit, GPU), embedded Neural network processors (Neural-network Processing Unit, NPU) or other specialized deep learning coprocessors, discrete gate or transistor logic devices, discrete hardware components, or a combination of the above.
The processor may include one or more processing cores, such as a 4-core processor, an 8-core processor, and the like. The processor may be implemented in at least one hardware form of DSP (Digital Signal Processing ), FPGA (Field-Programmable Gate Array, field programmable gate array), PLA (Programmable Logic Array ). The processor 1701 may also include a main processor and a coprocessor, the main processor being a processor for processing data in an awake state, also referred to as a CPU (Central Processing Unit ); a coprocessor is a low-power processor for processing data in a standby state. In some embodiments, the processor may be integrated with a GPU (Graphics Processing Unit, image processor) for taking care of rendering and rendering of the content that the display screen is required to display. In some embodiments, the processor may also include an AI (Artificial Intelligence ) processor for processing computing operations related to machine learning.
The memory is used as a non-transitory computer readable storage medium for storing non-transitory software programs, non-transitory computer executable programs, and modules, such as program instructions/modules corresponding to the methods in the above embodiments of the present application. The processor executes various functional applications of the processor and data processing, i.e., implements the methods of the method embodiments described above, by running non-transitory software programs, instructions, and modules stored in memory. The memory may include a memory program area and a memory data area, wherein the memory program area may store an operating system, at least one application program required for a function; the storage data area may store data created by the processor, etc. In addition, the memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some implementations, the memory optionally includes memory remotely located relative to the processor, the remote memory being connectable to the processor through a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
In some embodiments, the computer device may further optionally include: a peripheral interface and at least one peripheral. The processor, memory, and peripheral interfaces may be connected by buses or signal lines. The individual peripheral devices may be connected to the peripheral device interface via buses, signal lines or circuit boards. Specifically, the peripheral device includes: at least one of a radio frequency circuit, a display screen and a keyboard.
The peripheral interface may be used to connect at least one Input/Output (I/O) related peripheral to the processor and the memory. In some embodiments, the processor, memory, and peripheral interfaces are integrated on the same chip or circuit board; in some other embodiments, either or both of the processor, memory, and peripheral interface may be implemented on separate chips or circuit boards, which is not limiting in this embodiment.
The display screen is used to display a UI (User Interface). The UI may include graphics, text, icons, video, and any combination thereof. When the display is a touch display, the display also has the ability to collect touch signals at or above the surface of the display. The touch signal may be input to the processor for processing as a control signal. At this time, the display screen may also be used to provide virtual buttons and/or virtual keyboards, also referred to as soft buttons and/or soft keyboards. In some embodiments, the display screen may be one, disposed on the front panel of the computer device; in other embodiments, the display screen may be at least two, respectively disposed on different surfaces of the computer device or in a folded design; in other embodiments, the display may be a flexible display disposed on a curved surface or a folded surface of the computer device. Even more, the display screen may be arranged in a non-rectangular irregular pattern, i.e. a shaped screen. The display screen may be made of LCD (Liquid Crystal Display ), OLED (Organic Light-Emitting Diode) or other materials.
The power supply is used to power the various components in the computer device. The power source may be alternating current, direct current, disposable or rechargeable. When the power source comprises a rechargeable battery, the rechargeable battery may be a wired rechargeable battery or a wireless rechargeable battery. The wired rechargeable battery is a battery charged through a wired line, and the wireless rechargeable battery is a battery charged through a wireless coil. The rechargeable battery may also be used to support fast charge technology.
Those skilled in the art will appreciate that the architecture shown in fig. 8 is not limiting of the computer device and may include more or fewer components than shown, or may combine certain components, or employ a different arrangement of components.
The embodiment of the application also discloses a computer readable storage medium. In particular, a computer readable storage medium is used for storing a computer program which, when executed by a processor, implements the method of the above-described method embodiments. It will be appreciated by those skilled in the art that implementing all or part of the above-described methods according to the present application may be implemented by a computer program for instructing relevant hardware, and the program may be stored in a computer readable storage medium, and the program may include the steps of the above-described embodiments of the methods when executed. Wherein the storage medium may be a magnetic Disk, an optical Disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a Flash Memory (Flash Memory), a Hard Disk (HDD), or a Solid State Drive (SSD); the storage medium may also comprise a combination of memories of the kind described above.
The present embodiment is only for explanation of the present application and is not to be construed as limiting the present application, and modifications to the present embodiment, which may not creatively contribute to the present application as required by those skilled in the art after reading the present specification, are all protected by patent laws within the scope of claims of the present application.
Claims (10)
1. A method for verifying and displaying a circuit board defect image, the method comprising:
amplifying a target defect map in response to receiving a selection operation of the target defect map in a recheck interface, and displaying the defect amplified map in a defect display area; the target defect images are pcs defect images scanned on a material plate by a line scanning camera and identified by a machine, and each target defect image comprises at least one defect point;
responding to the amplifying operation of the target defect map, determining a target pcs corresponding to the target defect map, and marking and displaying the target pcs on the panoramic material map of the rechecking interface;
in response to receiving a verification display operation on a target defect map, displaying a defect-free verification map corresponding to the target pcs in the defect display area, and displaying the defect-free verification map synchronously with the defect enlarged map; the defect-free check graph and the defective target pcs are in one-to-one correspondence.
2. The method of claim 1, wherein a material display area is provided in the review interface, wherein a panoramic material map scanned and transmitted by a wire scanning camera is displayed, a plurality of pcs images are displayed in the panoramic material map, and the target defect map is obtained by cutting out based on defect points identified in the panoramic material map.
3. The method of claim 2, wherein the review interface is further provided with an image display list, and the image display list contains all pcs defect images identified and intercepted from the panoramic material map;
and displaying a defect enlarged image in the defect display area in response to receiving a selection operation of the target defect image in the image display list.
4. A method according to claim 3, wherein the image display list further comprises pcs number information, picture classification information, defect type information and recognition results; the ps number information is used for indicating the position number of the pcs corresponding to the material plate, the picture classification information is used for indicating the position area of the defects on the pcs, the defect type information is used for indicating the type of the defects identified by the machine, the identification result is used for indicating the target pcs as the defective material, and the operator is used for rechecking and screening.
5. The method of claim 4, wherein all of the pcs defect images in the image display list establish a location index tag based on the pcs numbering information and the picture classification information; and in response to receiving the selection operation of the target defect map, positioning and labeling display are performed on the panoramic material map according to the target position index label corresponding to the target defect map.
6. The method of claim 5, wherein a check display control is further provided in the review interface for an operator to perform a check display operation;
responding to the received verification display operation of the target defect map, inquiring a panoramic image database according to the material number of the panoramic material map, and obtaining a defect-free panoramic map matched with the panoramic material map;
based on the target defect map and a position index label corresponding to the target pcs, intercepting the defect-free check map which is matched with the coordinate position of the target defect map from the defect-free panorama;
and setting the defect-free check map to be the same as the target defect map in resolution and size, and synchronously displaying the defect-free check map and the defect enlarged map in the defect display area.
7. The method of claim 5, wherein a check display control is further provided in the review interface for an operator to perform a check display operation;
responding to the received verification display operation of the target defect map, inquiring a pcs image database according to the material number and the pcs number information corresponding to the target defect map, and obtaining a defect-free pcs verification map matched with the target; wherein, the pcs image database stores a plurality of defect-free pcs image check lists, the pcs image verification lists are classified according to the material numbers, and each pcs image verification list contains all pcs images on the corresponding material;
intercepting the defect-free verification graph which is matched with the coordinate position of the target defect graph from the defect-free pcs verification graph;
and setting the defect-free check map to be the same as the target defect map in resolution and size, and synchronously displaying the defect-free check map and the defect enlarged map in the defect display area.
8. A circuit board defect image verification display device, the device comprising:
the amplifying display module is used for amplifying the target defect map in response to receiving the selection operation of the target defect map in the reinspection interface and displaying the defect amplifying map in the defect display area; the target defect images are pcs defect images scanned on a material plate by a line scanning camera and identified by a machine, and each target defect image comprises at least one defect point;
the marking display module is used for responding to the amplifying operation of the target defect map, determining a target pcs corresponding to the target defect map, and marking and displaying the target pcs on the panoramic material map of the review interface;
the verification display module is used for displaying a defect-free verification graph corresponding to the target pcs in the defect display area in response to receiving verification display operation on the target defect graph, and displaying the defect-free verification graph and the defect-free verification graph synchronously; the defect-free check graph and the defective target pcs are in one-to-one correspondence.
9. A computer device comprising a processor and a memory, wherein the memory stores at least one instruction, at least one program, a set of codes, or a set of instructions, the at least one instruction, the at least one program, the set of codes, or the set of instructions being loaded and executed by the processor to implement the circuit board defect image verification display method of any one of claims 1 to 7.
10. A computer-readable storage medium having stored therein at least one instruction, at least one program, a code set, or an instruction set, the at least one instruction, the at least one program, the code set, or the instruction set being loaded and executed by a processor to implement the circuit board defect image verification display method of any one of claims 1 to 7.
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