CN116859217A - Circuit fault self-checking method, device and controller - Google Patents
Circuit fault self-checking method, device and controller Download PDFInfo
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- G—PHYSICS
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
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Abstract
The application provides a circuit fault self-checking method, a device and a controller, wherein the method mainly comprises the following steps: after primary power-on, configuring a first control unit and a second control unit; the first control unit and the second control unit are in one-to-one correspondence and mutually monitor circuit abnormality; after the secondary power-on, the first control unit completes one-time self-checking, and a fault mechanism or a normal mechanism is selected to be started according to the result of the one-time self-checking; and only when the mechanism is normal, the second control unit completes secondary self-checking, and controls normal output or disconnection of the power supply according to the secondary self-checking result. The first control unit monitors the second control unit in addition to the power management and power supply of the second control unit, so that the functional safety of the power supply system is ensured, and the stability and the reliability of the power supply system are jointly built through multiple self-tests and mutual tests of the first control unit and the second control unit.
Description
Technical Field
The application belongs to the technical field of circuit fault self-checking, and particularly relates to a circuit fault self-checking method, a circuit fault self-checking device and a controller.
Background
Nowadays, power management ICs are increasingly used in automotive electronic design, each Micro Controller (MCU) is provided with a corresponding power management IC to supply power and manage and monitor power, but because the power rail output of the power management IC (PMU) is limited, the power management IC (PMU) needs to perform resource maximization and reliability maximization design in spite of the fact that the output power is managed, and in the design of increasingly complex automotive electronic products, the rationality and reliability of the power design are improved, and when a circuit fails, on-site personnel have difficulty in judging the cause of the failure without the help of professionals, so that the system maintenance cost is high.
Disclosure of Invention
Aiming at the defects of the prior art, the application provides a circuit fault self-checking method, a circuit fault self-checking device and a circuit fault self-checking controller, wherein a first control unit monitors the second control unit mutually except for managing and supplying power to the power supply of the second control unit, and the self-checking and the mutual checking of the first control unit and the second control unit are performed for a plurality of times, so that the functional safety of a power supply system is ensured, the stability of the power supply system is improved, and the maintenance cost of the system is reduced.
In order to achieve the above object, the present application provides a circuit fault self-checking method, including:
after primary power-on, configuring a first control unit and a second control unit; the first control unit and the second control unit are in one-to-one correspondence and mutually monitor circuit abnormality.
After the secondary power-on, the first control unit completes one-time self-checking, and a fault mechanism or a normal mechanism is selected to be started according to the result of the one-time self-checking; and only when the mechanism is normal, the second control unit completes secondary self-checking, and controls normal output or disconnection of the power supply according to the secondary self-checking result.
Wherein before the first control unit and the second control unit are configured, the method further comprises: and performing primary circuit self-checking on the first control unit.
In the application, the primary circuit self-test specifically comprises:
and when the result of the primary circuit self-check is normal, starting the second control unit.
And when the result of the primary circuit self-test is abnormal, repeating the primary circuit self-test, and if the result of the primary circuit self-test is abnormal, not starting the second control unit.
In the present application, the configuration of the first control unit and the second control unit is specifically:
after the second control unit is started, the second control unit establishes configuration for the first control unit through a preset serial external device interface.
In the application, the first control unit and the second control unit can realize mutual monitoring after configuration is established.
In the application, the PMU power management module and the MCU control module establish safety function configuration through SPI or IIC interfaces, the system can enter a dormant state after configuration, and after the system is awakened again for a preset time, the PMU power management module performs self-checking once.
In the application, the primary self-test at least comprises detecting a system power state of the first control unit.
Further, the system power state includes a normal state, a primary fault state, and a secondary fault state.
In the application, the primary self-checking result is obtained according to the system power state.
In the application, the fault mechanism at least comprises a primary fault mechanism and a secondary fault mechanism.
The primary failure mechanism includes: when the system power state is in the primary fault state as a result of one-time self-checking, the second control unit receives a preset instruction of the first control unit through a preset serial external equipment interface, and reads and records current fault information.
The secondary failure mechanism includes: restarting the system power supply of the first control unit when the system power supply state is in the second-level fault state as a result of one-time self-checking, and closing the system power supply of the first control unit if the system power supply state is still in the second fault state after restarting; and restarting the system power supply of the first control unit at least once.
In the application, when the system power supply state is in the primary fault state, the second control unit reads and records the current fault information, the power supply system still continues to operate, and the primary fault does not cause the power supply system to fail to operate.
In the application, when the one-time self-checking result is in a normal state, the normal mechanism is started.
In the application, the secondary self-test at least comprises the step of detecting the signal state of the second control unit and/or the system power state of the second control unit.
Wherein the signal states include a signal normal state and a signal abnormal state; the system power state of the second control unit comprises a system power normal state and a system power abnormal state.
And obtaining the secondary self-checking result according to the signal state of the second control unit and/or the system power state of the second control unit.
Wherein the detection of the system power state of the second control unit is started only when the signal state is in a signal normal state.
In the application, the controlling the normal output or disconnection of the power supply according to the secondary self-checking result comprises:
when the signal state is in the signal abnormal state, the first controller unit receives a preset level signal output by the second control unit through a preset serial external device interface, and then outputs a preset reset instruction to the second control unit so as to reset the second control unit.
And when the secondary self-checking result is that the signal state is in a signal normal state and the system power state of the second control unit is in a normal state, controlling the system power of the second control unit to be output normally.
Restarting the system power when the secondary self-checking result is that the signal state is in a signal normal state and the system power state of the second control unit is in an abnormal state, and controlling to turn off the system power of the first control unit if the system power state of the second control unit is in an abnormal state after restarting; and restarting the system power supply at least once.
In order to achieve the above object, the present application further provides a circuit fault self-checking device, including:
the system comprises a first control module, a second control module and a fault self-checking module; the fault self-checking module comprises a first fault self-checking module and a second fault self-checking module.
The first control module and the second control module are connected through a preset serial external equipment interface for configuration; the first control unit and the second control unit are in one-to-one correspondence and mutually monitor circuit abnormality.
The first fault self-checking module is at least used for primary circuit self-checking and primary self-checking of the first control module.
The second fault self-checking module is used for secondary self-checking of the second control module.
When the primary circuit self-check of the first control module is normal, the second control module is started; after secondary power-on, the first control module completes primary self-checking, and a fault mechanism or a normal mechanism is selected to be started according to a primary self-checking result; and only when the mechanism is normal, the second control module completes secondary self-checking, and controls normal output or disconnection of the power supply according to a secondary self-checking result.
In order to achieve the above object, the present application further provides a circuit fault self-checking controller, including:
the system comprises a first controller, a second controller and a fault self-checking circuit.
The first controller and the second controller are respectively connected with the fault self-checking circuit, are connected and configured through a preset serial external equipment interface of the fault self-checking circuit, and are started when the self-checking of the first controller is normal; the first controllers and the second controllers are in one-to-one correspondence and mutually conduct circuit abnormality monitoring.
After the first controller completes one self-checking, a fault mechanism or a normal mechanism is started according to a one-time self-checking result; and only when the mechanism is normal, the second controller completes secondary self-checking, and controls normal output or disconnection of the power supply according to the secondary self-checking result.
Compared with the prior art, the application has the beneficial effects that:
the application provides a circuit fault self-checking method, a device and a controller, wherein the method mainly realizes the following steps:
1. the first control unit and the second control unit establish configuration, so that when the self-check of the first controller is normal, the second controller is started, the first controller and the second controller are in one-to-one correspondence and mutually perform circuit abnormality monitoring, the functional safety of the power supply system is ensured, and the stability of the power supply system is improved.
2. The first control unit self-checking, the second control unit self-checking and the first control unit and the second control unit self-checking after configuration are established, so that circuit fault self-checking can be carried out under the condition that external detection equipment is not required to be arranged, a power supply circuit is timely protected, fault information is fed back and stored, the rationality and reliability of power supply design in electronic products are improved, and production cost is greatly reduced.
Drawings
FIG. 1 is a flowchart illustrating a circuit fault self-checking method according to an embodiment of the present application.
Fig. 2 is a flowchart of a power-on configuration of a circuit fault self-checking method according to an embodiment of the application.
Fig. 3 is a self-checking flow chart of a second power-on first control unit of a circuit fault self-checking method according to an embodiment of the application.
Fig. 4 is a self-checking flow chart of a secondary power-up second control unit of a circuit fault self-checking method according to an embodiment of the application.
Fig. 5 is a schematic structural diagram of a circuit fault self-checking device according to an embodiment of the application.
Fig. 6 is a schematic structural diagram of a circuit fault self-checking controller according to an embodiment of the application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions will be clearly and completely described below in connection with the embodiments of the present application. It will be apparent that the described embodiments are some, but not all, embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Embodiment one:
as shown in fig. 1, in order to solve the above technical problems, the present application provides a circuit fault self-checking method, including:
after primary power-on, configuring a first control unit and a second control unit; the first control unit and the second control unit are in one-to-one correspondence and mutually monitor circuit abnormality.
After the secondary power-on, the first control unit completes one-time self-checking, and a fault mechanism or a normal mechanism is selected to be started according to the result of the one-time self-checking; and only when the mechanism is normal, the second control unit completes secondary self-checking, and controls normal output or disconnection of the power supply according to the secondary self-checking result.
Preferably, the first control unit may be a PMU power management unit, and the second control unit may be an MCU control unit, which is not limited thereto.
Before the PMU power management unit and the MCU control unit are configured, the method further comprises the step of conducting a circuit self-check on the PMU power management unit.
In the application, the primary circuit self-test specifically comprises:
and when the result of the primary circuit self-check is normal, starting the MCU control unit.
When the result of the primary circuit self-test is abnormal, repeating the primary circuit self-test, and if the result of the primary circuit self-test is abnormal, not starting the MCU control unit, and at the moment, closing the output of the PMU power management unit.
Preferably, the number of times the circuit self-test is repeated once may be set to any parameter, for example, 6, 10, 12, or the like, without being limited thereto.
As shown in fig. 2, in the present application, the PMU power management unit and the MCU control unit are configured, specifically:
after the MCU control unit is started, the MCU control unit establishes configuration for the PMU power management unit through a preset serial external device interface.
Preferably, the preset serial external device interface may be an SPI or IIC interface for transmitting security function configuration data and information, which is not limited thereto.
Preferably, the PMU power management module and the MCU control module establish a safety function configuration through the SPI or IIC interface, and after the configuration, the system enters a sleep state, and after a preset time, for example, 10 minutes, the PMU power management module performs a self-test after waking up the system again.
As shown in fig. 3, in the present application, a self-test includes at least detecting a system power state of the first control unit.
Further, the system power state includes a normal state, a primary fault state, and a secondary fault state.
Preferably, the primary fault state may be that the level signal output of a certain pin is unstable, and the abnormal function of the pin does not cause the operation fault of the power supply system, for example, the abnormal level signal of the pin of the LED lamp is not limited to the above.
Preferably, the secondary fault state may be a display screen fault, a crash, a pin signal interrupt with communication function, etc., and is not limited thereto.
In the application, the primary self-checking result is obtained according to the system power state.
In the present application, the failure mechanism includes at least a primary failure mechanism and a secondary failure mechanism.
The primary failure mechanism includes: when the one-time self-checking result is that the system power state is in the primary fault state, the MCU control unit receives a preset instruction of the PMU power management unit through the SPI interface, and reads and records current fault information.
Preferably, the preset instruction may be to trigger the INT database, and the PMU power management unit outputs fault information in the INT database to the MCU control unit, and then the MCU control unit reads and records the fault information.
The secondary failure mechanism includes: when the primary self-checking result is that the system power state is in a secondary fault state, restarting the system power of the PMU power management unit, and if the system power state is still in a second fault state after restarting, closing the system power of the PMU power management unit; the PMU power management unit is restarted at least once for system power.
Preferably, the number of restarting times may be any parameter, such as 7, 8, 9, and 10, and is not limited thereto.
In the application, when the one-time self-checking result is in a normal state, a normal mechanism is started.
As shown in fig. 4, in the present application, the secondary self-test at least includes detecting the signal state of the MCU control unit and/or the system power state of the MCU control unit.
The signal states comprise a signal normal state and a signal abnormal state; the system power state of the MCU control unit comprises a system power normal state and a system power abnormal state.
And obtaining a secondary self-checking result according to the signal state of the MCU control unit and/or the system power state of the MCU control unit.
And the system power state of the MCU control unit is started to be detected only when the signal state is in the signal normal state.
In the application, the normal output or disconnection of the power supply is controlled according to the secondary self-checking result, specifically:
when the signal state is in the signal abnormal state, the PMU power management unit receives a preset level signal output by the MCU control unit through the ERR pin interface, and then outputs a preset reset instruction to the MCU control unit so as to reset the MCU control unit.
Preferably, the preset level signal may be ERR signal, the preset reset command may be RST reset signal, and after receiving the ERR signal, the PMU power management unit outputs RST to reset the MCU control unit, and then performs signal state detection, and if the signal state is normal, performs system power state detection of the MCU control unit.
When the secondary self-checking result is that the signal state is in the signal normal state and the system power state of the MCU control unit is in the normal state, the system power of the MCU control unit is controlled to be output normally.
When the secondary self-checking result is that the signal state is in the normal state and the system power state of the MCU control unit is in the abnormal state, restarting the system power of the PMU power management unit, and if the system power state of the MCU control unit is still in the abnormal state after restarting, controlling to shut down the system power of the PMU power management unit; the system power is restarted at least once.
Preferably, the power abnormality may be expressed as: the VMON signal between the MCU control unit and the PMU power management unit may exhibit either a pull-down level or a frequency error, neither of which is limited.
In summary, the embodiment of the application provides a detailed analysis and illustration for a circuit fault self-checking method, and the application realizes the circuit fault self-checking without setting external detection equipment by mutually monitoring, self-checking the PMU power management unit, self-checking the MCU control unit and mutually checking after the PMU power management unit and the MCU control unit are configured, protects the power supply circuit in time and feeds back and stores fault information, and improves the stability of a power supply system.
Embodiment two:
as shown in fig. 4, in order to solve the above technical problem, the present application further provides a circuit fault self-checking device, including:
the system comprises a first control module, a second control module and a fault self-checking module; the fault self-checking module comprises a first fault self-checking module and a second fault self-checking module.
Preferably, the first control module may be a PMU power management module, and the second control module may be an MCU control module.
In this application, the first control module and the second control module are configured through a preset serial external device interface connection; the first control unit and the second control unit are in one-to-one correspondence and mutually monitor circuit abnormality.
Preferably, the preset serial external device interface may be an SPI or IIC interface, neither of which is limited thereto.
The first fault self-checking module is at least used for primary circuit self-checking and primary self-checking of the first control module.
The second fault self-checking module is used for secondary self-checking of the second control module.
In the application, when the primary circuit self-check of the first control module is normal, the second control module is started; after secondary power-on, the first control module completes primary self-checking, and a fault mechanism or a normal mechanism is selected to be started according to a primary self-checking result; and only when the mechanism is normal, the second control module completes secondary self-checking, and controls normal output or disconnection of the power supply according to a secondary self-checking result.
When the primary circuit self-check of the PMU power management module is normal, the MCU control module is started, then the PMU power management module and the MCU control module establish safety function configuration through an SPI or IIC interface, the system can enter a dormant state after the configuration, after the system is awakened again for a preset time, for example, 10 minutes, the PMU power management module can perform primary self-check, when the primary self-check is normal, the MCU control unit performs secondary self-check, and when the secondary self-check result is normal, the power supply is controlled to output normally.
When the primary circuit self-check of the PMU power management module is abnormal, repeating the primary circuit self-check, and if the result of the primary circuit self-check is abnormal, not starting the MCU control unit, and at the moment, closing the output of the PMU power management unit.
Preferably, the number of times the circuit self-test is repeated once may be set to any parameter, for example, 8, 9, 10, or the like, without being limited thereto.
When the one-time self-checking result is that the system power state is in the primary fault state, the MCU control unit receives a preset instruction of the PMU power management unit through the SPI interface, and reads and records current fault information.
When the primary self-checking result is that the system power state is in a secondary fault state, restarting the system power of the PMU power management unit, and if the system power state is still in a second fault state after restarting, closing the system power of the PMU power management unit; the PMU power management unit is restarted at least once for system power.
Preferably, the number of restarting times may be any parameter, for example, 5, 6, 7, and 8, and is not limited thereto.
When the signal state is in the signal abnormal state, the PMU power management unit receives a preset level signal output by the MCU control unit through the ERR pin interface, and then outputs a preset reset instruction to the MCU control unit so as to reset the MCU control unit.
Preferably, the preset level signal may be ERR signal, the preset reset command may be RST reset signal, and after receiving the ERR signal, the PMU power management unit outputs RST to reset the MCU control unit, and then performs signal state detection, and if the signal state is normal, performs system power state detection of the MCU control unit.
When the secondary self-checking result is that the signal state is in the normal state and the system power state of the MCU control unit is in the abnormal state, restarting the system power of the PMU power management unit, and if the system power state of the MCU control unit is still in the abnormal state after restarting, controlling to shut down the system power of the PMU power management unit; the system power is restarted at least once.
Preferably, the power abnormality may be expressed as: the VMON signal between the MCU control unit and the PMU power management unit may exhibit either a pull-down level or a frequency error, neither of which is limited.
In summary, the second embodiment makes detailed analysis and illustration for the circuit fault self-checking device provided by the application, which is convenient and visual to understand the connection and effect of each unit in the whole device, and the scheme of the application can be more clearly represented by combining the circuit fault self-checking method.
Embodiment III:
as shown in fig. 5, in order to solve the above technical problem, the present application further provides a circuit fault self-checking controller, including:
the system comprises a first controller, a second controller and a fault self-checking circuit.
Preferably, the first controller may be a PMU power management controller and the second controller may be an MCU controller.
The first controller and the second controller are respectively connected with the fault self-checking circuit, are connected and configured through a preset serial external equipment interface of the fault self-checking circuit, and are started when the self-checking of the first controller is normal; the first controllers and the second controllers are in one-to-one correspondence and mutually conduct circuit abnormality monitoring.
After the first controller completes one self-checking, a fault mechanism or a normal mechanism is started according to a one-time self-checking result; and only when the mechanism is normal, the second controller completes secondary self-checking, and controls normal output or disconnection of the power supply according to the secondary self-checking result.
Preferably, the fault self-checking circuit is mainly represented by corresponding connection of each pin in the PMU power management controller and the MCU controller, for example:
and the SPI/IIC pin is used for communication between the PMU power management controller and the MCU controller, transmitting instructions and reading information.
WD pin in the PMU power management controller is connected with GPIO pin in the MCU controller and used as a watchdog, and the MCU controller triggers the watchdog when detecting abnormality, and the PMU power management controller resets after receiving signals.
The FS pin in the PMU power management controller is used as the error action pin of the PMU power management controller, which is pulled low when an error occurs.
The VMON pin in the MCU controller is connected with the FM pin in the PMU power management controller, and the signals monitored by the MCU controller are transmitted to the PMU power management controller through the VMON pin.
ERR pin is set in PMU power management controller and MCU controller, when MCU controller detects fault, it directly outputs corresponding level signal to PMU power management controller.
INT pin, set in PMU power management controller and MCU controller, the PMU power management controller detects the non-fatal fault and informs MCU controller to let MCU controller read the non-fatal information.
RST pin is set in PMU power management controller and MCU controller, when fault occurs, PMU power management controller resets MCU controller.
In the present application, when the computer program is executed by the processor, the processes of the above embodiments of the interface display method are implemented, and the same technical effects can be achieved, so that repetition is avoided, and no detailed description is given here. Wherein the computer readable storage medium is selected from Read-Only Memory (ROM), random access Memory (Random Access Memory, RAM), magnetic disk or optical disk.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
From the above description of the embodiments, it will be clear to those skilled in the art that the above-described embodiment method may be implemented by means of software plus a necessary general hardware platform, but of course may also be implemented by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) comprising instructions for causing a terminal (which may be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to perform the method according to the embodiments of the present application.
The embodiments of the present application have been described above with reference to the accompanying drawings, but the present application is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many forms may be made by those having ordinary skill in the art without departing from the spirit of the present application and the scope of the claims, which are to be protected by the present application.
Claims (10)
1. A method of self-checking for circuit faults, comprising:
after primary power-on, configuring a first control unit and a second control unit; the first control unit and the second control unit are in one-to-one correspondence and mutually monitor circuit abnormality;
after the secondary power-on, the first control unit completes one-time self-checking, and a fault mechanism or a normal mechanism is selected to be started according to the result of the one-time self-checking; and only when the mechanism is normal, the second control unit completes secondary self-checking, and controls normal output or disconnection of the power supply according to the secondary self-checking result.
2. A circuit fault self-checking method according to claim 1, wherein, before said configuring the first control unit and the second control unit,
further comprises: performing primary circuit self-checking on the first control unit;
the primary circuit self-checking method specifically comprises the following steps:
when the result of the primary circuit self-test is normal, starting the second control unit;
and when the result of the primary circuit self-test is abnormal, repeating the primary circuit self-test, and if the result of the primary circuit self-test is abnormal, not starting the second control unit.
3. The circuit fault self-checking method according to claim 2, wherein the configuring the first control unit and the second control unit specifically comprises:
after the second control unit is started, the second control unit establishes configuration for the first control unit through a preset serial external device interface.
4. A circuit fault self-checking method according to claim 3, wherein said one self-checking comprises at least detecting a system power state of said first control unit;
the system power state comprises a normal state, a primary fault state and a secondary fault state;
and obtaining the primary self-checking result according to the system power state.
5. The circuit fault self-checking method according to claim 4, wherein said fault mechanism comprises at least a primary fault mechanism and a secondary fault mechanism;
the primary failure mechanism includes: when the primary self-checking result shows that the system power state is in a primary fault state, the second control unit receives a preset instruction of the first control unit through a preset serial external equipment interface, and reads and records current fault information;
the secondary failure mechanism includes: restarting the system power supply of the first control unit when the system power supply state is in the secondary fault state as a result of one-time self-checking, and closing the system power supply of the first control unit if the system power supply state is still in the serious fault state after restarting; and restarting the system power supply of the first control unit at least once.
6. The circuit fault self-checking method according to claim 5, wherein when the one self-checking result is a normal state, the normal mechanism is started.
7. The circuit fault self-checking method according to claim 6, wherein the secondary self-checking comprises at least detecting a signal state of the second control unit and/or a system power state of the second control unit;
the signal states comprise a signal normal state and a signal abnormal state; the system power state of the second control unit comprises a system power normal state and a system power abnormal state;
obtaining the secondary self-checking result according to the signal state of the second control unit and/or the system power state of the second control unit;
wherein the detection of the system power state of the second control unit is started only when the signal state is in a signal normal state.
8. The circuit fault self-checking method according to claim 7, wherein said controlling the normal output or disconnection of the power supply according to the secondary self-checking result comprises:
when the signal state is in a signal abnormal state, the first controller unit receives a preset level signal output by the second control unit through a preset serial external device interface, and then outputs a preset reset instruction to the second control unit so as to reset the second control unit;
when the secondary self-checking result is that the signal state is in a signal normal state and the system power state of the second control unit is in a normal state, controlling the system power of the second control unit to be output normally;
restarting the system power when the secondary self-checking result is that the signal state is in a signal normal state and the system power state of the second control unit is in an abnormal state, and controlling to turn off the system power of the first control unit if the system power state of the second control unit is in an abnormal state after restarting; and restarting the system power supply at least once.
9. A circuit fault self-checking device, comprising:
the system comprises a first control module, a second control module and a fault self-checking module; the fault self-checking module comprises a first fault self-checking module and a second fault self-checking module;
the first control module and the second control module are connected through a preset serial external equipment interface for configuration; the first control unit and the second control unit are in one-to-one correspondence and mutually monitor circuit abnormality;
the first fault self-checking module is at least used for primary circuit self-checking and primary self-checking of the first control module;
the second fault self-checking module is used for secondary self-checking of the second control module;
when the primary circuit self-check of the first control module is normal, the second control module is started; after secondary power-on, the first control module completes primary self-checking, and a fault mechanism or a normal mechanism is selected to be started according to a primary self-checking result; and only when the mechanism is normal, the second control module completes secondary self-checking, and controls normal output or disconnection of the power supply according to a secondary self-checking result.
10. A circuit fault self-checking controller, comprising:
the system comprises a first controller, a second controller and a fault self-checking circuit;
the first controller and the second controller are respectively connected with the fault self-checking circuit, are connected and configured through a preset serial external equipment interface of the fault self-checking circuit, and are started when the self-checking of the first controller is normal; the first controllers and the second controllers are in one-to-one correspondence and mutually perform circuit abnormality monitoring;
after the first controller completes one self-checking, a fault mechanism or a normal mechanism is started according to a one-time self-checking result; and only when the mechanism is normal, the second controller completes secondary self-checking, and controls normal output or disconnection of the power supply according to the secondary self-checking result.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310906208.9A CN116859217A (en) | 2023-07-24 | 2023-07-24 | Circuit fault self-checking method, device and controller |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310906208.9A CN116859217A (en) | 2023-07-24 | 2023-07-24 | Circuit fault self-checking method, device and controller |
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| Publication Number | Publication Date |
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| CN116859217A true CN116859217A (en) | 2023-10-10 |
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|---|---|---|---|
| CN202310906208.9A Pending CN116859217A (en) | 2023-07-24 | 2023-07-24 | Circuit fault self-checking method, device and controller |
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| Country | Link |
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| CN (1) | CN116859217A (en) |
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