CN116705495A - Preparation method of high-performance integrated inductor - Google Patents
Preparation method of high-performance integrated inductor Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title abstract description 11
- 239000010410 layer Substances 0.000 claims abstract description 100
- 238000000034 method Methods 0.000 claims abstract description 52
- 230000008569 process Effects 0.000 claims abstract description 36
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 33
- 239000000758 substrate Substances 0.000 claims abstract description 29
- 238000009713 electroplating Methods 0.000 claims abstract description 18
- 239000012792 core layer Substances 0.000 claims abstract description 17
- 238000000151 deposition Methods 0.000 claims abstract description 7
- 239000011810 insulating material Substances 0.000 claims abstract description 7
- 239000010949 copper Substances 0.000 claims description 42
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 13
- 229910052751 metal Inorganic materials 0.000 claims description 13
- 238000004519 manufacturing process Methods 0.000 claims description 12
- 229910045601 alloy Inorganic materials 0.000 claims description 7
- 239000000956 alloy Substances 0.000 claims description 7
- 229910052681 coesite Inorganic materials 0.000 claims description 7
- 229910052906 cristobalite Inorganic materials 0.000 claims description 7
- 239000000377 silicon dioxide Substances 0.000 claims description 7
- 235000012239 silicon dioxide Nutrition 0.000 claims description 7
- 229910052682 stishovite Inorganic materials 0.000 claims description 7
- 229910052905 tridymite Inorganic materials 0.000 claims description 7
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 6
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 6
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 6
- 229910019586 CoZrTa Inorganic materials 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 150000004767 nitrides Chemical class 0.000 claims description 5
- 150000001875 compounds Chemical class 0.000 claims description 3
- 229910052732 germanium Inorganic materials 0.000 claims description 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 3
- 239000003292 glue Substances 0.000 claims description 3
- 229910003465 moissanite Inorganic materials 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 claims description 3
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 claims description 2
- MPTQRFCYZCXJFQ-UHFFFAOYSA-L copper(II) chloride dihydrate Chemical compound O.O.[Cl-].[Cl-].[Cu+2] MPTQRFCYZCXJFQ-UHFFFAOYSA-L 0.000 claims description 2
- 238000005516 engineering process Methods 0.000 abstract description 7
- 238000006243 chemical reaction Methods 0.000 abstract description 4
- 239000011162 core material Substances 0.000 description 39
- 238000000059 patterning Methods 0.000 description 16
- 238000010586 diagram Methods 0.000 description 13
- 239000010408 film Substances 0.000 description 12
- 238000004804 winding Methods 0.000 description 7
- 230000001939 inductive effect Effects 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000011161 development Methods 0.000 description 5
- 230000018109 developmental process Effects 0.000 description 5
- 239000000696 magnetic material Substances 0.000 description 5
- 238000005457 optimization Methods 0.000 description 5
- 238000004528 spin coating Methods 0.000 description 5
- 238000001312 dry etching Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 230000001976 improved effect Effects 0.000 description 4
- 239000011241 protective layer Substances 0.000 description 4
- 238000005260 corrosion Methods 0.000 description 3
- 230000007797 corrosion Effects 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 239000011259 mixed solution Substances 0.000 description 3
- 239000002356 single layer Substances 0.000 description 3
- 239000000243 solution Substances 0.000 description 3
- 230000002378 acidificating effect Effects 0.000 description 2
- 239000012670 alkaline solution Substances 0.000 description 2
- 230000003064 anti-oxidating effect Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 230000005415 magnetization Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000007800 oxidant agent Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 230000035699 permeability Effects 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 239000003963 antioxidant agent Substances 0.000 description 1
- 230000003078 antioxidant effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003638 chemical reducing agent Substances 0.000 description 1
- 230000002860 competitive effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000013386 optimize process Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 230000008093 supporting effect Effects 0.000 description 1
- 230000001960 triggered effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H01F41/02—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
- H01F41/04—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
- H01F41/041—Printed circuit coils
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/0006—Printed inductances
- H01F17/0013—Printed inductances with stacked layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/04—Fixed inductances of the signal type with magnetic core
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F27/00—Details of transformers or inductances, in general
- H01F27/34—Special means for preventing or reducing unwanted electric or magnetic effects, e.g. no-load losses, reactive currents, harmonics, oscillations, leakage fields
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H01F41/02—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H01F41/02—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
- H01F41/04—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
- H01F41/12—Insulating of windings
- H01F41/125—Other insulating structures; Insulating between coil and core, between different winding sections, around the coil
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H01F41/14—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H01F41/32—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying conductive, insulating or magnetic material on a magnetic film, specially adapted for a thin magnetic film
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/0006—Printed inductances
- H01F2017/0066—Printed inductances with a magnetic layer
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- Engineering & Computer Science (AREA)
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- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Coils Or Transformers For Communication (AREA)
Abstract
The invention provides a preparation method of a high-performance integrated inductor, which comprises the following steps: paving a first substrate; depositing a layer of insulating material on the upper surface of the first substrate for preventing electromagnetic signals from leaking into the first substrate; forming a copper wire on the insulating layer by adopting an electroplating process, and taking the copper wire as a part of the wire of the inductor; forming a second insulating layer medium on the copper wire for isolating the copper wire from the magnetic core; forming a magnetic core layer on the second insulating layer medium; forming a third insulating layer medium on the upper surface of the magnetic core layer; and forming another part of the copper wire on the upper surface of the third insulating layer medium in an electroplating mode, connecting the other part of the copper wire with the copper wire at the bottom to form a spiral tube structure, and positioning the magnetic core in the middle part of the spiral tube structure. The high-performance integrated magnetic core inductance technology can also improve the energy conversion efficiency and the high-frequency stability of the circuit.
Description
Technical Field
The invention relates to the field of integrated inductors, in particular to a preparation method of a high-performance integrated inductor.
Background
The rapid popularity of portable electronics, smart devices and systems has triggered great interest in the industry and academia in the miniaturization and integration of power delivery subsystems. Furthermore, with the advent and development of system on chip (SoC), packaging System (SiP) and power on chip (pwrcc) platforms, these trends also include integrated packaging technologies. One of the biggest challenges in implementing such an integrated platform is the miniaturization of passive components. Inductive devices are one of the basic passive components, and since the early days of simple metal coils, the inductive technology has advanced a long distance. In recent years, inductors have evolved to the most advanced state, enabling large scale integration on Si chips. These on-chip inductors have driven a variety of applications, with their impact being primarily reflected in Radio Frequency (RF) and power applications. Thus, the broader impact of high performance compatible on-chip inductors means that conventional radio frequency and hybrid radio frequency and power supply systems (traditionally implemented with large and bulky inductors) will be given the capabilities by these developments. Specific applications may include, but are not limited to, DC-DC converters, RFICs for LC filters, multi-core processors and EMI noise reducers, isolators, circulators, nonreciprocal phase shifters, and tunable components.
The inductance value of the current main stream is smaller, but the consumed area is larger. The magnetic circuit and the magnetic material are integrated into a circuit system, which is one of the reasons for the complexity of the micro-inductor, but the magnetic circuit and the magnetic material are also important means for improving the comprehensive performance of the micro-inductor, the inductance value of the hollow thin film device is improved by a plurality of times due to the reasonable integration of the magnetic core, and the quality factor is also obviously improved. For the inductor with the magnetic core, the inductance value L and the quality factor Q are positively related to the relative magnetic permeability of the magnetic core, so that the proper soft magnetic material is selected and the accuracy of magnetic circuit forming can be well controlled, and the inductor is important for high-performance micro-inductor design and manufacture. According to practical application requirements, particularly performance requirements of high-frequency magnetic devices, the following requirements are set on the high-frequency soft magnetic thin film: 1. high saturation magnetization; 2. high resistivity; 3. a low coercivity; 4. a suitable anisotropy field; 5. good thermal stability.
Disclosure of Invention
The present invention has been made in view of the above problems, and has as its object to provide a method for manufacturing a high-performance integrated inductor which overcomes or at least partially solves the above problems.
According to an aspect of the present invention, there is provided a method of manufacturing a high-performance integrated inductor, the method comprising:
paving a first substrate;
depositing a layer of insulating material on the upper surface of the first substrate for preventing electromagnetic signals from leaking into the first substrate;
forming a copper wire on the insulating layer by adopting an electroplating process, and taking the copper wire as a part of the wire of the inductor;
forming a second insulating layer medium on the copper wire for isolating the copper wire from the magnetic core;
forming a magnetic core layer on the second insulating layer medium;
forming a third insulating layer medium on the upper surface of the magnetic core layer;
and forming another part of the copper wire on the upper surface of the third insulating layer medium in an electroplating mode, connecting the other part of the copper wire with the copper wire at the bottom to form a spiral tube structure, and positioning the magnetic core in the middle part of the spiral tube structure.
Optionally, the material of the first substrate is silicon Si, silicon carbide SiC, germanium Ge, gallium arsenide GaAs or other group iii/v compound semiconductors or is on the back of the substrate of the CMOS chip.
Optionally, the insulating substance is a thin layer medium of oxide or nitride.
Optionally, the forming a copper trace on the insulating layer by using an electroplating process, and the winding as a part of the inductor specifically includes:
depositing a Ti/Cu or Cr/Cu seed layer on the insulating layer;
and (5) carrying out graphical Cu electroplating through a thick glue process to form a copper wire at the bottom.
Optionally, the second insulating layer medium is any one of a thin inorganic medium, PI and BCB insulating medium film.
Optionally, the magnetic core layer is of a laminated combined structure of an alloy layer and an insulating layer, the alloy layer is a CoZrTa/NiFe/CoZrTaB/CoZrO/FeGeB magnetic metal layer, and the insulating layer is a SiO2/AlN/CoZrTaO/CoO thin-layer medium.
Optionally, the thickness of the magnetic core layer is 2-12 um.
Optionally, the forming a third insulating layer medium on the upper surface of the magnetic core layer specifically includes:
and forming a through hole via on the second insulating layer medium to connect the copper wire at the bottom.
The invention provides a preparation method of a high-performance integrated inductor, which comprises the following steps: paving a first substrate; depositing a layer of insulating material on the upper surface of the first substrate for preventing electromagnetic signals from leaking into the first substrate; forming a copper wire on the insulating layer by adopting an electroplating process, and taking the copper wire as a part of the wire of the inductor; forming a second insulating layer medium on the copper wire for isolating the copper wire from the magnetic core; forming a magnetic core layer on the second insulating layer medium; forming a third insulating layer medium on the upper surface of the magnetic core layer; and forming another part of the copper wire on the upper surface of the third insulating layer medium in an electroplating mode, connecting the other part of the copper wire with the copper wire at the bottom to form a spiral tube structure, and positioning the magnetic core in the middle part of the spiral tube structure. The invention provides a high-performance integrated inductance technical scheme based on a magnetic core film combined by a subsequent process, which has higher Q value, high inductance density and high power density; meanwhile, in order to further reduce the demand, an inductance device supporting higher frequency is developed; the high-performance integrated magnetic core inductance technology can also improve the energy conversion efficiency and the high-frequency stability of the circuit.
The foregoing description is only an overview of the present invention, and is intended to be implemented in accordance with the teachings of the present invention in order that the same may be more clearly understood and to make the same and other objects, features and advantages of the present invention more readily apparent.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a substrate preparation process according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an insulating layer formed on a substrate according to an embodiment of the present invention;
FIG. 3 is a schematic view of a metal wire with a bottom formed according to an embodiment of the present invention;
FIG. 4 is a schematic diagram illustrating formation of a second insulating layer according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of the preparation and patterning of a magnetic core film according to an embodiment of the present invention;
FIG. 6 is a schematic diagram illustrating formation and patterning of a third dielectric layer according to an embodiment of the present invention;
FIG. 7 is a schematic view of a metal wire forming a top portion according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of a second insulating layer according to an embodiment of the present invention;
FIG. 9 is a schematic diagram of the preparation and patterning of a magnetic core film according to an embodiment of the present invention;
fig. 10 is a schematic diagram illustrating formation and patterning of a third insulating layer according to an embodiment of the present invention;
FIG. 11 is a schematic diagram illustrating the formation of a top metal wire according to an embodiment of the present invention;
fig. 12 is a schematic diagram of an optimized structure of a second insulating dielectric layer according to an embodiment of the present invention;
FIG. 13 is a schematic diagram of the preparation and patterning of a magnetic core film according to an embodiment of the present invention;
fig. 14 is a schematic diagram illustrating formation and patterning of a third insulating layer according to an embodiment of the present invention;
FIG. 15 is a schematic view of a second mode of forming a top metal wire according to an embodiment of the present invention;
fig. 16 is a schematic structural diagram of a high performance integrated inductor according to an embodiment of the present invention.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
The terms "comprising" and "having" and any variations thereof in the description embodiments of the invention and in the claims and drawings are intended to cover a non-exclusive inclusion, such as a series of steps or elements.
The technical scheme of the invention is further described in detail below with reference to the accompanying drawings and the examples.
Example 1
The invention provides a high-performance integrated inductor adopting a single-layer magnetic core, which has the characteristics of low coil resistance and small area. The inductive device exhibits very high inductive gain and large inductive density relative to the hollow core type. The present invention is described by taking a solenoid structure of a single-layer magnetic core as an example.
The specific process of the integrated magnetic core inductor of the invention is described as follows:
in this embodiment, as shown in fig. 1, the first substrate is any suitable substrate 1 commonly known in the art: silicon Si, silicon carbide SiC, germanium Ge, gallium arsenide GaAs or other III/V group compound semiconductors are arranged on the back surface of a substrate of a CMOS chip, and the substrate has high resistance or low resistance; the present embodiment is described taking a silicon substrate as an example.
An insulating material is deposited on a silicon substrate to prevent electromagnetic signals from leaking into the substrate, the insulating material can be a thin-layer medium such as oxide, nitride and the like, and the invention uses a thermal oxidation mode to form a SiO2 insulating layer 2 with the thickness of 0.1-10 um on the surface of the silicon substrate by taking SiO2 as an example, as shown in figure 2.
Copper wiring is formed on the insulating layer through an electroplating process to serve as part of winding of the inductor, specifically, a seed layer such as Ti/Cu or Cr/Cu is deposited on the insulating layer, then Cu is electroplated in a patterning mode through a thick glue process, and a bottom Cu winding 3 is formed, as shown in fig. 3.
Forming a second insulating layer medium 4 on Cu to isolate the Cu coil and the magnetic core; may be a common thin inorganic dielectric or a PI or BCB dielectric film as is common in RDL processes, as shown in fig. 4. The second insulating substance needs to be thicker, and PI is taken as an example for illustration.
Forming the magnetic core layer 5 on the second insulating layer, the magnetic medium needs to meet the following requirements: high saturation magnetization; high resistivity; a low coercivity; a suitable anisotropy field; high frequency stability; therefore, the selection and preparation modes of the magnetic materials need to combine the performance requirements and the compatibility of the process;
the invention selects the laminated combined structure of the alloy/insulating layer with high magnetic conductivity, comprehensively meets the requirements, wherein the alloy layer is
The insulating layer is a SiO2/AlN/CoZrTaO/CoO thin layer medium.
In this example, a CoZrTa/CoZrTaO laminate combination was selected, and the core thickness was about 2 to 12um. The alloy is close to the insulating layer material properties, patterned with a simultaneous wet process and then the core is patterned as shown in fig. 5.
A third dielectric layer 6 is formed on the magnetic core material, as shown in step four, in this embodiment, PI is taken as an example, and then a via is formed on PI to connect the Cu wiring at the bottom, as shown in fig. 6.
Another part 7 of the Cu winding is formed on the third insulating layer in an electroplating way and is connected with the bottom Cu to form a spiral tube structure, wherein a magnetic core is positioned at the middle part of the spiral tube, so that the magnetic permeability of a magnetic channel is increased; as shown in fig. 7, an integrated inductive device is formed in a basic toroidal structure incorporating a magnetic core film.
The six steps relate to the opening of the thick insulating layer PI, and the conventional modes at present are ICP_RIE and O_plasma mode, which have lower efficiency and long etching time and are easy to cause high Wen Hujiao; in addition, some commonly used photoresist masks are not applicable any more in the step, and an additional etched hard mask and mask removal process are required to be deposited;
the optimization process scheme mainly relates to: and (3) an open pore patterning process (about 3-15 um of a PI single layer) of the thick PI, and a bottom Cu protection process after the second insulating layer PI is opened.
Example 2
As shown in fig. 8 to 11, the substrate 11, the SiO2 layer insulating layer 12, the Cu wiring 13 at the bottom, the second insulating layer dielectric 14, the magnetic core layer 15 formed on the second insulating layer, the third dielectric layer 16, and the other portion 17 of the Cu wiring formed by electroplating on the third insulating layer.
One of the optimization schemes is to adopt a nitride/oxide as a bottom Cu protection layer and combine with a PI developing and patterning process, PI in the process can be directly exposed to be patterned, and the PI opening process is very efficient and low in cost, and the specific process implementation is as follows;
a thin nitride/oxide protective layer 19 is deposited by PVD or CVD over the underlying Cu, in this embodiment described as SiN, to a thickness of about 0.1-2 um; then, a second dielectric layer PI is formed and patterned in the same manner as in the fourth step, as shown in fig. 8.
Forming a magnetic core film with the thickness of 2-20 um on the second junction dielectric layer PI, and patterning by a dry method or a wet method or a liftoff process; when the thickness of the magnetic core is more than a few micrometers, the dry etching efficiency is low, the magnetic core is mainly formed by lamination combination of CoZrTa/CoZrTaO in a wet mode, and the wet solution is acidic or alkaline or mixed solution of the magnetic core and an oxidant and the like so as to improve the wet etching rate. In this embodiment, mixed solution such as HF is taken as an example, and a Cu protection layer is used to protect Cu from corrosion and Cu is exposed to air and oxidized after window opening, and the magnetic core is patterned as shown in fig. 9.
And forming a third dielectric layer PI on the magnetic core to avoid contact between the magnetic core material and the Cu wire, and performing exposure development patterning after PI spin coating, as shown in FIG. 10.
The SiN of the Cu protection layer is removed by adopting a dry etching method, the bottom Cu is exposed, then the upper Cu layer is electroplated and connected with the bottom Cu layer, and the winding of the spiral tube inductor is formed, as shown in FIG. 11.
Example 3
As shown in fig. 12 to 15, the substrate 21, the SiO2 layer insulating layer 22, the Cu wiring 23 at the bottom, the second insulating layer dielectric 24, the magnetic core layer 25 formed on the second insulating layer, the third dielectric layer 26, and the other portion 27 of the Cu wiring formed by electroplating on the third insulating layer.
One of the optimization schemes is to adopt an antioxidation metal and a thin PI or BCB dielectric layer as a bottom Cu protective layer; in this embodiment, PI is taken as an example, and a PI-combined development patterning process is used, and PI of the process can be directly exposed to perform patterning, so that the PI hole opening process is very efficient, and meanwhile, a PVD or CVD process for depositing dielectric films such as SiN is omitted, thereby effectively reducing cost.
The specific process implementation is described below;
electroplating a thin inert metal 29 which is Au/Ag/Pt/Mo on the bottom Cu, wherein the thin Au is used as an antioxidant metal in the embodiment, and the thin Au is formed in an electroplating manner as the bottom Cu; the thickness is 0.1-0.5 um, and then the second dielectric layer PI24 is subjected to 2-stage spin coating; wherein, the PI spin coating in the first stage is about 0.5-2 um higher than the metal, and the PI solidification process is directly carried out without patterning; then, the second stage PI spin-coating is carried out for about 4um, and the patterned through hole position is developed, wherein the process is shown in figure 12, wherein Au is used for removing antioxidation and metal connection effects after the thin layer PI is used for protecting the corrosion of the metal by the wet process of the magnetic material;
forming a magnetic core film with the thickness of 2-20 um on the second junction dielectric layer PI, and patterning by a dry method or a wet method or a liftoff process; when the thickness of the magnetic core is more than a few micrometers, the dry etching efficiency is low, the magnetic core is mainly formed by lamination combination of CoZrTa/CoZrTaO in a wet mode, and the wet solution is acidic or alkaline or mixed solution of the magnetic core and an oxidant and the like so as to improve the wet etching rate.
The embodiment uses HF and HNO 3 、H 2 O 2 The moderating liquid is used as an example, a Cu protective layer is used for protecting Cu from corrosion and Cu from oxidation in the air exposed after the window is opened, and the magnetic core is patterned as shown in figure 13.
And forming a third dielectric layer PI on the magnetic core to avoid contact between the magnetic core material and the Cu wire, and performing exposure development patterning after PI spin coating, as shown in FIG. 14.
Removing the Cu protective layer PI by adopting a dry etching method to expose the bottom Cu/Au; PI thin layer etching is performed in an optimized mode, and the thickness is removed rapidly by ICP-RIE or O-plasma; meanwhile, the maskless etching is directly carried out, the preparation and removal process of a mask are omitted, then upper Cu is electroplated and connected with the lower Cu to form a winding of the spiral tube inductor, and the winding is shown in fig. 15, wherein a dotted line area is a thin-layer PI etching removal illustration.
The optimized process steps in the invention better realize the integrated magnetic core spiral inductance, and the inductance device has very high inductance gain and large inductance density relative to the hollow shell.
An inductance device implemented by adopting the optimization process according to an embodiment of the invention is shown in fig. 16.
The beneficial effects are that: based on MEMS technology, the coil is innovatively combined with a magnetic film through a substrate back surface re-wiring technology (RDL) to form a small-size high-frequency high-Q-value inductance device. The conventional integrated inductor has larger area and lower Q value, and the inductor density and the Q value are improved through the combination of optimization and the magnetic film;
the power density and the conversion efficiency of the inductance device are improved, and the inductance device has very practical significance in power application aspects such as power supply and the like. The processing technology of the magnetic integrated inductor is synchronously optimized, and a novel integrated inductor device with small volume, low manufacturing cost and high performance is developed. The high-performance integrated magnetic core inductance technology can also improve the energy conversion efficiency, the high-frequency stability performance of the circuit and the like. The invention aims to develop a novel integrated inductance process with small volume, low manufacturing cost and high performance, and designs an inductance device with more competitive power.
The foregoing detailed description of the invention has been presented for purposes of illustration and description, and it should be understood that the invention is not limited to the particular embodiments disclosed, but is intended to cover all modifications, equivalents, alternatives, and improvements within the spirit and principles of the invention.
Claims (8)
1. A method for manufacturing a high performance integrated inductor, the method comprising:
paving a first substrate;
depositing a layer of insulating material on the upper surface of the first substrate for preventing electromagnetic signals from leaking into the first substrate;
forming a copper wire on the insulating layer by adopting an electroplating process, and taking the copper wire as a part of the wire of the inductor;
forming a second insulating layer medium on the copper wire for isolating the copper wire from the magnetic core;
forming a magnetic core layer on the second insulating layer medium;
forming a third insulating layer medium on the upper surface of the magnetic core layer;
and forming another part of the copper wire on the upper surface of the third insulating layer medium in an electroplating mode, connecting the other part of the copper wire with the copper wire at the bottom to form a spiral tube structure, and positioning the magnetic core in the middle part of the spiral tube structure.
2. The method of claim 1, wherein the first substrate is made of silicon Si, silicon carbide SiC, germanium Ge, gallium arsenide GaAs, or other group iii/v compound semiconductors, or is on the back side of the substrate of the CMOS chip.
3. The method for manufacturing a high performance integrated inductor according to claim 1, wherein the insulating material is a thin layer medium of oxide or nitride.
4. The method for manufacturing a high performance integrated inductor according to claim 1, wherein the forming a copper trace on the insulating layer by using an electroplating process, and the forming a trace as a part of the inductor specifically comprises:
depositing a Ti/Cu or Cr/Cu seed layer on the insulating layer;
and (5) carrying out graphical Cu electroplating through a thick glue process to form a copper wire at the bottom.
5. The method for manufacturing a high-performance integrated inductor according to claim 1, wherein the second insulating layer medium is any one of a thin inorganic medium, PI, BCB insulating medium film.
6. The method for manufacturing the high-performance integrated inductor according to claim 1, wherein the magnetic core layer is of a laminated combination structure of an alloy layer and an insulating layer, the alloy layer is a CoZrTa/NiFe/CoZrTaB/CoZrO/FeGeB magnetic metal layer, and the insulating layer is a SiO2/AlN/CoZrTaO/CoO thin-layer medium.
7. The method of manufacturing a high performance integrated inductor according to claim 1, wherein the thickness of the magnetic core layer is 2-12 um.
8. The method for manufacturing a high-performance integrated inductor according to claim 1, wherein forming a third insulating layer medium on the upper surface of the magnetic core layer specifically comprises: and forming a through hole via on the second insulating layer medium to connect the copper wire at the bottom.
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| CN202310738949.0A CN116705495A (en) | 2023-06-20 | 2023-06-20 | Preparation method of high-performance integrated inductor |
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| CN202310738949.0A CN116705495A (en) | 2023-06-20 | 2023-06-20 | Preparation method of high-performance integrated inductor |
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