CN116567246A

CN116567246A - AVC coding method and device

Info

Publication number: CN116567246A
Application number: CN202310671103.XA
Authority: CN
Inventors: 王剑光
Original assignee: Jingdong Technology Information Technology Co Ltd
Current assignee: Jingdong Technology Information Technology Co Ltd
Priority date: 2023-06-07
Filing date: 2023-06-07
Publication date: 2023-08-08

Abstract

The embodiment of the disclosure discloses an AVC encoding method and device. The specific implementation mode of the method comprises the following steps: HEVC coding is carried out on the video to obtain an HEVC coding block set, and depth division information of each HEVC coding block is counted according to frames; performing AVC coding on the video to obtain an AVC coding macro block set, and mapping the AVC coding macro block set and the HEVC coding block set; for each AVC coded macro block, determining the texture complexity of the AVC coded macro block according to the depth division information of the HEVC coded block mapped by the AVC coded macro block; adjusting the quantization parameter of each AVC encoding macro block according to the texture complexity of each AVC encoding macro block; and completing the AVC encoding process of the video based on the adjusted quantization parameter of each AVC encoding macro block. This embodiment improves video quality.

Description

AVC coding method and device

Technical Field

The embodiment of the disclosure relates to the technical field of video compression, in particular to an AVC coding method and device.

Background

The essence of video playback is to present a single image. If at least 24 images are played continuously in one second, then the human eye sees a continuous video picture. The video is watched on line through the mobile phone or the computer, and the images are firstly required to be transmitted to your computer or the mobile phone through the network, and one problem to be considered is the occupation condition of the video on the network bandwidth. AVC (Advanced Video Coding ) and HEVC (High Efficiency Video Coding, high efficiency video coding) are used as video compression standards, and their main tasks are to reduce bandwidth occupation of video transmission and improve transmission efficiency.

The existing code rate control algorithm based on the region generally utilizes the information of the current frame and the previous frame to quickly detect the moving region and the non-moving region. And then the non-motion area is further subdivided into a flat area and a complex area according to the complexity of the area where the macro block is located. Finally, the 3 regions are assigned an appropriate number of bits according to different visual sensitivity weights. However, the accuracy in practice of distinguishing between moving and non-moving regions based on macroblock complexity is not high. If scene switching is encountered, the calculation mode of the current frame and the previous frame can cause erroneous judgment.

Disclosure of Invention

The embodiment of the disclosure provides an AVC encoding method and device.

In a first aspect, embodiments of the present disclosure provide an AVC encoding method, including: HEVC coding is carried out on the video to obtain an HEVC coding block set, and depth division information of each HEVC coding block is counted according to frames; performing AVC coding on the video to obtain an AVC coding macro block set, and mapping the AVC coding macro block set and the HEVC coding block set; for each AVC coded macro block, determining the texture complexity of the AVC coded macro block according to the depth division information of the HEVC coded block mapped by the AVC coded macro block; adjusting the quantization parameter of each AVC encoding macro block according to the texture complexity of each AVC encoding macro block; and completing the AVC encoding process of the video based on the adjusted quantization parameter of each AVC encoding macro block.

In some embodiments, the determining the texture complexity of the AVC encoded macroblock according to the depth partition information of the HEVC encoded block to which the AVC encoded macroblock maps comprises: the HEVC coding block mapped by the AVC coding macro block is divided into 4 blocks of 32x32 again and recorded as an A code block, a B code block, a C code block and a D code block respectively; respectively counting the numbers A0-A3, B0-B3, C0-C3 and D0-D3 of 4x4 blocks with different depths contained in the A code block, the B code block, the C code block and the D code block; the texture complexity of the AVC encoded macroblock is determined from the duty ratio of the number of 4x4 blocks of different depths in the A code block, B code block, C code block, D code block.

In some embodiments, the determining the texture complexity of the AVC encoded macroblock according to the duty ratio of the number of 4x4 blocks of different depths in the a, B, C, and D code blocks includes: if (a0+a1)/64 > =first threshold, and A0/64> second threshold, preliminarily determining the AVC-encoded macroblock as a flat area, wherein the first threshold is greater than the second threshold; and adjusting the quantization parameter of each AVC coded macroblock according to the texture complexity of each AVC coded macroblock, comprising: the quantization parameter value of the AVC-coded macroblock of the flat area is subtracted by a first step size on the basis of the initial value.

In some embodiments, the determining the texture complexity of the AVC encoded macroblock according to the duty ratio of the number of 4x4 blocks of different depths in the a, B, C, and D code blocks includes: if (a2+a3)/64 > =second threshold value, and a0=0, the AVC-encoded macroblock is preliminarily decided as a complex region; and adjusting the quantization parameter of each AVC coded macroblock according to the texture complexity of each AVC coded macroblock, comprising: the quantization parameter value of the AVC encoded macro block of the complex region is added with a first step size on the basis of the initial value.

In some embodiments, the method further comprises: if (B0+B1)/64 > and (C0+C1)/64 > are the second threshold, and (D0+D1)/64 > are the third threshold, the AVC encoded macroblock is further determined to be a flat region, and the adjusted quantization parameter value of the AVC encoded macroblock is subtracted by a second step size, wherein the second step size is smaller than the first step size, and the third threshold is smaller than the second threshold.

In some embodiments, the method further comprises: if (B2+B3)/64 > and (C2+C3)/64 > are the second threshold, the AVC encoded macroblock is further determined to be a complex region, and the adjusted quantization parameter value of the AVC encoded macroblock is added to a second step size, wherein the second step size is smaller than the first step size.

In some embodiments, the method further comprises: if the preliminary decision result is opposite to the further decision result for the AVC encoded macroblock, the quantization parameter value for the AVC encoded macroblock is not adjusted.

In a second aspect, embodiments of the present disclosure provide an AVC encoding apparatus, including: the first coding unit is configured to perform HEVC coding on the video to obtain an HEVC coding block set, and statistics is carried out on depth division information of each HEVC coding block according to frames; the second coding unit is configured to perform AVC coding on the video to obtain an AVC coding macro block set, and map the AVC coding macro block set with the HEVC coding block set; a determining unit configured to determine, for each AVC-encoded macroblock, a texture complexity of the AVC-encoded macroblock from depth partition information of an HEVC-encoded block to which the AVC-encoded macroblock maps; an adjusting unit configured to adjust a quantization parameter of each AVC-coded macroblock according to a texture complexity of each AVC-coded macroblock; and a third encoding unit configured to complete an AVC encoding process of the video based on the adjusted quantization parameter of each AVC encoded macroblock.

In some embodiments, the determining unit is further configured to: the HEVC coding block mapped by the AVC coding macro block is divided into 4 blocks of 32x32 again and recorded as an A code block, a B code block, a C code block and a D code block respectively; respectively counting the numbers A0-A3, B0-B3, C0-C3 and D0-D3 of 4x4 blocks with different depths contained in the A code block, the B code block, the C code block and the D code block; the texture complexity of the AVC encoded macroblock is determined from the duty ratio of the number of 4x4 blocks of different depths in the A code block, B code block, C code block, D code block.

In some embodiments, the determining unit is further configured to: if (a0+a1)/64 > =first threshold, and A0/64> second threshold, preliminarily determining the AVC-encoded macroblock as a flat area, wherein the first threshold is greater than the second threshold; and the adjustment unit is further configured to: the quantization parameter value of the AVC-coded macroblock of the flat area is subtracted by a first step size on the basis of the initial value.

In some embodiments, the determining unit is further configured to: if (a2+a3)/64 > =second threshold value, and a0=0, the AVC-encoded macroblock is preliminarily decided as a complex region; and the adjustment unit is further configured to: the quantization parameter value of the AVC encoded macro block of the complex region is added with a first step size on the basis of the initial value.

In some embodiments, the adjustment unit is further configured to: if (B0+B1)/64 > and (C0+C1)/64 > are the second threshold, and (D0+D1)/64 > are the third threshold, the AVC encoded macroblock is further determined to be a flat region, and the adjusted quantization parameter value of the AVC encoded macroblock is subtracted by a second step size, wherein the second step size is smaller than the first step size, and the third threshold is smaller than the second threshold.

In some embodiments, the adjustment unit is further configured to: if (B2+B3)/64 > and (C2+C3)/64 > are the second threshold, the AVC encoded macroblock is further determined to be a complex region, and the adjusted quantization parameter value of the AVC encoded macroblock is added to a second step size, wherein the second step size is smaller than the first step size.

In some embodiments, the adjustment unit is further configured to: if the preliminary decision result is opposite to the further decision result for the AVC encoded macroblock, the quantization parameter value for the AVC encoded macroblock is not adjusted.

In a third aspect, embodiments of the present disclosure provide an electronic device for AVC encoding, comprising: one or more processors; storage means having stored thereon one or more computer programs which, when executed by the one or more processors, cause the one or more processors to implement the method of any of the first aspects.

In a fourth aspect, embodiments of the present disclosure provide a computer-readable medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the method according to any of the first aspects.

According to the AVC coding method and device provided by the embodiment of the disclosure, according to the high compression characteristic of HEVC, the texture complexity of the macro block in AVC coding is predicted through the depth information of HEVC coding, and the code rate of the macro block currently coded is redistributed according to the information, so that higher visual subjective quality is realized.

It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the disclosure, nor is it intended to be used to limit the scope of the disclosure. Other features of the present disclosure will become apparent from the following specification.

Drawings

Other features, objects and advantages of the present disclosure will become more apparent upon reading of the detailed description of non-limiting embodiments, made with reference to the following drawings:

FIG. 1 is an exemplary system architecture diagram in which an embodiment of the present disclosure may be applied;

FIG. 2 is a flow chart of one embodiment of an AVC encoding method in accordance with the present disclosure;

fig. 3 is a schematic diagram of structural features of HEVC coding;

FIG. 4 is a schematic structural diagram of one embodiment of an AVC encoding apparatus in accordance with the present disclosure;

fig. 5 is a schematic diagram of a computer system suitable for use in implementing embodiments of the present disclosure.

Detailed Description

The present disclosure is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be noted that, for convenience of description, only the portions related to the present invention are shown in the drawings.

It should be noted that, without conflict, the embodiments of the present disclosure and features of the embodiments may be combined with each other. The present disclosure will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.

Fig. 1 illustrates an exemplary system architecture to which an embodiment of an AVC encoding method or AVC encoding apparatus of the present disclosure may be applied.

As shown in fig. 1, the system architecture may include HEVC encoder and decoder, AVC encoder and decoder.

Firstly, video is encoded by an HEVC encoder, so as to obtain HEVC encoding blocks of 1,2 … n frame video images and depth division information of each HEVC encoding block. And decoding the HEVC encoded data stream by a decoder, and outputting HEVC video.

And secondly, coding the video by an AVC coder to obtain AVC coding macro blocks of 1,2 … n frame video images, and reading depth division information of each HEVC coding block according to frames. And adjusting the quantization parameter of the AVC coding macro code according to the depth division information of each HEVC coding block, and then completing the AVC coding process. And decoding the AVC coded data stream by a decoder, and outputting an AVC video.

Finally, the quality of HEVC video and AVC video can be compared, and the AVC coding method based on depth division information of HEVC coding blocks can be verified to improve the video quality after video compression.

With continued reference to fig. 2, a flow 200 of one embodiment of an AVC encoding method according to the present disclosure is shown. The AVC encoding method comprises the following steps:

step 201, performing HEVC coding on video to obtain an HEVC coding block set, and counting depth division information of each HEVC coding block according to frames.

In this embodiment, a block coding manner is still adopted in HEVC, but different from the fixed-size macroblock in h.264. The size of the blocks in HEVC may be adaptively changed. The size of the coding block of HEVC or the number of pixels involved may be 64x64, 32x32 or 16x16. As shown in fig. 3, where 4x4 is a human partition, the HEVC maximum coding unit is 64x64, and may be divided into 4 32x32, 16x16, 64x 8, and 256 4x4 in the time coding process. Wherein the depth is 0 at 64x64, 1 at 32x32, 2 at 16x16, and 3 at 8x 8. For example, one block is 8x8, then there are 4x4 blocks of depth 3.

Step 202, AVC encoding is performed on the video to obtain an AVC encoded macroblock set, and the AVC encoded macroblock set and the HEVC encoded block set are mapped.

In the present embodiment, the size of AVC-encoded macroblock or the number of pixels included is fixed to 16×16. And reading depth partition information of HEVC (high efficiency video coding) blocks counted in step 201 according to a frame, wherein a reading rule is that 16x16 blocks are mapped to the region where 64x64 blocks are located when AVC codes.

Step 203, for each AVC coded macroblock, determining the texture complexity of the AVC coded macroblock according to the depth partition information of the HEVC coded block mapped by the AVC coded macroblock.

In this embodiment, the duty ratio of the coded block with small depth (e.g., depth 0 and/or depth 1) and the duty ratio of the coded block with large depth (e.g., depth 2 and/or depth 3) in the region where each AVC coded macroblock maps are counted. If the duty cycle of the coded block with small depth exceeds a preset flat threshold (i.e. the area of the HEVC coded block with large resolution occupies a larger total area specific gravity), it is indicated that the region is a flat region with low texture complexity. If the duty ratio of the coding block with large depth exceeds the preset complex threshold (i.e. the area of the HEVC coding block with small resolution occupies a larger total area proportion), the region is a complex region, and the texture complexity is high.

Step 204, adjusting the quantization parameter of each AVC coded macroblock according to the texture complexity of each AVC coded macroblock.

In this embodiment, the system may set initial values of quantization parameters for AVC-coded macroblocks. The quantization parameter is turned up on the basis of the initial value for the region (complex region) where the texture complexity is high. Conversely, the quantization parameter is turned down on the basis of the initial value for a region (flat region) where the texture complexity is low.

Step 205, the AVC encoding process of the video is completed based on the adjusted quantization parameter of each AVC encoded macroblock.

In this embodiment, the subsequent encoding process is continued based on the adjusted quantization parameter of each AVC encoded macroblock: relating to the processes of prediction, transformation, quantization, entropy coding and the like. This part is prior art and will not be described in detail.

According to the method provided by the embodiment of the disclosure, according to the high compression characteristic of HEVC, the texture complexity of the macro block is predicted in AVC coding through the depth information of HEVC coding, and the code rate of the current coding macro block is redistributed according to the information, so that higher visual subjective quality is realized.

In some optional implementations of this embodiment, the determining the texture complexity of the AVC encoded macroblock according to the depth partition information of the HEVC encoded block to which the AVC encoded macroblock maps includes: the HEVC coding block mapped by the AVC coding macro block is divided into 4 blocks of 32x32 again and recorded as an A code block, a B code block, a C code block and a D code block respectively; respectively counting the numbers A0-A3, B0-B3, C0-C3 and D0-D3 of 4x4 blocks with different depths contained in the A code block, the B code block, the C code block and the D code block; the texture complexity of the AVC encoded macroblock is determined from the duty ratio of the number of 4x4 blocks of different depths in the A code block, B code block, C code block, D code block.

HEVC coding is carried out on video, depth division information of video frames is counted according to frames, each frame is divided according to 64x64, each 64x64 CTU is divided into 256 small blocks of 4x4 according to 4x4, and each 4x4 carries depth information according to a depth division rule. While the 64x64 block is repartitioned into 4 32x32 blocks, recorded as a-B-C-D, respectively (as shown in fig. 3). According to the statistics of depths 0,1,2, and 3 in A, B, C, D blocks, the depth statistics are recorded as A0, A1, A2, and A3, respectively, in which the block a is the block of example 32x32, and 64 blocks 4x4 are included.

A0 represents the number of 4x4 blocks of depth 0 contained in the a code block, A1 represents the number of 4x4 blocks of depth 1 contained in the a code block, A2 represents the number of 4x4 blocks of depth 2 contained in the a code block, and A3 represents the number of 4x4 blocks of depth 3 contained in the a code block. B0 represents the number of blocks of 4x4 having a depth of 0 contained in the B code block, B1 represents the number of blocks of 4x4 having a depth of 1 contained in the B code block, B2 represents the number of blocks of 4x4 having a depth of 2 contained in the B code block, and B3 represents the number of blocks of 4x4 having a depth of 3 contained in the B code block. C0 represents the number of 4x4 blocks of depth 0 contained in the C code block, C1 represents the number of 4x4 blocks of depth 1 contained in the C code block, C2 represents the number of 4x4 blocks of depth 2 contained in the a code block, and C3 represents the number of 4x4 blocks of depth 3 contained in the C code block. D0 represents the number of 4x4 blocks of depth 0 contained in the D code block, D1 represents the number of 4x4 blocks of depth 1 contained in the D code block, D2 represents the number of 4x4 blocks of depth 2 contained in the D code block, and D3 represents the number of 4x4 blocks of depth 3 contained in the D code block.

If the depth of any one of the code blocks a-D is 0 and/or the code block duty ratio of the depth of 1 is greater than a predetermined flat threshold, the area where the HEVC code block is located is indicated to be a flat area, the texture complexity is low, and accordingly, all AVC coded macro blocks mapped to the HEVC code block are located in the flat area.

If the depth of any one of the code blocks A-D is 2 and/or the code block duty ratio of the depth of 3 is greater than a preset complexity threshold, the region where the HEVC code block is located is indicated to be a complex region, the texture complexity is high, and correspondingly, all AVC coding macro blocks mapped to the HEVC code block are located in the complex region.

The method can quickly and accurately determine whether the AVC encoded macro block is in a flat area or a complex area, so that the quantization parameter of the AVC encoded macro block can be adjusted.

For 4 AVC coded macroblocks mapped to the same HEVC code block, it is only necessary to determine whether any of the AVC coded macroblocks are in flat areas or complex areas, and the conclusion can be applied to the other 3 AVC coded macroblocks.

In some optional implementations of this embodiment, the determining the texture complexity of the AVC encoded macroblock according to the duty ratio of the number of 4x4 blocks of different depths in the a code block, the B code block, the C code block, and the D code block includes: if (a0+a1)/64 > =first threshold, and A0/64> second threshold, preliminarily determining the AVC-encoded macroblock as a flat area, wherein the first threshold is greater than the second threshold; and adjusting the quantization parameter of each AVC coded macroblock according to the texture complexity of each AVC coded macroblock, comprising: the quantization parameter value of the AVC-coded macroblock of the flat area is subtracted by a first step size on the basis of the initial value.

Taking the example that the 16x16 block is just mapped on the A block in the current AVC coding, the discrimination mode is obtained. Wherein, preferably, the first threshold may be set to 0.75, the second threshold may be set to 0.5, and the third threshold may be set to 0.3. The first step size may be set to 1.

The method comprises the following steps:

if (a0+a1)/64 > =0.75 & & A0/64>0.5 then the block currently being AVC coded is considered to be a flat area, the quantization parameter q=q-1 of the current coded macroblock is now determined.

For example, AVC coded macroblocks map to a region of 32x32 in a blocks, if there are 36 4x4 blocks of depth 0 and 28 4x4 blocks of depth 1 in the region, (a0+a1)/64= (36+28)/64=1 >0.75, a0/64=36/64=0.5625 >0.5, indicating that the region is a flat region.

If there are 36 4x4 blocks of depth 0, 4x4 blocks of depth 1, 4x4 blocks of depth 2, 24 blocks of depth 2 in the region, (a0+a1)/64= (36+4)/64=0.625 <0.75, indicating that the region is not a flat region.

The parameter values are empirical values, so that the most accurate flat area can be obtained, and the quantization parameter with the best video quality can be obtained.

In some optional implementations of this embodiment, the determining the texture complexity of the AVC encoded macroblock according to the duty ratio of the number of 4x4 blocks of different depths in the a code block, the B code block, the C code block, and the D code block includes: if (a2+a3)/64 > =second threshold value, and a0=0, the AVC-encoded macroblock is preliminarily decided as a complex region; and adjusting the quantization parameter of each AVC coded macroblock according to the texture complexity of each AVC coded macroblock, comprising: the quantization parameter value of the AVC encoded macro block of the complex region is added with a first step size on the basis of the initial value.

The method comprises the following steps:

if (a2+a3)/64 > =0.5 & & a0=0, then the current encoding region is considered to be a complex region, and the quantization parameter q=q+1 of the current encoding macroblock is considered to be the complex region;

the parameter values are empirical values, so that the most accurate complex region can be obtained, and the quantization parameter with the best video quality can be obtained.

For example, AVC coded macroblocks map to a region of 32x32 in a blocks, if there are 36 4x4 blocks of depth 2 and 28 4x4 blocks of depth 3 in the region, (a2+a3)/64= (36+28)/64=1 >0.5, a0/64=0, indicating that the region is a complex region.

In some optional implementations of this embodiment, the method further includes: if (B0+B1)/64 > and (C0+C1)/64 > are the second threshold, and (D0+D1)/64 > are the third threshold, the AVC encoded macroblock is further determined to be a flat region, and the adjusted quantization parameter value of the AVC encoded macroblock is subtracted by a second step size, wherein the second step size is smaller than the first step size, and the third threshold is smaller than the second threshold.

To further determine the flatness and complexity of the region, a depth statistics image of B, C, D blocks is introduced, and the recording mode is the same as that of the A block.

Preferably, the first threshold may be set to 0.75, the second threshold may be set to 0.5, and the third threshold may be set to 0.3. The first step size may be set to 1 and the second step size may be set to 0.5.

The method comprises the following steps:

if (B0+B1)/64 >0.5& (C0+C1)/64 >0.5& (D0+D1)/64 >0.3 then further consider the current coding macroblock as a flat region, and further adjust its quantization parameter by q=q-0.5 on the basis of q=q-1 adjustment;

in some optional implementations of this embodiment, the method further includes: if (B2+B3)/64 > and (C2+C3)/64 > are the second threshold, the AVC encoded macroblock is further determined to be a complex region, and the adjusted quantization parameter value of the AVC encoded macroblock is added to a second step size, wherein the second step size is smaller than the first step size.

The method comprises the following steps:

if (b2+b3)/64 >0.5& (c2+c3)/64 >0.5 then the current coded macroblock is further considered to be a complex region, and its quantization parameter is further adjusted by q=q+0.5 on the basis of the q=q+1 adjustment.

In some optional implementations of this embodiment, the method further includes: if the preliminary decision result is opposite to the further decision result for the AVC encoded macroblock, the quantization parameter value for the AVC encoded macroblock is not adjusted.

For each AVC coded macroblock, if the preliminary decision result is a flat region, and the further decision result is a complex region. Or if the preliminary determination result is a complex region and the further determination result is a flat region. The quantization parameter values of the AVC-coded macroblock are adjusted. Through the mutual inspection of the two judging results, false detection can be prevented, so that the detection accuracy is improved, and the video quality is further improved.

With further reference to fig. 4, as an implementation of the method shown in the foregoing figures, the present disclosure provides an embodiment of an AVC encoding apparatus, where an embodiment of the apparatus corresponds to the embodiment of the method shown in fig. 2, and the apparatus may be specifically applied to various electronic devices.

As shown in fig. 4, the AVC encoding apparatus 400 of the present embodiment includes: a first encoding unit 401, a second encoding unit 402, a determining unit 403, an adjusting unit 404, and a third encoding unit 405. The first coding unit 401 is configured to perform HEVC coding on a video to obtain an HEVC coding block set, and count depth division information of each HEVC coding block according to frames; a second encoding unit 402, configured to perform AVC encoding on the video to obtain an AVC encoded macroblock set, and map the AVC encoded macroblock set with the HEVC encoded block set; a determining unit 403 configured to determine, for each AVC-coded macroblock, a texture complexity of the AVC-coded macroblock from depth partition information of an HEVC-coded block to which the AVC-coded macroblock maps; an adjusting unit 404 configured to adjust a quantization parameter of each AVC-coded macroblock according to a texture complexity of each AVC-coded macroblock; a third encoding unit 405 configured to complete an AVC encoding process of the video based on the adjusted quantization parameter of each AVC encoded macroblock.

In this embodiment, specific processes of the first encoding unit 401, the second encoding unit 402, the determining unit 403, the adjusting unit 404, and the third encoding unit 405 of the AVC encoding apparatus 400 may refer to steps 201, 202, 203, 204, and 205 in the corresponding embodiment of fig. 2.

In some optional implementations of the present embodiment, the determining unit 403 is further configured to: the HEVC coding block mapped by the AVC coding macro block is divided into 4 blocks of 32x32 again and recorded as an A code block, a B code block, a C code block and a D code block respectively; respectively counting the numbers A0-A3, B0-B3, C0-C3 and D0-D3 of 4x4 blocks with different depths contained in the A code block, the B code block, the C code block and the D code block; the texture complexity of the AVC encoded macroblock is determined from the duty ratio of the number of 4x4 blocks of different depths in the A code block, B code block, C code block, D code block.

In some optional implementations of the present embodiment, the determining unit 403 is further configured to: if (a0+a1)/64 > =first threshold, and A0/64> second threshold, preliminarily determining the AVC-encoded macroblock as a flat area, wherein the first threshold is greater than the second threshold; and the adjustment unit 404 is further configured to: the quantization parameter value of the AVC-coded macroblock of the flat area is subtracted by a first step size on the basis of the initial value.

In some optional implementations of the present embodiment, the determining unit 403 is further configured to: if (a2+a3)/64 > =second threshold value, and a0=0, the AVC-encoded macroblock is preliminarily decided as a complex region; and the adjustment unit 404 is further configured to: the quantization parameter value of the AVC encoded macro block of the complex region is added with a first step size on the basis of the initial value.

In some optional implementations of the present embodiment, the adjustment unit 404 is further configured to: if (B0+B1)/64 > and (C0+C1)/64 > are the second threshold, and (D0+D1)/64 > are the third threshold, the AVC encoded macroblock is further determined to be a flat region, and the adjusted quantization parameter value of the AVC encoded macroblock is subtracted by a second step size, wherein the second step size is smaller than the first step size, and the third threshold is smaller than the second threshold.

In some optional implementations of the present embodiment, the adjustment unit 404 is further configured to: if (B2+B3)/64 > and (C2+C3)/64 > are the second threshold, the AVC encoded macroblock is further determined to be a complex region, and the adjusted quantization parameter value of the AVC encoded macroblock is added to a second step size, wherein the second step size is smaller than the first step size.

In some optional implementations of the present embodiment, the adjustment unit 404 is further configured to: if the preliminary decision result is opposite to the further decision result for the AVC encoded macroblock, the quantization parameter value for the AVC encoded macroblock is not adjusted.

It should be noted that, in the technical solution of the present disclosure, the related aspects of collecting, updating, analyzing, processing, using, transmitting, storing, etc. of the personal information of the user all conform to the rules of the related laws and regulations, and are used for legal purposes without violating the public order colloquial. Necessary measures are taken for the personal information of the user, illegal access to the personal information data of the user is prevented, and the personal information security, network security and national security of the user are maintained.

According to an embodiment of the disclosure, the disclosure further provides an electronic device, a readable storage medium.

An electronic device, comprising: one or more processors; and a storage device having one or more computer programs stored thereon, which when executed by the one or more processors, cause the one or more processors to implement the method of flow 200.

A computer readable medium having stored thereon a computer program, wherein the computer program when executed by a processor implements the method of flow 200.

Fig. 5 illustrates a schematic block diagram of an example electronic device 500 that may be used to implement embodiments of the present disclosure. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the disclosure described and/or claimed herein.

As shown in fig. 5, the apparatus 500 includes a computing unit 501 that can perform various suitable actions and processes according to a computer program stored in a Read Only Memory (ROM) 502 or a computer program loaded from a storage unit 508 into a Random Access Memory (RAM) 503. In the RAM 503, various programs and data required for the operation of the device 500 can also be stored. The computing unit 501, ROM 502, and RAM 503 are connected to each other by a bus 504. An input/output (I/O) interface 505 is also connected to bus 504.

Various components in the device 500 are connected to the I/O interface 505, including: an input unit 506 such as a keyboard, a mouse, etc.; an output unit 507 such as various types of displays, speakers, and the like; a storage unit 508 such as a magnetic disk, an optical disk, or the like; and a communication unit 509 such as a network card, modem, wireless communication transceiver, etc. The communication unit 509 allows the device 500 to exchange information/data with other devices via a computer network such as the internet and/or various telecommunication networks.

The computing unit 501 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of computing unit 501 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various computing units running machine learning model algorithms, a Digital Signal Processor (DSP), and any suitable processor, controller, microcontroller, etc. The calculation unit 501 performs the respective methods and processes described above, for example, AVC encoding method. For example, in some embodiments, the AVC encoding method may be implemented as a computer software program tangibly embodied on a machine-readable medium, such as the storage unit 508. In some embodiments, part or all of the computer program may be loaded and/or installed onto the device 500 via the ROM 502 and/or the communication unit 509. When a computer program is loaded into RAM 503 and executed by computing unit 501, one or more steps of the AVC encoding method described above may be performed. Alternatively, in other embodiments, the computing unit 501 may be configured to perform the AVC encoding method by any other suitable means (e.g. by means of firmware).

Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.

Program code for carrying out methods of the present disclosure may be written in any combination of one or more programming languages. These program code may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus such that the program code, when executed by the processor or controller, causes the functions/operations specified in the flowchart and/or block diagram to be implemented. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.

In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and pointing device (e.g., a mouse or trackball) by which a user can provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.

The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), and the internet.

The computer system may include a client and a server. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server may be a server of a distributed system or a server that incorporates a blockchain. The server can also be a cloud server, or an intelligent cloud computing server or an intelligent cloud host with artificial intelligence technology. The server may be a server of a distributed system or a server that incorporates a blockchain. The server can also be a cloud server, or an intelligent cloud computing server or an intelligent cloud host with artificial intelligence technology.

It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps recited in the present disclosure may be performed in parallel or sequentially or in a different order, provided that the desired results of the technical solutions of the present disclosure are achieved, and are not limited herein.

The above detailed description should not be taken as limiting the scope of the present disclosure. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present disclosure are intended to be included within the scope of the present disclosure.

Claims

1. An AVC encoding method, comprising:

HEVC coding is carried out on the video to obtain an HEVC coding block set, and depth division information of each HEVC coding block is counted according to frames;

performing AVC coding on the video to obtain an AVC coding macro block set, and mapping the AVC coding macro block set and the HEVC coding block set;

for each AVC coded macro block, determining the texture complexity of the AVC coded macro block according to the depth division information of the HEVC coded block mapped by the AVC coded macro block;

adjusting the quantization parameter of each AVC encoding macro block according to the texture complexity of each AVC encoding macro block;

and completing the AVC encoding process of the video based on the adjusted quantization parameter of each AVC encoding macro block.

2. The method of claim 1, wherein said determining the texture complexity of the AVC encoded macroblock from the depth partition information of the HEVC encoded block to which the AVC encoded macroblock maps comprises:

the HEVC coding block mapped by the AVC coding macro block is divided into 4 blocks of 32x32 again and recorded as an A code block, a B code block, a C code block and a D code block respectively;

respectively counting the numbers A0-A3, B0-B3, C0-C3 and D0-D3 of 4x4 blocks with different depths contained in the A code block, the B code block, the C code block and the D code block;

the texture complexity of the AVC encoded macroblock is determined from the duty ratio of the number of 4x4 blocks of different depths in the A code block, B code block, C code block, D code block.

3. The method of claim 2, wherein said determining the texture complexity of the AVC-coded macroblock from the duty cycle of the number of 4x4 blocks of different depths in the a-code block, B-code block, C-code block, D-code block comprises:

if (a0+a1)/64 > =first threshold, and A0/64> second threshold, preliminarily determining the AVC-encoded macroblock as a flat area, wherein the first threshold is greater than the second threshold; and

the adjusting the quantization parameter of each AVC coded macroblock according to the texture complexity of each AVC coded macroblock includes:

the quantization parameter value of the AVC-coded macroblock of the flat area is subtracted by a first step size on the basis of the initial value.

4. The method of claim 2, wherein said determining the texture complexity of the AVC-coded macroblock from the duty cycle of the number of 4x4 blocks of different depths in the a-code block, B-code block, C-code block, D-code block comprises:

if (a2+a3)/64 > =second threshold value, and a0=0, the AVC-encoded macroblock is preliminarily decided as a complex region; and

the quantization parameter value of the AVC encoded macro block of the complex region is added with a first step size on the basis of the initial value.

5. A method according to claim 3, wherein the method further comprises:

if (B0+B1)/64 > and (C0+C1)/64 > are the second threshold, and (D0+D1)/64 > are the third threshold, the AVC encoded macroblock is further determined to be a flat region, and the adjusted quantization parameter value of the AVC encoded macroblock is subtracted by a second step size, wherein the second step size is smaller than the first step size, and the third threshold is smaller than the second threshold.

6. The method of claim 4, wherein the method further comprises:

if (B2+B3)/64 > and (C2+C3)/64 > are the second threshold, the AVC encoded macroblock is further determined to be a complex region, and the adjusted quantization parameter value of the AVC encoded macroblock is added to a second step size, wherein the second step size is smaller than the first step size.

7. The method according to claim 3 or 4, wherein the method further comprises:

if the preliminary decision result is opposite to the further decision result for the AVC encoded macroblock, the quantization parameter value for the AVC encoded macroblock is not adjusted.

8. An AVC encoding apparatus comprising:

the first coding unit is configured to perform HEVC coding on the video to obtain an HEVC coding block set, and statistics is carried out on depth division information of each HEVC coding block according to frames;

the second coding unit is configured to perform AVC coding on the video to obtain an AVC coding macro block set, and map the AVC coding macro block set with the HEVC coding block set;

a determining unit configured to determine, for each AVC-encoded macroblock, a texture complexity of the AVC-encoded macroblock from depth partition information of an HEVC-encoded block to which the AVC-encoded macroblock maps;

an adjusting unit configured to adjust a quantization parameter of each AVC-coded macroblock according to a texture complexity of each AVC-coded macroblock;

and a third encoding unit configured to complete an AVC encoding process of the video based on the adjusted quantization parameter of each AVC encoded macroblock.

9. An electronic device for AVC encoding, comprising:

one or more processors;

a storage device having one or more computer programs stored thereon,

when executed by the one or more processors, causes the one or more processors to implement the method of any of claims 1-7.

10. A computer readable medium having stored thereon a computer program, wherein the computer program, when executed by a processor, implements the method of any of claims 1-7.