CN116506644A

CN116506644A - Video decoding method and device

Info

Publication number: CN116506644A
Application number: CN202310472995.0A
Authority: CN
Inventors: 赵日洋; 张志明
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2018-03-31
Filing date: 2018-03-31
Publication date: 2023-07-28
Also published as: CN110324625B; WO2019185032A1; CN110324625A

Abstract

The application provides a video decoding method and device, at least one entropy decoder is used for decoding a bit stream of at least one frame of image to be decoded into an intermediate binary string in parallel, and each entropy decoder in the at least one entropy decoder decodes at least one slice of one frame of image; a parser for distributing the intermediate binary strings of the at least one frame image to a plurality of pixel processors in rows; the plurality of pixel processors are used for decoding a plurality of rows of the intermediate binary string of the at least one frame of image to be decoded into displayable image data in parallel in units of rows. According to the method and the device, the bit stream of one frame of image is processed by a plurality of entropy decoders at the same time or the bit stream of one frame of image is processed by a plurality of entropy decoders respectively, so that the decoding performance of the entropy decoders is improved. Meanwhile, a plurality of pixel processors process data of different rows of one frame of image at the same time, so that the processing capacity of the pixel processors is improved.

Description

Video decoding method and device

This application is a divisional application, the filing number of the original application is 201810279296.3, the date of the original application is 31 days of 2018, 3 months, and the entire contents of the original application are incorporated herein by reference.

Technical Field

The present disclosure relates to the field of video technologies, and in particular, to a video decoding method and apparatus.

Background

Video compression technology is widely used in the fields of internet, television broadcasting, storage media, communication, etc. As image size and frame rate increase, the performance requirements for the corresponding decoders are also increasing.

In one prior art, two frames of images are decoded in parallel by using two decoders, thereby achieving the purpose of improving the performance by two times. However, in a high efficiency video coding (HEVC, high Efficiency Video Coding) protocol or the like, context-based binary arithmetic coding (CABAC, context-based Adaptive Binary Arithmetic Coding) coding is employed. The data of the next frame includes only difference data from the previous frame. Therefore, when decoding the CABAC decoding data, after decoding one frame image, the probability table is updated to decode the next frame image.

In the video compression mode, when the reference frame is not decoded, the current frame cannot be decoded according to the reference frame. This results in that a plurality of decoders can decode only one frame image at a time, and the actual performance of the decoders cannot be improved.

Disclosure of Invention

The embodiment of the application provides a video decoding method and device, which are used for improving the decoding performance of a decoder.

The application is realized by the following modes:

in a first aspect, a specific embodiment of the present application provides a video decoding method, including parallel decoding a plurality of slices of a bit stream of an obtained M-frame image to be decoded into an intermediate binary string; any frame of the M frames of images to be decoded contains at least one slice, wherein M is a positive integer greater than 0; dividing the intermediate binary string of the M-frame image to be decoded into a plurality of rows; multiple rows of the intermediate binary string are decoded in parallel into displayable image data.

In the embodiment of the application, an image in a bit stream form is divided into a plurality of slices, the slices of the image are parallelly decoded into a bin stream through a plurality of entropy decoding modules, then image data in a bin stream form is divided into a plurality of pixel processing modules according to rows, and the bin stream of the image is parallelly decoded into displayable image data by the pixel processing modules according to row units, and the scheme is that the two parallel processing is performed: the bit stream of the image is decoded into the bin stream in parallel, and then the bin stream is decoded into the displayable image in parallel by a row unit, so that the video decoding rate is accelerated, and the decoding performance of a decoder is improved.

In one possible design, the decoding the plurality of slices of the bit stream of the acquired M-frame image to be decoded into the intermediate binary string in parallel includes: and decoding the plurality of slices of the bit stream of the acquired one frame of image to be decoded into the intermediate binary string by N entropy decoders in parallel, wherein each entropy decoder in the N entropy decoders decodes at least one slice of the one frame of image to be decoded, and the number of N is determined according to the number of slices included in the one frame of image.

Based on the number of slices contained in one frame of image, the bit stream of one frame of image is processed in parallel by a plurality of entropy decoding modules, so that the time required for decoding one frame of image is reduced, and the decoding efficiency is improved.

In one possible design, the one frame image includes N slices, and the N entropy decoders decode N slices of the one frame image to be decoded in parallel, where each of the N entropy decoders decodes one of the slices in the one frame image to be decoded.

If a frame of image contains several slices, several entropy decoding modules are adopted, that is, each entropy decoding module decodes one slice of a frame of image, so that the rate of decoding a frame of image can be increased as much as possible.

In one possible design, Y entropy decoders of the N entropy decoders decode the bit stream of the image to be decoded of the one frame into the intermediate binary string, and N-Y entropy decoders in an idle state decode part or all of the acquired bit stream of the image to be decoded of the next frame into the intermediate binary string, where Y is greater than or equal to 1 and Y is less than N.

When a plurality of entropy decoding modules process the bit stream of one frame of image at the same time and idle entropy decoding modules exist, the bit stream of the next frame of image is processed through at least one idle state entropy decoding module, so that the decoding performance of the entropy decoding modules is further improved.

In one possible design, the decoding the plurality of slices of the acquired bit stream of the M-frame image to be decoded into the intermediate binary string in parallel specifically includes: and the M entropy decoders decode a plurality of slices of the acquired bit stream of the M frames of images to be decoded into the intermediate binary string in parallel, wherein each entropy decoder in the M entropy decoders respectively decodes the at least one slice of the bit stream of any frame of images to be decoded in the M frames of images to be decoded into the intermediate binary string.

The multiple entropy decoding modules process the bit stream of the multi-frame image at the same time, wherein each entropy decoding module decodes the bit stream of one frame image into a bin stream, the decoding process among the multiple entropy decoding modules can be synchronously carried out, reference frames are not needed, the decoding progress of the reference frames is not needed to wait, and the decoding efficiency of entropy decoding is improved.

In one possible design, before the decoding of the plurality of rows of the intermediate binary string in parallel into displayable image data, the method further comprises: storing the intermediate binary strings of the M frames of images to be decoded into at least one storage space in a row mode, wherein each storage space of the at least one storage space is used for storing the intermediate binary strings belonging to the same frame of images to be decoded.

The bin stream of a frame of image is distributed to a plurality of sub-storage spaces of the same storage space according to rows, so that the pixel processing modules can respectively read data from the corresponding word storage spaces, and the pixel processing modules can read the data more conveniently.

In one possible design, before the decoding the plurality of rows of the intermediate binary string into displayable image data in parallel, the method further includes: and reading one row of the intermediate binary string of at least one frame of image to be decoded from the corresponding storage space in row units respectively.

In one possible design, the at least one storage space includes a plurality of sub-storage spaces, each of the plurality of sub-storage spaces corresponding to a counter for recording a storage state of the sub-storage space.

In one possible design, when the parser writes data to one sub-storage space in one storage space, the number of writes of a frame recorder corresponding to the storage space in the plurality of frame recorders is increased by 1. When one pixel processor of the plurality of pixel processors reads data from one sub-storage space of one storage space, the number of times of writing of a frame recorder corresponding to the storage space in the plurality of frame recorders is reduced by 1. The number of writes is used to indicate the storage status of each word storage space in the frame recorder.

By managing the counters of the frame recording module in different storage spaces, the unprocessed data is prevented from being covered or the data is prevented from being repeatedly read.

In one possible design, the parser is a plurality, and the dividing the intermediate binary string of the M-frame image to be decoded into a plurality of rows includes: each of the plurality of resolvers divides an intermediate binary string of any one of the at least one frame of the image to be decoded into a plurality of rows, respectively.

In one possible design, when the coding protocol of the video is the high efficiency video coding HEVC protocol, a row of the intermediate binary string of the one frame of pictures to be decoded comprises at least one tree coding block CTB. When the encoding protocol of the video is h.264 protocol, one row of the intermediate binary string of the one frame of image to be decoded comprises at least one macroblock MB.

In one possible design, after decoding the plurality of slices of the bit stream of the acquired M-frame image to be decoded into the intermediate binary string in parallel, the method further includes: the N entropy decoders respectively store the decoded intermediate binary strings into storage spaces corresponding to the entropy decoders which finish decoding, so that the resolvers acquire the corresponding intermediate binary strings of the images to be decoded from the storage spaces corresponding to the entropy decoders which finish decoding.

The decoded intermediate binary string is stored, so that the entropy decoding module can continue to decode the bit stream of the image to be decoded of the next frame, and the decoding efficiency of the entropy decoding module is improved.

In one possible design, the method further comprises: when each row of the bin stream of one frame image is decoded into displayable image data or is being decoded into displayable image data by the pixel processor, respectively, and at least one pixel processor of the plurality of pixel processors is in an idle state, the at least one pixel processor in the idle state decodes at least one row of the bin stream of the next frame image into displayable image data in parallel. Thereby improving the processing efficiency of the pixel processing module.

The bin stream of a frame image includes Z rows, each row including F blocks, and the decoding progress of the pixel processing module decoding the c+1th row of the bin stream is later than the decoding progress of the pixel processing module decoding the C-th row of the bin stream.

In a second aspect, specific embodiments of the present application provide a decoder, including at least one entropy decoder, configured to decode a bit stream of at least one frame of an image to be decoded into an intermediate binary string in parallel, where each of the at least one entropy decoder decodes at least one slice of the frame of the image to be decoded. And the parser is used for distributing the intermediate binary strings of the at least one frame of image to be decoded to a plurality of pixel processors in rows. The plurality of pixel processors are used for decoding a plurality of rows of the intermediate binary string of the at least one frame of image to be decoded into displayable image data in parallel in units of rows.

In one possible design, the number of entropy decoders is N, N entropy decoders, for obtaining a bit stream of an image to be decoded. And the N entropy decoders decode the acquired bit streams of the image to be decoded of the frame into an intermediate binary string in parallel, and the number of N is determined according to the number of slices included in the image to be decoded of the frame.

In one possible design, the one frame of image to be decoded includes N slices, and the N entropy decoders decode N slices of the one frame of image to be decoded in parallel, where each entropy decoder in the N entropy decoding modules decodes one slice in the one frame of image to be decoded.

In one possible design, when a part of at least one entropy decoder decodes the acquired bit stream of the image to be decoded of one frame into an intermediate binary string, the entropy decoder in the at least one entropy decoder in an idle state is used to acquire the bit stream of the image to be decoded of the next frame. And the entropy decoder is in an idle state and is used for decoding part or all of the acquired bit stream of the image to be decoded of the next frame into an intermediate binary string.

In one possible design, the number of entropy decoders is N, and N entropy decoders are used to obtain a bit stream of N frames of images to be decoded. Each of the N entropy decoders is configured to decode a bit stream of one of the N frames of images to be decoded into an intermediate binary string.

In one possible design, the apparatus further comprises at least one memory space, each of the at least one memory space having a plurality of word memory spaces. And the analyzer is used for storing the intermediate binary strings of the at least one frame of image into a plurality of sub-storage spaces in at least one storage space in a row mode, each storage space of the at least one storage space is used for storing the intermediate binary strings belonging to the same frame of image, and the plurality of sub-storage spaces are in one-to-one correspondence with the plurality of pixel processors.

In one possible design, each of the plurality of pixel processors included in the decoder is further configured to read a row of the intermediate binary string of at least one frame image from the corresponding sub-storage space in units of rows, respectively.

In one possible design, each of the plurality of sub-storage spaces corresponds to a counter that is used to record a storage state of the sub-storage space.

In one possible design, when the parser writes data once to one sub-storage space in one storage space, the number of writes of a frame recorder corresponding to the storage space in the plurality of frame recorders is increased by 1. When one pixel processor of the plurality of pixel processors reads data from one sub-storage space of one storage space, the number of times of writing of a frame recorder corresponding to the storage space of the plurality of frame recorders is reduced by 1. The writing times are used for indicating the storage state of each word storage space in the frame recording module.

In one possible design, the plurality of resolvers may be arranged in rows, the resolvers allocating the intermediate binary strings of the at least one frame image to the plurality of pixel processors included in the decoder, and each of the plurality of resolvers may be arranged in rows, respectively, to the plurality of pixel processors.

In one possible design, when the coding protocol of the video is the high efficiency video coding HEVC protocol, a row of the intermediate binary string of the one frame of pictures comprises at least one tree coding block CTB. When the encoding protocol of the video is h.264 protocol, one line of the intermediate binary string of the one frame image includes at least one macroblock MB.

In one possible design, after the obtained bit streams of the M frames of images to be decoded are decoded in parallel into intermediate binary strings, the N entropy decoders store the decoded intermediate binary strings into storage spaces corresponding to the entropy decoders that finish decoding, respectively, so that the parser obtains the intermediate binary strings of the corresponding images from the storage spaces corresponding to the entropy decoders that finish decoding.

In one possible design, when each row of the intermediate binary string of one frame image is decoded by the pixel processor into displayable image information or is being decoded into displayable image data, respectively, and at least one pixel processor of the plurality of pixel processors is in an idle state, the at least one pixel processor in the idle state decodes at least one row of the intermediate binary string of the next frame image into displayable image data in parallel.

In a third aspect, specific embodiments of the present application provide a video decoding apparatus, including: and N entropy decoding modules, which are used for decoding the bit stream of the acquired at least one frame of image to be decoded into an intermediate binary string in parallel, wherein each entropy decoding module in the N entropy decoding modules decodes at least one slice of the frame of image to be decoded, and N is a positive integer greater than or equal to 1. And the analysis module is used for distributing the intermediate binary strings of the at least one frame of image to be decoded to the pixel processing modules in rows. And the pixel processing modules are used for decoding a plurality of rows of the intermediate binary string of the at least one frame of image to be decoded into displayable image data in parallel in units of rows.

In one possible design, the N entropy decoding modules are configured to decode, in parallel, the acquired bit stream of at least one frame of an image to be decoded into an intermediate binary string, and specifically include: a bit stream of a frame of an image to be decoded is acquired. The N entropy decoding modules are used for decoding the obtained bit streams of the one frame of image to be decoded into intermediate binary strings in parallel, and the number of N is determined according to the number of slices included in the one frame of image to be decoded.

In one possible design, the one frame of image to be decoded includes N slices, and the N entropy decoding modules decode the N slices of the one frame of image to be decoded in parallel, where each of the N entropy decoding modules decodes one of the slices of the one frame of image to be decoded.

In one possible design, when Y entropy decoding modules of the N entropy decoding modules included in the decoder decode the bit stream of the acquired one frame of image to be decoded into an intermediate binary string, the method further includes acquiring a bit stream of the next frame of image to be decoded. And the N-Y entropy decoding modules in an idle state are used for decoding part or all of the acquired bit stream of the image to be decoded of the next frame into an intermediate binary string, wherein Y is greater than or equal to 1, and Y is less than N.

In one possible design, the N entropy decoding modules are configured to decode the acquired bit stream of the at least one frame of image to be decoded into an intermediate binary string in parallel, and specifically include the N entropy decoding modules acquiring the bit stream of the N frame of image to be decoded. Each entropy decoding module in the N entropy decoding modules decodes a bit stream of one frame of the N frames of images to be decoded into an intermediate binary string.

In one possible design, the parsing module is configured to store, before allocating the intermediate binary strings of the at least one frame of image to the plurality of pixel processing modules in rows, the intermediate binary strings of the at least one frame of image into a plurality of sub-storage spaces in at least one storage space in rows, where each storage space in the at least one storage space is configured to store intermediate binary strings belonging to the same frame of image, and the plurality of sub-storage spaces are in one-to-one correspondence with the plurality of pixel processing modules.

In one possible design, the plurality of pixel processing modules are used for reading one row of the intermediate binary string of the at least one frame of image from the corresponding sub-storage space in units of rows before decoding the plurality of rows of the intermediate binary file of the at least one frame of image into displayable image data in units of rows.

In one possible design, the parsing module is configured to add 1 to the number of times of writing of a frame recording module corresponding to a storage space among the plurality of frame recording modules when writing data to a sub-storage space in the storage space. And one pixel processing module of the pixel processing modules is used for subtracting 1 from the writing times of the frame recording module corresponding to one storage space in the frame recording modules when reading data from one sub-storage space of the storage space. The number of writes is used to indicate the storage status of each word storage space in the frame recording module.

In one possible design, the plurality of parsing modules are used for distributing the intermediate binary strings of the at least one frame of image to the plurality of pixel processing modules in rows, and each parsing module in the plurality of parsing modules included in the decoder is used for distributing the intermediate binary strings of any frame of image in the at least one frame of image to the plurality of pixel processing modules in rows.

In one possible design, the dividing the intermediate binary string of the M-frame image to be decoded into a plurality of rows includes: when the coding protocol of the video is the high efficiency video coding HEVC protocol, a row of the intermediate binary string of the one frame image comprises at least one tree coding block CTB. When the encoding protocol of the video is h.264 protocol, one line of the intermediate binary string of the one frame image includes at least one macroblock MB.

In one possible design, the N entropy decoding modules are configured to decode the obtained bit stream of the M frames of images to be decoded into intermediate binary strings in parallel, and further include N entropy decoding modules, each configured to store the decoded intermediate binary strings into a storage space corresponding to the entropy decoding module that completes decoding, so that the parsing module obtains the intermediate binary strings of the corresponding images from the storage space corresponding to the entropy decoding module that completes decoding.

In one possible design, the method further includes decoding at least one row of the intermediate binary string of the next frame of image into displayable image data in parallel when each row of the intermediate binary string of the next frame of image is decoded by the pixel processing module into displayable image data or is being decoded into displayable image data, respectively, and at least one pixel processing module of the plurality of pixel processing modules is in an idle state.

In a fourth aspect, the present application provides a computer readable storage medium having instructions stored therein which, when run on a computer or processor, cause the computer or processor to perform the method described in the first aspect or any of its possible designs.

In a fifth aspect, the present application provides a computer program product comprising instructions which, when run on a computer or processor, cause the computer or processor to perform the method described in the first aspect or any of its possible designs.

Drawings

Fig. 1 is a schematic structural diagram of a video decoding device according to an embodiment of the present application;

Fig. 2 is a schematic diagram of a video decoding apparatus according to an embodiment of the present application;

fig. 3 is a schematic diagram of a video decoding method according to an embodiment of the present application;

FIG. 4 is a diagram of an image to be decoded according to an embodiment of the present application;

FIG. 5 is a block diagram of a CTB line data to be decoded by a pixel processing unit according to an embodiment of the present application;

FIG. 6 is a frame image provided in an embodiment of the present application;

fig. 7 is a schematic structural diagram of a decoder according to an embodiment of the present application.

Detailed Description

The following describes in detail the technical solutions provided by the embodiments of the present application with reference to the accompanying drawings.

Fig. 1 is a schematic structural diagram of a video decoding device according to an embodiment of the present application. As shown in fig. 1, the apparatus includes a Bus arbitration module (Bus Arbit) 101, an Entropy Decoder (Entropy Decoder) 102, a Parser (Bin Parser) 103, a Frame recorder (Frame Decoder) 104, and a Pixel Processor (Pixel Processor) 105. Among them, the entropy decoder 102, the parser 103, the frame recorder 104, and the pixel processor 105 may each include a plurality of.

The bus arbitration module 101 is coupled to an external bus (External Data Bus), the entropy decoder 102, the parser 103, and the pixel processor 105, respectively, and it should be understood that in various embodiments of the present application, coupling refers to interconnection by a specific means, including direct connection or indirect connection through other devices, for example, may be connected through various interfaces, transmission lines, buses, and the like. The bus arbitration module 101 acquires a bit stream to be decoded through an external bus and transmits the bit stream to the entropy decoder 102, and the entropy decoder 102 decodes the bit stream into an intermediate binary string. The intermediate binary string decoded by the entropy decoder 102 is allocated to the plurality of pixel processors by the parser 103 in rows, and is decoded into displayable image data by the plurality of pixel processors 105.

It should be appreciated that in embodiments of the present application, the bitstream may be provided as the final form of binary encoding of the original data image. There is also an intermediate binary form in the encoding of the image from the original uncoded image data to the final bit stream. Illustratively, the original uncoded data image is encoded to obtain an intermediate binary string, and the intermediate binary string is compressed to obtain an encoded final binary form, which may be, for example, a bitstream. In a specific embodiment of the present application, the intermediate binary string may be a bin stream (bin string), and in an alternative, the bit stream of the final form may be obtained by compressing the bin stream. As described in the embodiments of the present application, the intermediate binary string does not include the bit stream.

The displayable image data is data that can be used for display by a display. In one example, the displayable image data may be YUV formatted data (a color coding method).

Wherein the entropy decoder 102 and the parser 103 are coupled to each other, the parser 103 and the frame recorder 104, the frame recorder 104 and the pixel processor 105.

In one example, fig. 2 is a schematic diagram of a video decoding apparatus according to an embodiment of the present application. As shown in fig. 2, includes a bus arbitration module 101, an entropy decoder 102, a parser 103, a frame recorder 104, and a pixel processor 105. Wherein the entropy decoder 102 comprises first to fourth entropy decoders, the parser 103 comprises first to fourth parsers, the frame recorder 104 comprises first to nth frame recorders, and the pixel processor 105 comprises first to fourth pixel processors.

One end of the bus arbitration module 101 is connected to an external bus, and the other end of the bus arbitration module 101 is connected to an entropy decoder 102, a parser 103, and a pixel processor 105 inside the video decoder. The entropy decoder 102 and the parser 103, the parser 103 and the frame recorder 104, and the frame recorder 104 and the pixel processor 105 are also connected through independent buses respectively.

Specifically, the entropy decoder 102 is connected to the bus arbitration module 101, and receives a bit stream (bit stream) sent by the bus arbitration module 101. The entropy decoder includes a plurality of entropy decoders. In a specific embodiment of the present application, the multiple entropy decoding modules may process one frame of an image to be decoded separately, or may process different slices of one frame of the image to be decoded at the same time.

When a plurality of entropy decoders process one frame of an image to be decoded at the same time, the entropy decoder 102 determines to decode different slices of the bit stream of the frame of the image into a bin stream using several entropy decoders through frame-level information and slice information included in the bit stream. The frame-level information includes a size of an image, an encoding mode adopted by the image, and a frame of the image to be decoded includes several slices, etc., and slice information is used to indicate that the frame of the image includes several slices and an encoding mode of each slice. And a complete area which adopts different coding modes with adjacent areas in a frame of image to be decoded is a stripe. When a frame of image to be decoded adopts an encoding mode, the frame of image comprises a slice which is a slice.

Of course, when the partial entropy decoder decodes a different slice of the image to be decoded of one frame, the other partial idle entropy decoder can continue decoding the image to be decoded of the next frame, so that the coding efficiency of the encoder can be improved as much as possible.

When the entropy decoders process images to be decoded of different frames respectively, each entropy decoder processes the images to be decoded of each frame according to the sequence of video playing. After the image to be decoded of one frame is processed, the image to be decoded of the next frame is processed.

The entropy decoder decoding the bitstream of the at least one frame of the image to be decoded comprises decoding the bitstream of the at least one frame of the image to be decoded into a bin stream. In one example, when the encoding protocol of the video is the high efficiency video encoding (HEVC, high Efficiency Video Coding) protocol, the entropy decoder decoding the bitstream into a bin stream may use Context-based binary arithmetic coding (CABAC) or other decoding engines for decoding. When the encoding protocol of the video is h.264 protocol (h.264 protocol is an international video coding standard commonly developed by the joint development group ITU-T and ISO/IEC in 1997), the entropy decoder decodes the bitstream into a bin stream using an adaptive variable Length code (CAVLC) decoding engine. Decoding using the CAVLC decoding engine includes cutting the bit stream, and the cut bit stream is used as a bin stream. Of course, the above video encoding protocol is merely an example in the implementation of the present application, and the present application is not limited to the different video encoding protocols and the encoding modes adopted in the prior art.

The parser 103 is configured to distribute the decoded bin stream to different pixel processors, so that the bin stream of the at least one frame of image to be decoded is decoded into YUV by the plurality of pixel processors in parallel.

Optionally, before the parser distributes the bin stream to the plurality of pixel processors, the bus arbitration module 101 is further configured to store the bin stream to a storage space corresponding to each entropy decoder through an external bus. Before the parser allocates the bin stream to the different pixel processors, the parser 103 also reads the bin stream from the specified memory space via an external data bus.

Specifically, each of the plurality of entropy decoders 102 includes a corresponding storage space for temporarily storing the bin stream decoded by the entropy decoder. After the entropy decoder 102 decodes an image to be decoded of a frame, the decoded bin stream is stored in a storage space corresponding to the entropy decoder for decoding the image. The parser 103 reads out the bin stream decoded by the entropy decoder 102 from the storage space, and distributes the bin stream belonging to one frame image to a plurality of pixel processors of the pixel processors in rows.

When the coding protocol of the video is HEVC protocol, the parser divides the bin stream decoded by at least one entropy decoder according to CTB rows; when the encoding protocol of the video is h.264 protocol, the parser divides the bin stream decoded by the at least one entropy decoder by MB lines.

When the parser distributes the bin stream of at least one frame image to a plurality of pixel processors by rows, the pixel processor corresponding to each row of the bin stream of at least one frame image is determined. And storing the data into a sub-storage space corresponding to the pixel processor. The pixel processor can directly read a tree-shaped coded Block (coding tree blocks, CTB) row or Macroblock (MB) row bin stream by storing the bin stream in the CTB row or MB row bin stream into a corresponding memory space of the pixel processor.

Optionally, the embodiment of the present application provides a plurality of frame recorders, where each frame recorder is configured to record a storage state of a storage space of one frame of image. In one example, when the parser 103 writes data once to the designated storage space, the counter of the frame recorder corresponding to the frame is incremented by 1; when the parser 104 reads data once from the specified storage space, the counter of the frame recorder corresponding to the frame for which it is set to be minus 1.

The parser 104 determines the storage state of the storage space by querying the counter, and determines whether the storage space is full. When the storage space is full, data cannot be written to the storage space. When the pixel processor query counter in the plurality of pixel processors 105 is less than or equal to 0, it indicates that no data in the storage space can be read.

Each of the plurality of pixel processors may process a bin stream of one CTB row or MB row separately.

The parser and the frame recorder described in the present application may respectively use a general central processing unit (Central Processing Unit, CPU), a System On Chip (SOC), a processor integrated on the SOC, a separate processor Chip or controller, etc.; alternatively, the parser and frame recorder may also include dedicated processing devices, such as an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), a field programmable gate array (Field Programmable Gate Array, FPGA), or a digital signal processor (Digital Signal Processor, DSP), respectively.

The video decoding device in the present application will be described in more detail below by specific method steps. Fig. 3 is a schematic diagram of a video decoding method according to an embodiment of the present application. As shown in fig. 3, the method includes:

s301, decoding a plurality of slice slices of a bit stream of an image to be decoded in an M-frame bit stream form into an intermediate binary string in parallel; any frame of the M frames of images to be decoded contains at least one slice, and M is a positive integer greater than 0.

When the video is required to be decoded by the decoder in the application, the entropy decoders in the decoder acquire bit streams of the video which is required to be decoded from an external bus through a bus arbitration module. In a specific embodiment of the present application, a plurality of entropy decoders included in the entropy decoder may process one frame of an image to be decoded separately, or may process different slices of one frame of the image to be decoded together.

In a specific embodiment of the present application, the obtained bitstream of the video to be decoded may be a bitstream of obtaining one frame of image to be decoded, or may be a bitstream of obtaining multiple frames of image to be decoded. When the entropy decoders process bit streams of one frame of image to be decoded, respectively, the number of frames of the image acquired by the entropy decoders is the same as the number of the entropy decoders.

When a plurality of entropy decoders process an image to be decoded at the same time, the entropy decoders determine to decode the bit stream of the frame by using several entropy decoders through frame-level information and slice information included in the bit stream. Each entropy decoder completely decodes at least one slice in a frame of an image to be decoded. One slice is used to represent an area in the image, and the image of the area adopts a coding mode.

For example, if a frame of image to be decoded has 1 Slice, decoding the frame of image by using an entropy decoder; when a frame of image to be decoded has two slices, decoding the frame of image by using one or two entropy decoders; if there are 20 slices in a frame of an image to be decoded, one, two, three or four entropy decoders are used to decode the frame of the image, and for example, if hardware allows, 20 entropy decoders may be used to simultaneously decode 20 slices in a frame of the image to be decoded in parallel.

Alternatively, when a partial entropy decoder processes one frame of an image to be decoded, the entropy decoder in an idle state may acquire a bitstream of the next frame of the image to be decoded. The currently idle entropy decoder decodes the image to be decoded of the next frame through the currently idle entropy decoder and frame-level information and slice information included in the bit stream, and the entropy decoders in the idle state are exemplified to have 2 entropy decoders and 3 slices are included in the image to be decoded of one frame, so that the 2 slices of the image are processed based on the 2 entropy decoders in the idle state, and the remaining 1 slice can be decoded after the entropy decoders in the decoding state are idle.

When a plurality of entropy decoders process a frame of image to be decoded respectively, each entropy decoder decodes the frame of image to be decoded. For example, a first entropy decoder processes a first frame of an image to be decoded, a second entropy decoder processes a second frame of an image, a third entropy decoder processes a third frame of an image, and a fourth entropy decoder processes a fourth frame of an image. When the first entropy decoder finishes processing the first frame of image to be decoded, the fifth frame of image is processed again. The video decoding is completed in the above-described loop manner.

According to the method and the device, the entropy decoders are used for decoding a plurality of Slice of a frame of image to be decoded in parallel or respectively decoding a frame of image to be decoded, so that the decoding performance of the entropy decoders is improved.

The entropy decoder may take a number of ways to decode the bit stream of at least one frame of the image to be decoded into a bin stream. When the encoding protocol of the video is HEVC protocol, an entropy decoder decodes the bitstream into a bin stream using CABAC or other decoding engines. When the encoding protocol of the video is H.264, the entropy decoder uses a CAVLC decoding engine to cut the bit stream, and the cut bit stream is used as a bin stream. The method includes that the bit stream is decoded into the bin stream by the CABAC or other decoding engines, or the CAVLC decoding engine is used for cutting the bit stream, and the cut bit stream is taken as the bin stream as the prior art, which is not limited in the application.

Optionally, each entropy decoder is configured to separately decode a complete frame of an image to be decoded, and each entropy decoder corresponds to an independent storage space. And writing the bin stream which is solved by each entropy decoder into a storage space corresponding to the entropy decoder.

In one example, fig. 4 is an image to be decoded according to an embodiment of the present application. As shown in fig. 4, the image includes 8 rows, wherein the first row to the third row are the first stripe (first slice), and the fourth row to the eighth row are the second stripe (second slice). The first slice is encoded by a first encoding scheme and the second slice is encoded by a second encoding scheme.

In a method of simultaneously decoding a frame of an image to be decoded using a plurality of decoders, when the frame of the image includes two slices, it may be determined that a bit stream of the frame is decoded in parallel by two entropy decoders. Wherein the first entropy decoder decodes the first slice and the second entropy decoder decodes the second slice. And after the first entropy decoder finishes decoding the first slice, storing the bin stream obtained by decoding into a storage space corresponding to the first entropy decoder. And the second entropy decoder stores the bin stream obtained after the second slice decoding is completed into a storage space corresponding to the second entropy decoder.

After finishing the decoding of the image to be decoded of the first frame, the entropy decoder continues to decode the image of the second frame and stores the decoded bin stream into the storage space of the corresponding entropy decoder. The decoding manner of the second frame image is the same as the above manner, and this is not repeated in the present application.

S302, dividing the intermediate binary string of the M-frame image to be decoded into a plurality of rows.

The decoder further comprises a parser for distributing the bin stream of at least one frame of image to a plurality of pixel processors according to rows.

Optionally, one of the resolvers further obtains a corresponding bin stream from a memory space of a corresponding entropy decoder before distributing the bin stream to the plurality of pixel processors.

The plurality of resolvers included in the resolvers may acquire the bin streams of one frame of image, respectively, and arrange the acquired bin streams in rows. Each parser allocates bin streams to a plurality of pixel processors in rows, respectively.

Arranging the acquired bin streams of one frame image by one parser in rows may include various ways, for example, the parser may arrange the acquired bin streams of one frame image in CTB rows or MB rows. When the coding protocol of the video is HEVC protocol, dividing the bin stream of a frame of image by a parser according to CTB line; when the coding protocol of the video is H.264 protocol, the parser divides the bin stream of a frame of image by MB line.

The parser will also allocate the bin stream to different storage spaces by CTB line or MB line after dividing the bin stream decoded by the entropy decoder by CTB line or MB line. Specifically, the storage space includes a plurality of storage spaces, and each storage space is used for storing a bin stream of a frame of image in a row. Meanwhile, each storage space further comprises a plurality of sub-storage spaces, each sub-storage space corresponds to different pixel processors, and the sub-storage spaces correspond to the pixel processors one by one. Illustratively, the pixel processor reads a row of the bin stream of a frame image from a sub-storage space corresponding to the pixel processor in a storage space corresponding to the frame image.

In one example, storing a frame of image by a parser in a row to a specified storage space may include: and determining which storage space the frame image is stored in according to the information of the frame. And determining through which pixel processor a CTB line or MB line in a frame of image is decoded; and determining the corresponding sub-storage space of the pixel processor. The data of the CTB line or MB line is stored in a sub-storage space of the designated storage space.

In one example, the parser obtains the decoded bin stream of the frame from the entropy decoder, and allocates the bin stream by rows, where the video is encoded using HEVC protocol. The first CTB block of the first row is treated as the first CTB block of the first row with the first amount of data in the bin stream according to the size requirement of the first CTB block of the first row. The number of CTB blocks included in each line is determined in the above manner and the size of the image in the frame-level information.

When it is needed to be described, the bin stream of at least one slice decoded by the entropy decoder is a whole string of data. The whole string of data is divided into a plurality of rows by adopting the parser, so that each pixel processor in the plurality of pixel processors can process data of different rows respectively. Thus, a plurality of pixel processors process one frame of image at the same time, and the decoding performance is improved. Wherein the parser divides the whole string of data into a plurality of rows by determining how many data blocks each row comprises and how much data each data block comprises according to the encoding protocol of the video.

Meanwhile, the parser stores different rows in a frame of image to be decoded into different sub-storage spaces of the same storage space respectively according to the pixel processor. The same storage space is a storage space corresponding to the frame image. For example, the 0 th CTB line data is stored in a first sub-storage space corresponding to a first pixel processor in the storage space, the 1 st CTB line is stored in a second sub-storage space corresponding to a second pixel processor in the storage space, the 2 nd CTB line data is stored in a third sub-storage space corresponding to a third pixel processor in the storage space, the 3 rd CTB line data is stored in a fourth sub-storage space corresponding to a fourth pixel processor in the storage space, and the 4 th CTB line data is stored in a first sub-storage space corresponding to the first pixel processor in the storage space. And storing the frame image into storage spaces corresponding to different pixel processors according to the circulating mode.

The frame recorder includes a plurality of frame recorders each recording writing and reading of one frame image. Specifically, each frame recorder includes a plurality of counters for each pixel processor. In an alternative, when the parser writes data once to a storage space corresponding to a pixel processor, the write record of the pixel processor in the frame recorder opposite to the storage space is incremented by 1.

In a specific example, the parser sends write-once information to the frame recorder, which determines the counter corresponding to the pixel processor to increment by 1 based on the write-once information.

Specifically, the writing information includes information of a written frame and information of a line of the frame image. The writing information includes which frame the writing data belongs to, which storage space the data is written to, and the pixel processor to which the writing data corresponds. The frame recorder determines through which frame recorder the write information is to be processed, depending on which frame the write data included in the write information belongs to. The determined frame recorder adds 1 to the counter of the sub-storage space of the corresponding storage space in the frame recorder according to which storage space and the corresponding sub-storage space the data included in the writing information is written to.

The number of writes is used to indicate the storage status of each word storage space in the frame recorder. When the counter is larger than a preset threshold value, the sub-storage space does not have space to store more data, and at this time, the frame recorder sends stop data writing information to the parser. The stop data writing information is used for instructing the parser to stop writing data to the sub-storage space of the storage space. The preset threshold value of the counter can be determined according to the size of the data written each time and the size of the sub-storage space, so that the data stored in the sub-storage space is ensured to be smaller than the capacity of the storage space.

S303, decoding a plurality of rows of the intermediate binary string into displayable image data in parallel.

The decoder in the specific embodiment of the present application further includes a plurality of pixel processors that decode a plurality of rows of the bin stream of the at least one frame image into image information in parallel in units of rows.

Each pixel processor in the plurality of pixel processors corresponds to a respective sub-storage space. Each pixel processor reads data from the corresponding sub-storage space when processing one frame of image. The pixel processor also sends a read message to the frame recorder before reading the data from the corresponding memory space. The frame recorder subtracts 1 from the number of writes to the corresponding storage space in the frame recorder based on the read information.

The read information includes which frame the read data belongs to and the pixel processor that read. The frame recorder determines through which frame recorder the read information is processed according to which frame the read data to be read included in the read information belongs to. The determined frame recorder decrements the counter of the corresponding storage space in the frame recorder by 1 according to the pixel processor read from the read information.

And determining whether to read the data or not by inquiring the counter, and if the counter is smaller than or equal to 0, the data currently stored in the sub-storage space is empty. The frame recorder sends information to the pixel processor to stop data reading, and the corresponding pixel processor cannot read the data of the frame image. When the count of the counter is greater than or equal to 1, the corresponding pixel processor reads corresponding data. And recording the storage state of the bin stream of the multi-frame image in the storage space corresponding to the pixel processor by arranging a plurality of frame recorders. So that the entropy decoder can continue decoding the next frame image after finishing decoding the one frame image.

After the pixel processors acquire the data of different rows in one frame, each pixel processor decodes the data of different rows in parallel at the same time, and decodes the bit stream into displayable image data. For example, the displayable image data is YUV data that can be displayed through a display screen, and the decoded YUV is stored in a designated storage space.

In one example, fig. 5 is a block diagram of data of a CTB line that a pixel processor needs to decode according to an embodiment of the present application. As shown in fig. 5, one CTB row corresponding to each pixel processor includes 6 CTB blocks, respectively. The first to fourth pixel processors decode four rows of CTBs in parallel, further comprising querying whether neighboring data is available. By inquiring whether adjacent data is available, the decoding sequence and correctness of the four-row CTB are ensured. For example, when the sixth CTB row of the first pixel processor is not completely decoded, the 6 th CTB block of the second pixel processor, the 5 th CTB block and the 6 th CTB block of the third pixel processor, and none of the 4 th CTB block, the 5 th CTB block and the 6 th CTB block of the fourth pixel processor can be decoded.

In the above examples of the present application, the efficiency of image decoding is improved by simultaneous decoding by a plurality of pixel processors. Meanwhile, due to the front-back relevance of image decoding, the pixel processors can decode different rows of a frame of image at the same time, so that the problem that each pixel processor cannot decode different frames is avoided. The efficiency of decoding is improved.

The above method embodiments are only decoding methods when the video decoder decodes one frame of image. Since each of the video decoders is a mutual independent device. Thus, after one device has processed a frame image, the next frame image can be continued to be decoded without having to take care of whether the subsequent devices have decoded the frame image.

Next, a video decoding method provided in the specific embodiment of the present application will be specifically described by way of an example. Fig. 6 is a frame image according to an embodiment of the present application. As shown in fig. 6, 5 slices, each employing one coding scheme. In this example, the entropy decoder 1 decodes data of slice0, the entropy decoder 2 decodes data of slice1, the entropy decoder 3 decodes data of slice2, the entropy decoder 4 decodes data of slice3, the entropy decoder 1 decodes data of slice4, and the entropy decoder 2 decodes data of slice 5.

The parser obtains the bin stream decoded by the entropy decoder and then allocates the bin stream by row. Specifically, the parser reads Slice0 data from the sub-storage space corresponding to the entropy decoder 1, the parser reads Slice1 data from the storage space corresponding to the entropy decoder 2, the parser reads Slice2 data from the storage space corresponding to the entropy decoder 3, the parser reads Slice3 data from the storage space corresponding to the entropy decoder 4, the parser reads Slice4 data from the storage space corresponding to the entropy decoder 1, and the parser reads Slice5 data from the storage space corresponding to the entropy decoder 2.

The parser also distributes the acquired bin stream of a frame of image to four pixel processors for decoding in rows, and the process is as follows:

Assigning row 0 CTB to pixel processor 0; assigning row 1 CTBs to pixel processor 1; assigning row 2 CTBs to pixel processor 2; assigning row 3 CTBs to pixel processors 3; assigning row 4 CTBs to pixel processor 0; assigning row 5 CTBs to pixel processor 1; assigning row 6 CTBs to pixel processors 2; assigning row 7 CTBs to pixel processors 3; assigning row 8 CTBs to pixel processor 0; assigning row 9 CTBs to pixel processor 1; row 10 CTBs are assigned to pixel processor 2.

Fig. 7 is a schematic structural diagram of a decoder according to an embodiment of the present application. As shown in fig. 7, the rating device includes: a processor 701, a memory 702, a communication interface 703.

The processor 701 may employ a general-purpose central processing unit (Central Processing Unit, CPU), a System On Chip (SOC), a processor integrated on the SOC, a separate processor Chip or controller, or the like; the processing system 130 may also include special purpose processing devices such as an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), a field programmable gate array (Field Programmable Gate Array, FPGA), or a digital signal processor (Digital Signal Processor, DSP), etc. The processor group formed by a plurality of processors may also be used, where the plurality of processors are coupled to each other through one or more buses and used to execute related programs, so as to implement the technical solution provided by the foregoing method embodiment of the present invention. In a specific example, the processor 701 can be as shown in fig. 1 and 2.

The Memory 702 may be a non-powered-down volatile Memory such as EMMC (Embedded Multi Media Card ), UFS (Universal Flash Storage, universal flash Memory) or Read-Only Memory (ROM), or other types of static storage devices that can store static information and instructions, a powered-down volatile Memory (volatile Memory), such as random access Memory (Random Access Memory, RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable Read-Only Memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), compact disc Read-Only Memory (Compact Disc Read-Only Memory, CD-ROM) or other optical disk storage, optical disk storage (including compact disc, laser disc, optical disc, digital versatile disc, blu-ray disc, etc.), magnetic disk storage media or other magnetic storage devices, or any other computer readable storage media that can be used to carry or store program code in the form of instructions or data structures and that can be accessed by a computer, but is not limited thereto. The memory 702 may store applications. When the technical solution provided by the embodiment of the present invention is implemented by software or firmware, the program code for implementing any of the optional technical solutions provided by the foregoing steps implemented in fig. 3 and method embodiments of the present invention is stored in the memory 702 and executed by the processor 701.

The communication interface 703 is used to connect with other devices, so as to acquire video to be decoded or transmit and output image data displayable after decoding.

The processor 701 includes at least one entropy decoder for decoding the obtained bit stream of the at least one frame of the image to be decoded into an intermediate binary string in parallel, and each of the at least one entropy decoder decodes at least one slice of the at least one frame of the image to be decoded. And a parser for distributing the intermediate binary string of the at least one frame image to the plurality of pixel processors in rows. The plurality of pixel processors decode a plurality of rows of the intermediate binary string of the at least one frame image into displayable image data in parallel in units of rows.

N entropy decoders are included in the processor 701 for acquiring a bit stream of one frame image. The N entropy decoders included in the processor 701 decode the acquired bit streams of the one frame image in parallel into an intermediate binary string, and the number of N is determined according to the number of slices included in the one frame image to be decoded.

The frame of the image to be decoded comprises N slices, N entropy decoders decode N slices of the frame of the image to be decoded in parallel, wherein each entropy decoder in the N entropy decoders decodes one slice in the frame of the image to be decoded respectively.

And when partial entropy decoders in the N entropy decoders decode the acquired bit stream of the image to be decoded of one frame into an intermediate binary string, the entropy decoder in the idle state in the at least one entropy decoder is used for acquiring the bit stream of the image to be decoded of the next frame. And the entropy decoder in an idle state is used for decoding part or all of the acquired bit stream of the image to be decoded of the next frame into a bin stream.

The number of the entropy decoders is N, and the N entropy decoders are used for acquiring bit streams of N frames of images to be decoded. Each of the N entropy decoders is configured to decode a bit stream of one of the N frames of images to be decoded into an intermediate binary string.

The apparatus further includes at least one memory space, each of the at least one memory space having a plurality of sub-memory spaces: the parser is configured to store the intermediate binary strings of the at least one frame of image to be decoded into a plurality of sub-storage spaces in at least one storage space in a row, where each storage space in the at least one storage space is configured to store the intermediate binary strings belonging to the same frame of image to be decoded, and the plurality of sub-storage spaces are in one-to-one correspondence with the plurality of pixel processors.

Each of the plurality of pixel processors is further configured to read a row of the intermediate binary string of the at least one frame image from the corresponding sub-storage space in units of rows, respectively.

Each of the plurality of sub-memory spaces corresponds to a counter, and the counter is used for recording the memory state of the sub-memory space.

When the parser writes data once to one sub-storage space in one storage space, the number of times of writing of a frame recorder corresponding to the storage space in the plurality of frame recorders is increased by 1. When one pixel processor of the plurality of pixel processors reads data from one sub-storage space of one storage space, the number of times of writing of a frame recorder corresponding to the storage space of the plurality of frame recorders is reduced by 1. The number of writes is used to indicate the storage status of each word storage space in the frame recorder.

The plurality of resolvers may be configured to assign the intermediate binary string of the at least one frame of image to the plurality of pixel processors by a row, including each of the plurality of resolvers individually assigning the intermediate binary string of any frame of image of the at least one frame of image to the plurality of pixel processors by a row.

When the coding protocol of the video is the high efficiency video coding HEVC protocol, a row of the intermediate binary string of one frame of pictures comprises at least one tree coding block CTB. When the encoding protocol of the video is the h.264 protocol, one line of the intermediate binary string of one frame image includes at least one macroblock MB.

The N entropy decoders are used for decoding the bit stream of the acquired at least one frame of image into an intermediate binary string in parallel, and the N entropy decoders are used for storing the decoded intermediate binary string into a storage space corresponding to the entropy decoder which completes decoding respectively, so that the parser acquires the intermediate binary string of the corresponding image from the storage space corresponding to the entropy decoder which completes decoding.

When each row of the intermediate binary string of one frame image is decoded by the pixel processor into displayable image information or is being decoded into displayable image data, respectively, and at least one pixel processor of the plurality of pixel processors is in an idle state, the at least one pixel processor in the idle state is further configured to concurrently decode at least one row of the intermediate binary string of the next frame image into image information.

Particular embodiments of the present application provide a computer readable storage medium storing one or more programs, the one or more programs comprising instructions, which when executed by an electronic device, comprising a plurality of application programs, cause the electronic device to perform part or all of the steps of any of the methods described above.

Based on such understanding, the embodiments of the present application also provide a computer program product containing instructions, the technical solution of the present application being essentially or partly contributing to the prior art or all or part of the technical solution may be embodied in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device, a mobile terminal or a processor therein to perform all or part of the steps of the method described in the embodiments of the present application. It should be noted that the embodiments provided in the present application are only optional embodiments described in the present application, and those skilled in the art may fully design many alternative embodiments on the basis of this embodiment, so they are not further described herein.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.

In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, e.g., the division of elements is merely a logical functional division, and there may be additional divisions of actual implementation, e.g., multiple elements or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.

The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, or in a software product stored in a storage medium, including several instructions to cause a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor (processor) to perform all or part of the steps of the methods of the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.

The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the present application, and the changes or substitutions are intended to be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A decoder, comprising:

at least one entropy decoder for decoding the obtained bit stream of at least one frame of images to be decoded into an intermediate binary string in parallel, the at least one entropy decoder simultaneously decoding different frames of images to be decoded in the at least one frame of images to be decoded, wherein each of the at least one entropy decoder decodes all slices in the corresponding one frame of images to be decoded;

a parser for distributing the intermediate binary strings of the at least one frame of the image to be decoded to a plurality of pixel processors in rows;

the plurality of pixel processors are used for decoding a plurality of rows of the intermediate binary string of the at least one frame of image to be decoded into displayable image data in parallel in units of rows.

2. Decoder according to claim 1, characterized in that the number of entropy decoders is N;

the N entropy decoders are used for acquiring bit streams of N frames of images to be decoded;

each entropy decoder of the N entropy decoders is configured to decode a bit stream of one frame of the N frames of images to be decoded into the intermediate binary string.

3. The decoder according to claim 1, wherein:

Each entropy decoder in the at least one entropy decoder decodes each frame of the at least one frame of images to be decoded according to the sequence of video playing.

4. A decoder according to any of claims 1-3, characterized in that the decoder further comprises: at least one storage space, each of the at least one storage space having a plurality of sub-storage spaces;

the parser: the intermediate binary strings used for storing the at least one frame of image to be decoded are stored in the plurality of sub-storage spaces in the at least one storage space in a row mode, each storage space of the at least one storage space is used for storing the intermediate binary strings belonging to the same frame of image to be decoded, and the plurality of sub-storage spaces are in one-to-one correspondence with the plurality of pixel processors.

5. The decoder of claim 4, wherein each of the plurality of sub-memory spaces corresponds to a counter, the counter being configured to record a memory state of the sub-memory space.

6. The decoder according to claim 1, wherein:

when the video coding protocol is the high efficiency video coding HEVC protocol, one row of the intermediate binary string of the one frame of image to be decoded comprises at least one tree coding block CTB;

When the encoding protocol of the video is h.264 protocol, one row of the intermediate binary string of the one frame of image to be decoded comprises at least one macroblock MB.

7. The decoder according to claim 1, wherein:

when each row of the intermediate binary string of the image to be decoded of one frame is decoded by the plurality of pixel processors into displayable image data or is being decoded into displayable image data, respectively, and at least one pixel processor of the plurality of pixel processors is in an idle state, the at least one pixel processor in the idle state is further configured to concurrently decode at least one row of the intermediate binary string of the image to be decoded of the next frame into displayable image data.

8. A decoder, comprising:

n entropy decoders, configured to decode the obtained bit streams of the M-frame images to be decoded into intermediate binary strings in parallel, where the N entropy decoders simultaneously decode at least one slice of the M-frame images to be decoded, and if M > N, when at least one of the N entropy decoders is in an idle state, at least one entropy decoder in an idle state is further configured to decode in parallel an undecoded image in the M-frame images to be decoded;

A parser for distributing the intermediate binary strings of the M frames of images to be decoded to a plurality of pixel processors in rows;

the plurality of pixel processors are used for decoding a plurality of rows of an intermediate binary string of the M-frame image to be decoded into displayable image data in parallel in a row unit, wherein if the number of the plurality of pixel processors is smaller than the number of the rows of the intermediate binary string, when at least one pixel processor in the plurality of pixel processors is in an idle state, at least one pixel processor in the idle state is also used for decoding the un-decoded rows in the intermediate binary string in parallel.

9. The decoder according to claim 8, wherein:

the N entropy decoders are used for obtaining bit streams of a frame of image to be decoded;

and the N entropy decoders decode the acquired bit streams of the one frame of image to be decoded into intermediate binary strings in parallel, and the number of N is determined according to the number of slices included in the one frame of image to be decoded.

10. The decoder according to claim 9, wherein the frame of pictures to be decoded comprises N slices;

the N entropy decoders are configured to decode N slices of the one frame of image to be decoded in parallel, where each of the N entropy decoders decodes one slice of the one frame of image to be decoded.

11. The decoder of claim 9, wherein when a partial entropy decoder of the N entropy decoders decodes the bit stream of the acquired M-frame image to be decoded into the intermediate binary string:

the entropy decoders in the idle state in the N entropy decoders are used for acquiring bit streams of images to be decoded of the next frame;

the entropy decoder in idle state is configured to decode part or all of the obtained bit stream of the image to be decoded of the next frame into the intermediate binary string.

12. The decoder according to claim 8, wherein:

13. The decoder according to any of claims 8-12, further comprising: at least one storage space, each of the at least one storage space having a plurality of sub-storage spaces;

14. The decoder of claim 13, wherein each of the plurality of sub-memory spaces corresponds to a counter, the counter being configured to record a memory state of the sub-memory space.

15. The decoder according to claim 8, wherein:

16. The decoder according to claim 8, wherein:

17. A video decoding method, comprising:

decoding, by at least one entropy decoder, the obtained bit stream of at least one frame of images to be decoded in parallel into an intermediate binary string, wherein the at least one entropy decoder decodes different frames of images to be decoded in the at least one frame of images to be decoded simultaneously, each of the at least one entropy decoder decoding all slices in the corresponding one frame of images to be decoded;

dividing, by a parser, the intermediate binary string of the at least one frame of the image to be decoded into a plurality of rows;

multiple rows of the intermediate binary string of the at least one frame of the image to be decoded are decoded in parallel in units of rows into displayable image data by a plurality of pixel processors.

18. The method according to claim 17, wherein the number of entropy decoders is N, and the decoding, by at least one entropy decoder, of the obtained bit stream of at least one frame of the image to be decoded into an intermediate binary string in parallel, specifically comprises:

acquiring bit streams of N frames of images to be decoded by N entropy decoders;

and decoding a bit stream of one frame of the N frames of images to be decoded into the intermediate binary string by each entropy decoder of the N entropy decoders.

19. The method of claim 17, wherein each of the at least one frame of images to be decoded is decoded by each of the at least one entropy decoder in a video playback order.

20. The method according to any one of claims 17-19, wherein before the parallel decoding of the plurality of rows of the intermediate binary string of the at least one frame of the image to be decoded into displayable image data in units of rows by a plurality of pixel processors, the method further comprises:

and storing the intermediate binary strings of the at least one frame of image to be decoded into a plurality of sub-storage spaces in at least one storage space by the parser, wherein each storage space of the at least one storage space is used for storing the intermediate binary strings belonging to the same frame of image to be decoded, and the plurality of sub-storage spaces are in one-to-one correspondence with the plurality of pixel processors.

21. The method of claim 20, wherein the at least one memory space comprises a plurality of sub-memory spaces, each of the plurality of sub-memory spaces corresponding to a counter for recording a memory state of the sub-memory space.

22. The method according to claim 17, wherein:

when the coding protocol of the video is the HEVC (high efficiency video coding) protocol, one row of the intermediate binary string of the one frame of image to be decoded comprises at least one tree coding block (CTB);

when the encoding protocol of the video is h.264 protocol, one row of the intermediate binary string of the one frame of image to be decoded includes at least one macroblock MB.

23. The method according to claim 17, wherein the parallel decoding of the plurality of lines of the intermediate binary string of the at least one frame of the image to be decoded into displayable image data by the plurality of pixel processors in units of lines, in particular comprises:

when each row of the intermediate binary string of one frame of the image to be decoded is decoded into displayable image data or is being decoded into displayable image data by the plurality of pixel processors, respectively, and at least one pixel processor of the plurality of pixel processors is in an idle state, at least one row of the intermediate binary string of the next frame of the image to be decoded is decoded in parallel into displayable image data by the at least one pixel processor in the idle state.

24. A video decoding method, comprising:

Parallelly decoding at least one slice of a bit stream of the obtained M frames of images to be decoded into an intermediate binary string by N entropy decoders, wherein if M is more than N, when at least one entropy decoder in the N entropy decoders is in an idle state, at least one slice of an image to be decoded, which is not decoded in the M frames of images to be decoded, is parallelly decoded into the intermediate binary string by at least one entropy decoder in the idle state;

dividing the intermediate binary string of the M-frame image to be decoded into a plurality of rows by a parser;

and decoding, by a plurality of pixel processors, a plurality of rows of an intermediate binary string of the M-frame image to be decoded in parallel into displayable image data in a row unit, wherein if the number of the plurality of pixel processors is smaller than the number of rows of the intermediate binary string, when at least one pixel processor of the plurality of pixel processors is in an idle state, the non-decoded rows in the intermediate binary string are decoded in parallel into displayable image data by at least one pixel processor in the idle state.

25. The method according to claim 24, characterized in that said decoding, by N entropy decoders, in parallel, of at least one slice of the bitstream of the acquired M frames of images to be decoded into an intermediate binary string, in particular comprising:

Acquiring bit streams of a frame of image to be decoded by the N entropy decoders;

and the N entropy decoders decode the acquired bit streams of the one frame of image to be decoded into an intermediate binary string in parallel, and the number of N is determined according to the number of slices included in the one frame of image to be decoded.

26. The method according to claim 25, wherein the one frame of image to be decoded comprises N slices, and the N entropy decoders decode the acquired bit stream of the one frame of image to be decoded into an intermediate binary string in parallel, specifically comprising:

and decoding N slices of the one frame of image to be decoded in parallel by the N entropy decoders, wherein each entropy decoder in the N entropy decoders decodes one slice in the one frame of image to be decoded respectively.

27. The method according to claim 25, wherein said decoding, by said N entropy decoders, of the acquired bit stream of said one frame of images to be decoded in parallel into an intermediate binary string, comprises in particular:

acquiring a bit stream of an image to be decoded of a next frame by an entropy decoder in an idle state in the N entropy decoders;

decoding, by the entropy decoder in an idle state, part or all of the acquired bit stream of the image to be decoded of the next frame into the intermediate binary string.

28. The method according to claim 24, characterized in that said decoding, by N entropy decoders, in parallel, of at least one slice of the bitstream of the acquired M frames of images to be decoded into an intermediate binary string, in particular comprising:

acquiring bit streams of N frames of images to be decoded by the N entropy decoders;

29. The method according to any one of claims 24-28, wherein before parallel decoding of the plurality of rows of the intermediate binary string of M frames of the image to be decoded into displayable image data in units of rows by a plurality of pixel processors, the method further comprises:

30. The method of claim 29, wherein each of the plurality of sub-storage spaces corresponds to a counter, the counter being used to record a storage state of the sub-storage space.

31. The method according to claim 24, wherein:

32. The method according to claim 24, wherein the parallel decoding of the plurality of rows of the intermediate binary string of the at least one frame of the image to be decoded into displayable image data by the plurality of pixel processors in units of rows, in particular comprises:

33. A computer readable storage medium having stored therein instructions which, when executed on a computer or processor, cause the computer or processor to perform the method of any of claims 17-23.

34. A computer readable storage medium having stored therein instructions which, when executed on a computer or processor, cause the computer or processor to perform the method of any of claims 24-32.