CN116501691B - Automatic layout method and device of interconnection system, electronic equipment and storage medium - Google Patents

Automatic layout method and device of interconnection system, electronic equipment and storage medium Download PDF

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CN116501691B
CN116501691B CN202310761942.0A CN202310761942A CN116501691B CN 116501691 B CN116501691 B CN 116501691B CN 202310761942 A CN202310761942 A CN 202310761942A CN 116501691 B CN116501691 B CN 116501691B
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routing
node
coordinates
route
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CN116501691A (en
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魏斌
邓喻文
张亚林
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Beijing Suiyuan Intelligent Technology Co ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

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Abstract

The invention discloses an automatic layout method and device of an interconnection system, electronic equipment and a storage medium. The method comprises the following steps: acquiring a first connection relation between each routing node and a second connection relation between each access node and an adjacent routing node in the interconnection system; determining initial route coordinates of each route node in a layout space according to the first connection relation; according to the first connection relation, identifying each routing ring in the interconnection system, and adjusting the initial routing coordinates of each routing node in the routing ring into standard routing coordinates according to a standard circular model; determining the entrance and exit coordinates of each entrance and exit node in the layout space according to the second connection relation, and planning the connection path between each entrance and exit node and the adjacent routing node; and drawing a topological graph of the interconnection system in a layout space according to the first connection relation, the standard routing coordinates, the access coordinates and the connection paths so as to automatically generate an accurate, reasonable and standardized interconnection system layout.

Description

Automatic layout method and device of interconnection system, electronic equipment and storage medium
Technical Field
The present invention relates to the field of AI (Artificial Intelligence) processor development, and in particular, to an automated layout method and apparatus for an interconnection system, an electronic device, and a storage medium.
Background
With the continuous upgrading of the chip manufacturing process, the computing power density of the AI processor deployed on the unit wafer area is higher and higher, so that the logic design density of the AI processor on the unit area is increased continuously, and the number of hardware components of a single chip of the AI processor is increased exponentially. This places high demands on the design of the AI processor architecture.
The complexity of several tens of hundreds of hardware components and several hundred thousands of data channels makes the hardware architecture of the manual hand-drawn AI processor more and more difficult, and is very prone to error, which ultimately causes irreversible production loss. One subsystem that is particularly important in hardware architecture diagrams is the interconnection of hardware components. The connection relationships of all hardware components in the system on chip are defined by the interconnection system. Meanwhile, due to the relative position difference of hardware components, different relative performance relations are brought about by different interconnection system designs, and great challenges are brought to the design and verification of the interconnection system.
Therefore, how to efficiently, accurately and automatically generate the layout of the interconnection system in the AI processor is an important problem in the field of chip manufacturing today.
Disclosure of Invention
The embodiment of the invention provides an automatic layout method, an automatic layout device, electronic equipment and a storage medium of an interconnection system, which are used for realizing the automatic layout of the interconnection system in an AI processor hardware architecture.
According to an aspect of the embodiment of the present invention, there is provided an automated layout method of an interconnection system, including:
acquiring a first connection relation between each routing node and a second connection relation between each access node and adjacent routing nodes in an interconnection system to be drawn;
determining initial route coordinates of each route node in a layout space according to the first connection relation;
according to the first connection relation, identifying each routing ring in the interconnection system, and adjusting the initial routing coordinates of each routing node in the routing ring into standard routing coordinates according to a standard circular model;
determining the entrance and exit coordinates of each entrance and exit node in the layout space according to the second connection relation, and planning the connection path between each entrance and exit node and the adjacent routing node;
And drawing a topological graph of the interconnection system in the layout space according to the first connection relation, the standard routing coordinates, the access coordinates and the connection paths.
According to another aspect of an embodiment of the present invention, there is provided an automated layout apparatus of an interconnection system, including:
the connection relation acquisition module is used for acquiring a first connection relation between each routing node and a second connection relation between each gateway node and the adjacent routing node in the interconnection system to be drawn;
the initial route coordinate determining module is used for determining the initial route coordinate of each route node in the layout space according to the first connection relation;
the standard route coordinate adjustment module is used for identifying each route ring in the interconnection system according to the first connection relation and adjusting the initial route coordinate of each route node in the route ring into a standard route coordinate according to the standard circular paradigm;
the connection path planning module is used for determining the entrance and exit coordinates of each entrance and exit node in the layout space according to the second connection relation and planning the connection path between each entrance and exit node and the adjacent routing node;
and the topology drawing module is used for drawing a topology drawing of the interconnection system in the layout space according to the first connection relation, the standard routing coordinates, the entrance and exit coordinates and the connection paths.
According to another aspect of an embodiment of the present invention, there is provided an electronic apparatus including:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein, the liquid crystal display device comprises a liquid crystal display device,
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the automated layout method of an interconnect system according to any of the embodiments of the present invention.
According to another aspect of the embodiments of the present invention, there is provided a computer readable storage medium storing computer instructions for causing a processor to implement the automated layout method of the interconnection system according to any of the embodiments of the present invention when executed.
According to the technical scheme, the first connection relation between each routing node in the interconnection system to be drawn and the second connection relation between each gateway node and the adjacent routing node are obtained; determining initial route coordinates of each route node in a layout space according to the first connection relation; according to the first connection relation, identifying each routing ring in the interconnection system, and adjusting the initial routing coordinates of each routing node in the routing ring into standard routing coordinates according to a standard circular model; determining the entrance and exit coordinates of each entrance and exit node in the layout space according to the second connection relation, and planning the connection path between each entrance and exit node and the adjacent routing node; according to the technical means of drawing the topological graph of the interconnection system in the layout space according to the first connection relation, the standard routing coordinates, the access coordinates and the connection paths, the accurate, reasonable and standardized interconnection system layout can be automatically generated on the premise that only the interconnection relation definition of the interconnection system is obtained, so that the layout time of the interconnection system is greatly saved, and meanwhile, the automatic layout technology can start the performance analysis of the interconnection system in the conceptual design stage of the chip without waiting for a logic verification stage or a silicon chip verification stage, so that the development efficiency of the chip is further improved.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of an interconnection architecture model of a hardware component group in an AI processor to which an embodiment of the invention is applicable;
FIG. 2 is a flow chart of an automated layout method for an interconnect system according to a first embodiment of the present invention;
fig. 3 is a schematic structural diagram of a standard circular pattern corresponding to different numbers of routing nodes, to which embodiments of the present invention are applicable;
fig. 4 is a flowchart of an automated layout method of an interconnection system according to a second embodiment of the present invention;
FIG. 5 is a schematic diagram of a random layout of routing nodes in a layout space, to which embodiments of the present invention are applicable;
FIG. 6 is a schematic diagram of a specific implementation of the overall rotation and relative distance homogenization of random routing coordinates for each routing node, as applicable to an embodiment of the present invention;
FIG. 7 is a schematic diagram of a random layout of routing nodes after relative distance homogenization, according to an embodiment of the present invention;
FIG. 8 is a flow chart of an automated layout method for an interconnect system according to a third embodiment of the present invention;
FIG. 9 is a schematic diagram of an embodiment of the present invention after initial routing coordinates of each routing node are adjusted to canonical routing coordinates;
FIG. 10 is a flow chart of an automated layout method for an interconnect system according to a fourth embodiment of the present invention;
FIG. 11 is a schematic illustration of a pair of intercept points to which embodiments of the present invention are applicable;
FIG. 12 is a schematic diagram of an interconnection system topology for an automated layout, to which embodiments of the present invention are applicable;
fig. 13 is a schematic structural diagram of an automated layout apparatus of an interconnection system according to a fifth embodiment of the present invention;
fig. 14 is a schematic structural diagram of an electronic device of an automated layout method of an interconnection system according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
For the sake of understanding, the related art to which the embodiments of the present invention relate will be briefly described first.
First, fig. 1 is a schematic diagram of an interconnection architecture model of a hardware component group inside an AI processor to which an embodiment of the present invention is applicable. As shown in fig. 1, the overall interconnection architecture model includes a hardware component group and an interconnection system. The hardware component group comprises a plurality of hardware components, the interconnection system comprises a plurality of access node groups and a plurality of routing nodes, and each access node group comprises an inlet node and an outlet node. The gateway node group has a corresponding relation with the hardware component. The interconnection system is used for establishing communication connection between every two hardware components in the hardware component group.
Specifically, each hardware component includes one or more master (master) ports and one or more slave (slave) ports. The master port and the slave port of each hardware component are mounted in an ingress and egress node group in the interconnection system. The master port and the inlet node are connected in a unidirectional point-to-point mode, and the slave port and the outlet node are connected in a unidirectional point-to-point mode.
An ingress node, also referred to as a request server, may be understood as an ingress to an interconnect system for receiving a request sent by a master port of a hardware component to which it is interfaced, and forwarding the request through one or more routing nodes to an egress node to which the hardware component to which the request is directed interfaces, and through the egress node to a slave port of the directed hardware component. Accordingly, an egress node, also referred to as a request initiator, may be understood as an egress of the interconnect system for sending a request sent to a hardware component via the interconnect system to a slave port of the docked hardware component. The unidirectional point-to-point connection is arranged between the entrance node and the adjacent routing node and between the exit node and the adjacent routing node.
The routing node is an important component in the interconnection system and is used for executing the forwarding of the request according to the routing definition of the interconnection system, and the routing node has input and output and is neither a starting point nor an ending point of the request.
In combination with the related definition of the interconnection architecture model, the design objective of each embodiment of the invention is to search for an automatic layout mode, and realize standardized layout of each gateway node and each routing node included in the interconnection system in a set layout space.
Example 1
Fig. 2 is a flowchart of an automated layout method of an interconnection system according to an embodiment of the present invention, where the embodiment is applicable to a situation of performing automated layout on an interconnection system on the premise of defining an interconnection relationship in the interconnection system. The method may be performed by an automated layout apparatus of an interconnect system, which may be implemented in hardware and/or software, which may be configured in an electronic device having data processing functions, such as a terminal or a server, etc. As shown in fig. 2, the method includes:
s210, acquiring a first connection relation between each routing node and a second connection relation between each gateway node and adjacent routing nodes in the interconnection system to be drawn.
In this embodiment, the connection relationships between the routing nodes and the ingress and egress nodes in the interconnection system to be drawn need to be predefined.
Alternatively, the shapes may be defined first by the chip developer as: the data form of the entrance node 1- > route node 3- > route node 4- > exit node 9 is multiple interconnection paths, and by analyzing the multiple interconnection paths, a first connection relationship between each route node and a second connection relationship between each entrance node and an adjacent route node in the interconnection system can be obtained.
The first connection relationship may be used to define a connection relationship between every two routing nodes, for example, routing node 1- > routing node 3, routing node 3- > routing node 4, and so on.
It should be noted that each routing node actually includes one or more master ports and one or more slave ports. When all routing nodes together forward the request, the request is transmitted from the main port of one routing node A to the auxiliary port of the other routing node B, and then the routing node B forwards the request to the auxiliary port of the next routing node C through the main port of the routing node B. Thus, the connection relationship between routing nodes actually involves the connection between the master and slave ports. However, in practical application, when the master port of one routing node is connected to the slave port of another routing node, the slave port of the routing node is also connected to the master port of the other routing node. Further, for the sake of simplicity of operation, it can be understood that when there is a connection relationship between two routing nodes, there is a bidirectional connection relationship between the master port and the slave port between the two routing nodes.
Wherein the second connection relationship may be used to define a connection relationship between the ingress node and the neighboring routing node, and between the egress node and the neighboring routing node, for example: ingress node 1- > route node 1, and route node 4- > egress node 9. It will be appreciated that there is only a unidirectional connection between the ingress node and the adjacent routing node, and the egress node and the adjacent routing node.
Accordingly, in an optional implementation manner of this embodiment, obtaining a first connection relationship between each routing node and a second connection relationship between each ingress node and an adjacent routing node in the interconnection system to be drawn may include:
obtaining a plurality of pre-constructed interconnection paths, wherein each interconnection path comprises an inlet node, at least one routing node and an outlet node which are sequentially connected; extracting a connection relation between at least one routing node in each interconnection path to form a first connection relation; and extracting the connection relation between the inlet node and the adjacent routing node and the connection relation between the outlet node and the adjacent routing node in each interconnection path to form a second connection relation.
Through the arrangement, only a plurality of interconnection paths predefined by a developer and meeting design requirements are obtained, so that first connection relations among routing nodes in the interconnection system and second connection relations among access nodes and adjacent routing nodes can be conveniently and accurately carded, and efficient and available data preparation is provided for subsequent automatic layout of the interconnection system.
S220, according to the first connection relation, determining initial route coordinates of each route node in the layout space.
The layout space is understood to be the carrier that carries the entire interconnect system in real physical space. It can be understood that each routing node, each access node's arrangement space and routing space. In order to represent the layout of each routing node and each ingress node in the layout space, it is necessary to finally determine the position coordinates of each routing node and each ingress node in the layout space.
In this embodiment, the routing nodes may be laid out first, and the ingress and egress nodes may be laid out later, so as to implement an automated layout of the interconnection system.
The initial routing coordinates may be position coordinates that are initialized in the layout space for each routing node. Each routing node corresponds to an initial routing coordinate.
Specifically, the initial routing coordinates of each routing node in the layout space may be determined by performing a close layout on each routing node having a connection relationship according to the first connection relationship, or the initial routing coordinates of each routing node in the layout space may be determined by performing a fine adjustment on the first connection relationship after each routing node is randomly laid out in the layout space, which is not limited in this embodiment.
S230, identifying each routing ring in the interconnection system according to the first connection relation, and adjusting the initial routing coordinates of each routing node in the routing ring into standard routing coordinates according to the standard ring model.
In this embodiment, the routing ring may be defined as a set of all routing nodes included in a minimum route that starts from one routing node and does not go through repeated round trips, and finally returns to the own routing node.
In a specific example, the form is as follows: the route of the route node A- > route node B- > route node C- > route node B- > route node A is a route repeatedly going and going, and the route is formed by the following steps: the route of the route node A- > route node B- > route node C- > route node D- > route node A is a route which does not repeatedly go and return.
It can be understood that, in order to realize the optimal presentation mode of the two-dimensional plane interconnection visualization, the goal of determining the automatic layout is to horizontally and vertically place each routing node and draw the interconnection relation of each routing node in the two-dimensional plane. Thus, the topology of the interconnect system will be formed of a plurality of rectangular (square or oblong) minimum cells and their derivative combinations.
To achieve the above objective, a ring structure, i.e., a routing ring, that does not repeatedly traverse may be first identified in the interconnect system. And then, mapping the layout mode of each routing loop according to a standard loop pattern of horizontal, horizontal and vertical so as to meet the goal of automatic layout.
In particular, a standard circular pattern is understood to be a horizontal, flat and vertical annular structure, and each standard circular pattern comprises a plurality of standard pattern nodes connected end to end. In which a schematic structure of a standard circular pattern corresponding to a different number of standard pattern nodes is shown in fig. 3. In a specific example, if one routing ring in the interconnection system is routing node 1- > routing node 2- > routing node 3- > routing node 4, the position coordinates of the four routing nodes, that is, the initial routing coordinates, may be distributed at any position in the layout space. By selecting any one of the 4-node standard circular pattern 1 or the 4-node standard circular pattern 2 for coordinate optimization in the structural diagram shown in fig. 3, the four routing nodes can be adjusted from the initial routing coordinates to the standard routing coordinates of horizontal and vertical.
Alternatively, a fixed point location may be first determined in the layout space, and then one routing node selected from all routing nodes included in the interconnection system is mapped to the fixed point location. After the position coordinates of one routing node are fixed, the coordinate position of each routing node can be adjusted in sequence based on the fixed relative position relation among different routing nodes in each standard circular form.
S240, according to the second connection relation, determining the entrance coordinates of each entrance node in the layout space, and planning the connection paths between each entrance node and the adjacent routing nodes.
In this embodiment, after the positions of the routing nodes in the internet in the layout space are fixed, the gateway nodes may be further laid out in the layout space according to a preset gateway node layout rule, taking into account the fixed connection relationship (i.e., the second connection relationship) between the gateway nodes and the adjacent routing nodes.
Optionally, the gate node layout rule may be preset according to an actual chip design requirement, for example, may include: the ingress and egress nodes are distributed outside the routing network formed by all the routing nodes, and the ingress and egress nodes are as close to the connected routing nodes and ingress nodes as possible, or the routing nodes are compactly arranged in the layout space as much as possible, which is not limited in this embodiment.
After determining the entrance and exit coordinates of each entrance node in the layout space, the connection path between each entrance node and the adjacent routing node can be planned and obtained according to the position coordinates of each entrance node in the layout space and the position coordinates of the routing node adjacent to each entrance node in the layout space.
It can be understood that after the fixed layout of each ingress and egress node is completed, in combination with a preset wiring mode in the layout space, a situation that no reachable path exists between the ingress and egress node and the adjacent routing node may occur, and at this time, all or part of the ingress and egress nodes or all or part of the routing nodes in the layout space need to be moved in a horizontal or vertical direction according to the positional relationship between the ingress and egress node and the adjacent routing node, so as to finally complete the planning of the connection path between each ingress and egress node and the adjacent routing node.
S250, drawing a topological graph of the interconnection system in a layout space according to the first connection relation, the standard routing coordinates, the entrance and exit coordinates and the connection paths.
In this embodiment, after the route coordinates and the entrance coordinates are determined, each route node and each entrance node may be fixedly disposed in the layout space, and then, in combination with the first connection relationship, a connection relationship between every two route nodes may be established, and finally, by drawing each connection path, a connection relationship between an entrance node and an adjacent route node may be established. After the drawing of the whole content is completed, a topological graph of the interconnection system can be finally obtained.
According to the technical scheme, the first connection relation between each routing node in the interconnection system to be drawn and the second connection relation between each gateway node and the adjacent routing node are obtained; determining initial route coordinates of each route node in a layout space according to the first connection relation; according to the first connection relation, identifying each routing ring in the interconnection system, and adjusting the initial routing coordinates of each routing node in the routing ring into standard routing coordinates according to a standard circular model; determining the entrance and exit coordinates of each entrance and exit node in the layout space according to the second connection relation, and planning the connection path between each entrance and exit node and the adjacent routing node; according to the technical means of drawing the topological graph of the interconnection system in the layout space according to the first connection relation, the standard routing coordinates, the access coordinates and the connection paths, the accurate, reasonable and standardized interconnection system layout can be automatically generated on the premise that only the interconnection relation definition of the interconnection system is obtained, so that the layout time of the interconnection system is greatly saved, and meanwhile, the automatic layout technology can start the performance analysis of the interconnection system in the conceptual design stage of the chip without waiting for a logic verification stage or a silicon chip verification stage, so that the development efficiency of the chip is further improved.
Example two
Fig. 4 is a flowchart of an automated layout method of an interconnection system according to a second embodiment of the present invention, where in this embodiment, an operation of determining initial routing coordinates of each routing node in a layout space according to a first connection relationship is refined. As shown in fig. 4, the method includes:
s410, acquiring a first connection relation between each routing node and a second connection relation between each gateway node and adjacent routing nodes in the interconnection system to be drawn.
S420, according to the first connection relation, calling a graph data processing tool, and randomly arranging the routing nodes in the layout space to obtain random routing coordinates of the routing nodes in the layout space.
The graph data processing tool may be a python open source yworks library or a networkX library, etc. By inputting the first connection relation among the routing nodes in the interconnection system into the graph data processing tool, the routing nodes can be randomly laid out in the layout space, and the random routing coordinates of the routing nodes in the layout space can be obtained.
A schematic diagram of random placement of routing nodes in a placement space is shown in fig. 5. As shown in fig. 5, boxes represent routing nodes, characters in the middle of the boxes represent identifications (typically, node names) of the routing nodes, and arrows represent connection relationships between the routing nodes. Obviously, the placement of the current routing nodes is irregular, the positions of the routing nodes are randomly distributed, and if the random routing coordinates are directly used for carrying out subsequent coordinate standardization processing, the calculated amount is large.
Furthermore, in this embodiment, the random routing coordinates may be first preprocessed to a certain extent, so that the relative distances between the routing nodes are homogenized, so that the routing nodes are uniformly distributed in the layout space.
S430, according to the first connection relation, carrying out overall rotation and relative distance homogenization on random route coordinates of each route node to obtain initial route coordinates of each route node in a layout space.
The objective of the overall rotation process is to make the overall distribution trend of each routing node be parallel to the coordinate axis as much as possible, so as to further reduce the calculation amount of the subsequent relative distance homogenization process. The purpose of the relative distance homogenization process is to make the relative distances between the two routing nodes as close as possible to reduce the amount of computation for the subsequent process of computing canonical routing coordinates.
Specifically, a person skilled in the art may select an appropriate image processing algorithm according to the actual situation to process each random routing coordinate so as to meet the above-mentioned design objective, which is not limited in this embodiment.
In an optional implementation manner of this embodiment, as shown in fig. 6, according to the first connection relationship, the overall rotation and the relative distance homogenization processing are performed on the random routing coordinates of each routing node, so that the manner of obtaining the initial routing coordinates of each routing node in the layout space may be:
S610, calculating the total rotation angle according to the random route coordinates of all the route nodes and the total number of the route nodes in the interconnection system.
Alternatively, the formula may be based on:the overall rotation angle θ is calculated.
Wherein N is the total number of routing nodes in the interconnection system.For the abscissa in the random routing coordinates of the ith routing node, +.>Is the ordinate in the random routing coordinates of the i-th routing node. />The summation starting point of the summation symbol is the first routing node, and the summation end point is the Nth routing node.
S620, according to the overall rotation angle, the random route coordinates of each route node are adjusted to be rotation route coordinates.
Alternatively, the formula may be based on:the random route coordinates of the ith route node are (+.>,/>) Adjusted to rotate the routing coordinates (+)>,/>)。
S630, according to the first connection relation and each rotary route coordinate, obtaining the relative distance between every two route nodes with the connection relation, and according to each relative distance and the total number of connections between the route nodes, calculating the standard relative distance.
The total number of connections between routing nodes can be understood as the total number of non-repeated routing node pairs with connection relation in each routing node of the interconnection system. For example, if the interconnection system includes: the routing node 1, the routing node 2, the routing node 3 and the routing node 4 are arranged, the routing node 1 and the routing node 2 are connected, the routing node 2 and the routing node 3 are connected, the routing node 3 and the routing node 4 are connected, and the total number of connections between the routing nodes is 3.
Alternatively, the formula may be based on:and calculating to obtain a standard relative distance r.
Where M is the total number of connections between routing nodes. The random route coordinates are%,/>) Is (+_a) with random routing coordinates>,/>) Has a connection relationship between the routing nodes. />The summer is used for calculating the summation of the relative distances between every two routing nodes with connection relations.
And S640, adjusting the rotation route coordinate of each route node to an initial route coordinate according to the standard relative distance.
Alternatively, the formula may be based on:routing the rotational routing coordinates of the routing node (++>) Is adjusted to (+>,/>)。
Fig. 7 is a schematic diagram of a random layout of routing nodes after the relative distance homogenization process. As can be seen from comparing the routing node distribution diagrams in fig. 7 and 5, the initial routing coordinates of each routing node after the relative distance homogenization processing are arranged in the layout space according to the relative distances which tend to be uniform.
S440, identifying each routing loop in the interconnection system according to the first connection relation, and adjusting the initial routing coordinates of each routing node in the routing loop into standard routing coordinates according to the standard loop paradigm.
S450, determining the entrance and exit coordinates of each entrance and exit node in the layout space according to the second connection relation, and planning the connection path between each entrance and exit node and the adjacent routing node.
And S460, drawing a topological graph of the interconnection system in a layout space according to the first connection relation, the standard routing coordinates, the entrance coordinates and the connection paths.
According to the technical scheme, according to the first connection relation, a graph data processing tool is called, each routing node is randomly arranged in a layout space, and random routing coordinates of each routing node in the layout space are obtained; according to the first connection relation, the random route coordinates of each route node are subjected to overall rotation and relative distance homogenization treatment to obtain the initial route coordinates of each route node in the layout space, the initial route coordinates of each route node can be controlled to be distributed in the layout space according to the relative distances which tend to be consistent, the calculation amount for regulating the subsequent standard route coordinates can be greatly saved, and the realization efficiency of the automatic layout of the interconnection system can be effectively improved.
Example III
Fig. 8 is a flowchart of an automated layout method of an interconnection system according to a third embodiment of the present invention. In this embodiment, each routing ring in the interconnection system is identified according to the first connection relationship, and the initial routing coordinates of each routing node in the routing ring are refined in a manner of adjusting the initial routing coordinates to the canonical routing coordinates according to the standard circular paradigm.
Accordingly, as shown in fig. 8, the method specifically may include:
s810, acquiring a first connection relation between each routing node and a second connection relation between each gateway node and adjacent routing nodes in the interconnection system to be drawn.
S820, according to the first connection relation, determining the initial route coordinates of each route node in the layout space.
S830, the current processing node is sequentially obtained from all the routing nodes, and at least one routing ring matched with the current processing node is generated according to the neighbor node sets respectively corresponding to each routing node.
Each routing ring is composed of a plurality of non-repeated routing nodes, and each adjacent routing node and each head-to-tail routing node are connected with each other; the number of routing nodes included in each routing ring is within a set number range.
Wherein the neighbor node set of one routing node is the set of all routing nodes having a connection relationship with the routing node.
As described above, in order to perform the horizontal-vertical normalization processing on each routing node, it is necessary to first obtain, from all routing nodes, each routing node set that can be used to form a normalized rectangular ring. Therefore, the routing ring obtained finally cannot include a duplicate node, and if the routing ring includes a duplicate node, the routing ring cannot form a rectangular ring, and only a certain row or a certain column in the topology map is possible. This type of routing ring needs to be excluded and furthermore the number of routing nodes comprised in the routing ring cannot be too small nor too large, needs to lie within a set number range, e.g. [4,6].
The reason for this is that if the number of routing nodes included in a routing ring is too small, for example, 2 or 3, the routing ring cannot form a normalized rectangular ring that is horizontally and vertically, and therefore, it needs to be discarded, and if the number of routing nodes included in a routing ring is too large, the number of standard ring patterns corresponding to the number of routing nodes is also increased sharply, and effective normalized mapping cannot be performed. In practical application, the number of the most routing nodes included in the routing ring can be determined by self-definition according to an actual chip design index, and the embodiment is not limited to this.
In an optional implementation manner of this embodiment, generating at least one routing ring matched with the current processing node according to the neighbor node set corresponding to each routing node respectively may include:
adding the current processing node into the empty set to obtain a current processing ring corresponding to the current processing node;
sequentially acquiring current neighbor nodes in a current neighbor node set matched with the current processing node;
if the current neighbor node is consistent with the first routing node in the current processing ring, detecting whether the number of the routing nodes contained in the current processing ring is greater than or equal to a first number threshold: if yes, determining the current processing ring as a routing ring; otherwise, selecting the next neighbor node to continue the flow;
If the current neighbor node is not the first routing node in the current processing ring, adding the current neighbor node into the current processing ring when the current processing ring does not contain the current neighbor node and the number of the routing nodes contained in the current processing ring is smaller than or equal to a second number threshold, and returning to execute the operation of acquiring the current neighbor node in the current neighbor node set matched with the current processing node after taking the current neighbor node as a new current processing node;
if the current neighbor node is not the first routing node in the current processing ring, the current neighbor node is contained in the current processing ring, or the current processing ring is discarded when the number of the routing nodes contained in the current processing ring is larger than a second number threshold;
and returning to execute the operation of adding the current processing node into the empty set to obtain one current processing ring corresponding to the current processing node until the whole traversal process of the current processing node is completed.
By traversing all routing nodes using the above-described loop process, one or more routing loops meeting routing loop definition requirements may be obtained for one or more routing nodes.
S840, detecting whether each routing ring generated at present contains all routing nodes: if yes, executing S850; otherwise, execution returns to S830.
After each time all routing loops corresponding to one routing node are acquired, it can be detected whether all routing nodes in the interconnection system are contained in each routing loop which is generated currently. The reason for this is that the routing nodes included in different routing loops may overlap, so long as each routing node is guaranteed to appear in one routing loop, the subsequent normalization process can be implemented, and at this time, the above-mentioned traversal process can be ended.
S850, performing intersection calculation on every two routing loops, and deleting the second routing loop when the intersection between the first routing loop and the second routing loop is the first routing loop.
In this embodiment, a situation may occur in which one routing ring is a proper subset of another routing ring, for example, routing ring 1 contains { routing node a, routing node B, routing node C, and routing node D }, and routing ring 2 contains { routing node a, routing node B, routing node C, routing node E, routing node F, and routing node D }, which indicates that routing ring 2 is a larger ring that completely contains routing ring 1, and the difficulty in normalizing routing ring 1 is lower than normalizing routing ring 2, and routing ring 2 may be deleted directly from all routing rings.
It should be noted that there may be an extreme case that, after the deletion of one or the second routing ring is completed, all the routing nodes are not included in the currently existing routing rings, at this point, S830 may be re-executed until all the routing nodes in the interconnection system are included in the currently existing routing rings, and no inclusion relationship exists between the routing rings.
S860, determining a target routing node according to the initial routing coordinates of the routing nodes and the position coordinates of the target fixed point in the layout space, and obtaining a target routing ring containing the target routing node.
In this embodiment, in order to implement normalization processing of route coordinates, it is necessary to first determine a canonical route coordinate of one of the route nodes in the layout space, and then, by taking the position coordinate as a starting point and combining a fixed position relationship between the standard normal form nodes in the standard circular normal form, it is possible to successively derive canonical route coordinates of all the route nodes.
The target fixed point in the layout space may be preset according to practical situations, for example, one corner point in the layout space, for example, the upper left corner or the lower left corner, etc.
Correspondingly, after determining the target fixed point in the layout space, a routing node closest to the target fixed point can be selected as a target routing node according to the initial routing coordinates of all routing nodes in the layout space, and the target routing node is mapped to the target positioning position. That is, the initialization enables the initial routing coordinates of the target routing node to be adjusted to canonical routing coordinates.
After the mapping of the target routing node is completed, the target routing ring containing the target routing node can be firstly obtained, and all the routing nodes which are contained in the target routing ring and are not mapped are mapped according to a standard ring model.
S870, acquiring a target standard ring pattern matched with the target routing ring in all standard ring patterns.
In this embodiment, a plurality of standard patterns as shown in fig. 3 may be constructed in advance, and different standard patterns have the same or different numbers of standard pattern nodes.
After the target routing ring is acquired, one or more alternative circular norms, of which the second number value of the included standard norms is matched with the first number value, can be screened out from the plurality of standard circular norms according to the first number value of the routing nodes included in the target routing ring.
If the number of candidate circular patterns is one, the candidate circular pattern may be directly used as the target standard circular pattern, and if the number of candidate circular patterns is a plurality of candidate circular patterns, the target standard circular pattern may be selected from the plurality of candidate circular patterns according to a set selection algorithm. The selection algorithm may be a random selection algorithm, or a shortest adjustment distance selection algorithm, which is not limited in this embodiment.
In an optional implementation manner of this embodiment, in all standard norms, obtaining a target standard norms matched with the target routing ring may include:
acquiring at least two alternative circular patterns from all standard circular patterns according to the number of routing nodes included in a target routing ring; acquiring the standard route coordinates of each alternative circular pattern in the layout space according to the adjusted nodes currently existing in the layout space; respectively calculating the approximation degree between the initial route coordinates of each unadjusted route node in the target route ring and the standard route coordinates of each standard form node matched in each alternative form; and determining a target standard circular pattern in the alternative circular patterns according to the approximation degree calculation result.
The adjusted nodes are routing nodes for finishing standard routing coordinate adjustment in all routing nodes of the interconnection system. It will be appreciated that after an alternative torus pattern corresponding to the target torus is obtained, the mapping relationship between each routing node in the target torus and each standard torus pattern node in the alternative torus pattern is also uniquely specified. At this time, the coordinates of the standard pattern nodes corresponding to the adjusted nodes in the layout space are also uniquely determined, and at this time, the coordinates of other standard pattern nodes included in the alternative circular pattern in the layout space are also uniquely determined accordingly.
When the coordinates of each routing node in the target routing ring and the coordinates of each standard pattern node in each alternative pattern are known, the approximation degree between the target routing ring and each alternative pattern can be calculated, and then, the closest alternative pattern can be selected as the target standard pattern. At this time, the initial route coordinates are adjusted to the canonical route coordinates with minimal adjustment costs.
S880, according to the standard route coordinates of each standard form node in the target standard form in the layout space and the corresponding relation between each route node in the target route ring and each standard form node, the initial route coordinates of each route node in the target route ring are adjusted to the standard route coordinates.
S890, each routing node which completes the standard routing coordinate adjustment is identified as an adjusted node, and a new target routing ring containing at least one adjusted node is obtained.
S8100, judging whether to adjust the initial route coordinates of all route nodes to the standard route coordinates: if yes, executing S8110; otherwise, execution returns to S870.
Fig. 9 is a schematic diagram illustrating an initial route coordinate of each routing node after being adjusted to a standard route coordinate. As shown in fig. 9, each routing ring formed by each routing node in the interconnection system is disposed horizontally and vertically in the layout space according to the standard circular pattern layout manner.
And S8110, determining the entrance coordinates of each entrance node in the layout space according to the second connection relation, and planning the connection path between each entrance node and the adjacent routing node.
And S8120, drawing a topological graph of the interconnection system in a layout space according to the first connection relation, the standard routing coordinates, the entrance and exit coordinates and the connection paths.
According to the technical scheme provided by the embodiment of the invention, after each routing ring in the interconnection system is identified according to the preset traversal algorithm, the routing nodes can be conveniently and efficiently subjected to standardized layout in the layout space by selecting the standard circular pattern corresponding to each routing ring and adjusting the initial routing coordinates of the routing nodes in the routing ring into the implementation mode of the standardized routing coordinates according to the standard circular pattern.
Example IV
Fig. 10 is a flowchart of an automated layout method of an interconnection system according to a fourth embodiment of the present invention. The present embodiment is based on the above embodiments, and in the present embodiment, the operation of "determining the coordinates of the gateway in the layout space for each gateway node based on the second connection relationship, and planning the connection path between each gateway node and the adjacent routing node" is embodied.
Accordingly, as shown in fig. 10, the method specifically may include:
s1010, acquiring a first connection relation between each routing node and a second connection relation between each gateway node and adjacent routing nodes in the interconnection system to be drawn.
S1020, according to the first connection relation, determining the initial route coordinates of each route node in the layout space.
S1030, identifying each routing ring in the interconnection system according to the first connection relation, and adjusting the initial routing coordinates of each routing node in the routing ring into standard routing coordinates according to the standard ring model.
S1040, according to the second connection relation, the current access node and the current adjacent route node matched with the current access node are obtained.
In this embodiment, a specific implementation of how to determine the coordinates of the current gateway node in the layout space will be described by taking a current gateway node as an example.
S1050, calculating the optimal relative position relationship between the current gateway node and the current adjacent routing node through a preset cost function.
The cost function is constructed by taking whether the current access node is positioned in a routing node array formed by all routing nodes, whether a direct connection path exists between the current access node and the current adjacent routing node or not and the relative distance between the current access node and the current adjacent routing node as parameters.
In this embodiment, a matching cost function may be defined according to a preset ingress node layout rule, so as to maximally satisfy the rule that ingress nodes are distributed on the outside of a routing network formed by all routing nodes, where the ingress nodes are as close to the connected routing nodes as possible, and where the ingress nodes or the routing nodes are compactly arranged in the layout space as possible.
Alternatively, the cost function cost may be defined as:
wherein, the liquid crystal display device comprises a liquid crystal display device,and->Abs () is an absolute value calculation function for the relative abscissa and relative ordinate between the current ingress and egress node and the current neighboring routing node.
And->Are all preset binary functions, +. >For constraining ingress and egress nodes to be located as outside as possible of a routing network composed of all routing nodes. />For constraining between ingress and egress nodes and connected routing nodesAs many reachable paths as possible exist.
S1060, calculating to obtain the entrance and exit coordinates of the current entrance and exit node in the layout space according to the relative position relation and the standard route coordinates of the current adjacent route nodes.
S1070, according to the second connection relation, the current access node and the current adjacent route node matched with the current access node are obtained.
S1080, according to the standard route coordinates of each route node in the layout space, a plurality of paths pointed to the current adjacent route node by the current access node are obtained in the layout space, and the number of the interception point pairs included in each path is calculated respectively.
Wherein the connection between each pair of cut-off points is an unreachable road section in the layout space.
In this embodiment, it is considered that even after the optimal layout is performed on each ingress node according to the cost function, there is a case where there is no reachable path between the ingress node and the adjacent routing node. In order to avoid the above situation in the final topology map, it is necessary to plan the connection paths between each ingress and egress node and the adjacent routing nodes.
Accordingly, for each current ingress node, it is necessary to first verify whether an reachable path exists between the current ingress node and the neighboring routing node. If the path exists, the reachable path can be directly used as a connection path, and if the reachable path does not exist, the layout result which is finished at present needs to be subjected to fine tuning optimization again.
In this embodiment, whether a path is an reachable path may be measured by the number of pairs of cut-off points included in the path.
A schematic diagram of a pair of cut-off points to which embodiments of the present invention are applicable is shown in fig. 11. As shown in fig. 11, the box is a layout position of a routing node or an ingress node, and the position cannot be routed. Assuming that the ingress node is a and the adjacent routing node is B, one path formed by a- > B is an unreachable path, because in the path, a- > B cannot be directly communicated, and further (a, B) can be understood as a pair of interception points.
S1090, acquiring a target path with the least number of cut points in all paths.
S1100, detecting whether a target path comprises a cut-off point pair or not: if not, executing S1110; if yes, then execution proceeds to S1120.
S1110, taking the target path as a connection path between the current gateway node and the current gateway node, and executing S1150.
S1120, according to the positions of the pair of the cut-off points in the layout space, an adjustment area and an adjustment mode respectively corresponding to each cut-off point are determined in the layout space, and S1130 is executed.
In an optional implementation manner of this embodiment, determining, in the layout space, an adjustment area and an adjustment manner corresponding to each of the pair of cutoff points according to the positions of the pair of cutoff points in the layout space may include:
sequentially acquiring target cutoff point pairs from all cutoff point pairs, and acquiring midpoints of connecting lines of two cutoff points in the target cutoff point pairs; according to the position of the midpoint in the layout space and the standard routing coordinates of each routing node, the number of routing nodes included in the upper side, the lower side, the left side and the right side areas of the midpoint is calculated respectively; and acquiring a side area with the least number of routing nodes as an adjustment area of the target cut-off point pair, and determining an adjustment mode of the target cut-off point pair according to the type of the adjustment area.
Specifically, after determining the position of the midpoint of the connecting line between two cutoff points in the target cutoff point pair, a horizontal line passing through the midpoint may be drawn, and the layout space may be divided into two areas of upper side and lower side by using the horizontal line, and simultaneously, a vertical line passing through the midpoint may be continuously drawn, and the layout space may be divided into two areas of left side and right side by using the vertical line. Further, a side area with the smallest number of routing nodes can be determined as an adjustment area of the target intercept point pair.
Wherein the types of the adjustment areas include: the upper side, the lower side, the left side and the right side are respectively provided with different adjustment areas, and the types of the different adjustment areas correspond to different adjustment modes, for example, if the adjustment area is the upper side, the adjustment mode is to move all nodes (including routing nodes and gateway nodes) included in the upper side upwards by one row, and if the adjustment area is the left side, the adjustment mode is to move all nodes included in the left side leftwards by one row.
S1130, for each interception point pair, according to the adjustment mode of the interception point pair, performing horizontal or vertical translation on all adjustment route nodes and adjustment access nodes with the standard route coordinates falling into the adjustment area of the interception point pair so as to update the standard route coordinates of each adjustment route node and each adjustment access node, and executing S1140.
S1140, judging whether the connection path between the current gateway node and the current gateway node is successfully determined: if yes, go to S1150; otherwise, execution returns to S1080.
S1150, whether the processing on all the gateway nodes is completed is judged, if yes, S1160 is executed, and S1070 is executed back.
S1160, drawing a topological graph of the interconnection system in the layout space according to the first connection relation, the standard routing coordinates, the entrance coordinates and the connection paths.
In this embodiment, when the topology map is drawn, the boxes may be used to represent routing nodes or ingress nodes that need to be laid out, and the boxes with different colors may be used to distinguish different types of nodes. In order to distinguish between the multiple path lines (directional arrows), it is necessary to shift the paths by a proper amount, and to shift the paths according to the positions of the start point and the end point. The specific translation mode is not limited in this embodiment.
Optionally, drawing a topology map of the interconnection system in the layout space according to the first connection relationship, each canonical route coordinate, each gateway coordinate, and each connection path may include:
drawing each routing node and each gateway node in a layout space according to each standard routing coordinate and each gateway coordinate; drawing path connecting lines between the routing nodes and the access nodes in the layout space according to the first connection relation and each connection path; and performing offset processing on each path connecting line according to a preset offset function to obtain a topological graph of the interconnection system.
By way of example, a schematic diagram of an interconnection system topology resulting from an automated layout is shown in fig. 12.
According to the technical scheme, the first connection relation between each routing node in the interconnection system to be drawn and the second connection relation between each gateway node and the adjacent routing node are obtained; determining initial route coordinates of each route node in a layout space according to the first connection relation; according to the first connection relation, identifying each routing ring in the interconnection system, and adjusting the initial routing coordinates of each routing node in the routing ring into standard routing coordinates according to a standard circular model; determining the entrance and exit coordinates of each entrance and exit node in the layout space according to the second connection relation, and planning the connection path between each entrance and exit node and the adjacent routing node; according to the technical means of drawing the topological graph of the interconnection system in the layout space according to the first connection relation, the standard routing coordinates, the access coordinates and the connection paths, the accurate, reasonable and standardized interconnection system layout can be automatically generated on the premise that only the interconnection relation definition of the interconnection system is obtained, so that the layout time of the interconnection system is greatly saved, and meanwhile, the automatic layout technology can start the performance analysis of the interconnection system in the conceptual design stage of the chip without waiting for a logic verification stage or a silicon chip verification stage, so that the development efficiency of the chip is further improved.
Example five
Fig. 13 is a schematic structural diagram of an automated layout apparatus for an interconnection system according to a fifth embodiment of the present invention. As shown in fig. 13, the apparatus includes: a connection relationship acquisition module 1310, an initial routing coordinate determination module 1320, a canonical routing coordinate adjustment module 1330, a connection path planning module 1340, and a topology drawing module 1350, wherein:
a connection relationship obtaining module 1310, configured to obtain a first connection relationship between each routing node and a second connection relationship between each gateway node and an adjacent routing node in the interconnection system to be drawn;
an initial route coordinate determining module 1320, configured to determine, according to the first connection relationship, an initial route coordinate of each routing node in the layout space;
the standard route coordinate adjusting module 1330 is configured to identify each route ring in the interconnection system according to the first connection relationship, and adjust the initial route coordinate of each route node in the route ring to a standard route coordinate according to the standard circular pattern;
a connection path planning module 1340, configured to determine the coordinates of the gateway nodes in the layout space according to the second connection relationship, and plan the connection paths between the gateway nodes and the adjacent routing nodes;
The topology drawing module 1350 is configured to draw a topology of the interconnection system in the layout space according to the first connection relationship, each canonical routing coordinate, each ingress and egress coordinate, and each connection path.
According to the technical scheme, the first connection relation between each routing node in the interconnection system to be drawn and the second connection relation between each gateway node and the adjacent routing node are obtained; determining initial route coordinates of each route node in a layout space according to the first connection relation; according to the first connection relation, identifying each routing ring in the interconnection system, and adjusting the initial routing coordinates of each routing node in the routing ring into standard routing coordinates according to a standard circular model; determining the entrance and exit coordinates of each entrance and exit node in the layout space according to the second connection relation, and planning the connection path between each entrance and exit node and the adjacent routing node; according to the technical means of drawing the topological graph of the interconnection system in the layout space according to the first connection relation, the standard routing coordinates, the access coordinates and the connection paths, the accurate, reasonable and standardized interconnection system layout can be automatically generated on the premise that only the interconnection relation definition of the interconnection system is obtained, so that the layout time of the interconnection system is greatly saved, and meanwhile, the automatic layout technology can start the performance analysis of the interconnection system in the conceptual design stage of the chip without waiting for a logic verification stage or a silicon chip verification stage, so that the development efficiency of the chip is further improved.
Based on the above embodiments, the connection relationship obtaining module 1310 may be configured to:
obtaining a plurality of pre-constructed interconnection paths, wherein each interconnection path comprises an inlet node, at least one routing node and an outlet node which are sequentially connected;
extracting a connection relation between at least one routing node in each interconnection path to form a first connection relation;
and extracting the connection relation between the inlet node and the adjacent routing node and the connection relation between the outlet node and the adjacent routing node in each interconnection path to form a second connection relation.
Based on the above embodiments, the initial routing coordinate determination module 1320 may include:
the random route coordinate generation unit is used for calling a graph data processing tool according to the first connection relation, and randomly arranging the route nodes in the layout space to obtain random route coordinates of the route nodes in the layout space;
and the coordinate processing unit is used for carrying out overall rotation and relative distance homogenization processing on the random routing coordinates of each routing node according to the first connection relation to obtain the initial routing coordinates of each routing node in the layout space.
On the basis of the above embodiments, the coordinate processing unit may be specifically configured to:
Calculating the total rotation angle according to the random route coordinates of all the route nodes and the total number of the route nodes in the interconnection system;
according to the total rotation angle, the random route coordinates of each route node are adjusted to be rotation route coordinates;
according to the first connection relation and each rotary route coordinate, obtaining the relative distance between every two route nodes with the connection relation, and calculating the standard relative distance according to each relative distance and the total number of connections between the route nodes;
and adjusting the rotation route coordinate of each route node to be an initial route coordinate according to the standard relative distance.
Based on the above embodiments, the canonical routing coordinate adjustment module 1330 may be specifically configured to:
sequentially acquiring current processing nodes from all routing nodes, and generating at least one routing ring matched with the current processing nodes according to neighbor node sets respectively corresponding to each routing node;
each routing ring is composed of a plurality of non-repeated routing nodes, and each adjacent routing node and each head-to-tail routing node are connected with each other; the number of routing nodes included in each routing ring is within a set number range;
Returning to execute the operation of sequentially acquiring the current processing nodes from all the routing nodes until all the routing nodes are contained in each routing ring generated currently;
and performing intersection calculation between every two routing loops, and deleting the second routing loop when the intersection between the first routing loop and the second routing loop is the first routing loop.
Based on the above embodiments, the canonical routing coordinate adjustment module 1330 may be further specifically configured to:
adding the current processing node into the empty set to obtain a current processing ring corresponding to the current processing node;
sequentially acquiring current neighbor nodes in a current neighbor node set matched with the current processing node;
if the current neighbor node is consistent with the first routing node in the current processing ring, detecting whether the number of the routing nodes contained in the current processing ring is greater than or equal to a first number threshold: if yes, determining the current processing ring as a routing ring; otherwise, selecting the next neighbor node to continue the flow;
if the current neighbor node is not the first routing node in the current processing ring, adding the current neighbor node into the current processing ring when the current processing ring does not contain the current neighbor node and the number of the routing nodes contained in the current processing ring is smaller than or equal to a second number threshold, and returning to execute the operation of acquiring the current neighbor node in the current neighbor node set matched with the current processing node after taking the current neighbor node as a new current processing node;
If the current neighbor node is not the first routing node in the current processing ring, the current neighbor node is contained in the current processing ring, or the current processing ring is discarded when the number of the routing nodes contained in the current processing ring is larger than a second number threshold;
and returning to execute the operation of adding the current processing node into the empty set to obtain one current processing ring corresponding to the current processing node until the whole traversal process of the current processing node is completed.
Based on the above embodiments, the canonical routing coordinate adjustment module 1330 may be specifically configured to:
determining a target routing node according to the initial routing coordinates of each routing node and the position coordinates of the target fixed point in the layout space, and acquiring a target routing ring containing the target routing node;
in all standard circular patterns, acquiring a target standard circular pattern matched with a target routing ring;
according to the standard route coordinates of each standard normal form node in the target standard normal form in the layout space and the corresponding relation between each route node in the target route ring and each standard normal form node, the initial route coordinates of each route node in the target route ring are adjusted to the standard route coordinates;
Marking each routing node with the standard routing coordinate adjustment as an adjusted node, and acquiring a new target routing ring containing at least one adjusted node;
and returning to the operation of acquiring the target standard circular form matched with the target routing loop in all the standard circular forms until the initial routing coordinates of all the routing nodes are adjusted to the standard routing coordinates.
Based on the above embodiments, the canonical routing coordinate adjustment module 1330 may be further specifically configured to:
acquiring at least two alternative circular patterns from all standard circular patterns according to the number of routing nodes included in a target routing ring;
acquiring the standard route coordinates of each alternative circular pattern in the layout space according to the adjusted nodes currently existing in the layout space;
respectively calculating the approximation degree between the initial route coordinates of each unadjusted route node in the target route ring and the standard route coordinates of each standard form node matched in each alternative form;
and determining a target standard circular pattern in the alternative circular patterns according to the approximation degree calculation result.
Based on the above embodiments, the connection path planning module 1340 may be specifically configured to:
Acquiring a current access node and a current adjacent routing node matched with the current access node according to the second connection relation;
calculating the optimal relative position relation between the current gateway node and the current adjacent routing node through a preset cost function;
the cost function is obtained by constructing parameters of whether the current access node is positioned in a routing node array formed by all routing nodes, whether a direct connection path exists between the current access node and the current adjacent routing node and the relative distance between the current access node and the current adjacent routing node;
and calculating to obtain the entrance and exit coordinates of the current entrance and exit node in the layout space according to the relative position relation and the standard route coordinates of the current adjacent route nodes.
Based on the above embodiments, the connection path planning module 1340 may be specifically configured to:
acquiring a current access node and a current adjacent routing node matched with the current access node according to the second connection relation;
according to the standard route coordinates of each route node in the layout space, a plurality of paths pointed to the current adjacent route node by the current access node are obtained in the layout space, and the number of the interception point pairs included in each path is calculated respectively; the connection line between each cut-off point pair is an unreachable road section in the layout space;
In all paths, acquiring a target path with the least number of cut-off points;
if the target path does not comprise the cut-off point pair, the target path is used as a connection path between the current access node and the current access node;
if the target path comprises at least one cut-off point pair, determining an adjustment area and an adjustment mode corresponding to each cut-off point pair in the layout space according to the position of the cut-off point pair in the layout space;
aiming at each cut-off point pair, according to the adjustment mode of the cut-off point pair, carrying out horizontal or vertical translation on all adjustment route nodes and adjustment access nodes with standard route coordinates falling into an adjustment area of the cut-off point pair so as to update the adjustment route nodes and the standard route coordinates of the adjustment access nodes;
and returning to execute the operation of acquiring a plurality of paths pointed to the current adjacent routing node by the current access node in the layout space according to the standard routing coordinates of each routing node in the layout space until the connection path between the current access node and the current access node is successfully determined.
Based on the above embodiments, the connection path planning module 1340 may be further specifically configured to:
Sequentially acquiring target cutoff point pairs from all cutoff point pairs, and acquiring midpoints of connecting lines of two cutoff points in the target cutoff point pairs;
according to the position of the midpoint in the layout space and the standard routing coordinates of each routing node, the number of routing nodes included in the upper side, the lower side, the left side and the right side areas of the midpoint is calculated respectively;
and acquiring a side area with the least number of routing nodes as an adjustment area of the target cut-off point pair, and determining an adjustment mode of the target cut-off point pair according to the type of the adjustment area.
Based on the above embodiments, the topology drawing module 1350 may be specifically configured to:
drawing each routing node and each gateway node in a layout space according to each standard routing coordinate and each gateway coordinate;
drawing path connecting lines between the routing nodes and the access nodes in the layout space according to the first connection relation and each connection path;
and performing offset processing on each path connecting line according to a preset offset function to obtain a topological graph of the interconnection system.
The automatic layout device of the interconnection system provided by the embodiment of the invention can execute the automatic layout method of the interconnection system provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.
Example six
Fig. 14 shows a schematic diagram of the structure of an electronic device 10 that may be used to implement an embodiment of the present invention. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. Electronic equipment may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.
As shown in fig. 14, the electronic device 10 includes at least one processor 11, and a memory such as a Read Only Memory (ROM) 12, a Random Access Memory (RAM) 13, etc., communicatively connected to the at least one processor 11, wherein the memory stores a computer program executable by the at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the Read Only Memory (ROM) 12 or the computer program loaded from the storage unit 18 into the Random Access Memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 may also be stored. The processor 11, the ROM 12 and the RAM 13 are connected to each other via a bus 14. An input/output (I/O) interface 15 is also connected to bus 14.
Various components in the electronic device 10 are connected to the I/O interface 15, including: an input unit 16 such as a keyboard, a mouse, etc.; an output unit 17 such as various types of displays, speakers, and the like; a storage unit 18 such as a magnetic disk, an optical disk, or the like; and a communication unit 19 such as a network card, modem, wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunication networks.
The processor 11 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, digital Signal Processors (DSPs), and any suitable processor, controller, microcontroller, etc. The processor 11 performs the various methods and processes described above, such as an automated layout method of an interconnect system, including:
acquiring a first connection relation between each routing node and a second connection relation between each access node and adjacent routing nodes in an interconnection system to be drawn;
Determining initial route coordinates of each route node in a layout space according to the first connection relation;
according to the first connection relation, identifying each routing ring in the interconnection system, and adjusting the initial routing coordinates of each routing node in the routing ring into standard routing coordinates according to a standard circular model;
determining the entrance and exit coordinates of each entrance and exit node in the layout space according to the second connection relation, and planning the connection path between each entrance and exit node and the adjacent routing node;
and drawing a topological graph of the interconnection system in the layout space according to the first connection relation, the standard routing coordinates, the access coordinates and the connection paths.
In some embodiments, an automated layout method of an interconnect system may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 10 via the ROM 12 and/or the communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of an automated layout method of an interconnect system as described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform an automated layout method of the interconnect system in any other suitable manner (e.g., by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which a user can provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.
The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.

Claims (14)

1. An automated layout method of an interconnection system, comprising:
acquiring a first connection relation between each routing node and a second connection relation between each access node and adjacent routing nodes in an interconnection system to be drawn;
determining initial route coordinates of each route node in a layout space according to the first connection relation;
according to the neighbor node set of each routing node determined by the first connection relation, each routing ring in the interconnection system is identified, after the target standard circular pattern corresponding to each routing ring is determined in all standard circular patterns, the initial routing coordinates of each routing node in the routing ring are adjusted to the standard routing coordinates of each standard normal pattern node in the target standard circular pattern in the layout space;
Each routing ring is composed of a plurality of non-repeated routing nodes, and each adjacent routing node and each head-to-tail routing node are connected with each other; the number of routing nodes included in each routing ring is within a set number range; deleting the second routing ring when the intersection between the first routing ring and the second routing ring in each routing ring is the first routing ring;
determining the entrance and exit coordinates of each entrance node in the layout space according to the second connection relation and a preset cost function, and planning the connection path between each entrance node and the adjacent routing node;
the cost function is used for determining the optimal relative position relation between each gateway node and the adjacent routing node;
drawing a topological graph of the interconnection system in a layout space according to the first connection relation, the standard routing coordinates, the entrance coordinates and the connection paths;
after determining the target standard circular pattern corresponding to each routing ring in all the standard circular patterns, adjusting the initial routing coordinates of each routing node in the routing ring to the standard routing coordinates of each standard circular pattern node in the target standard circular pattern in the layout space, including:
Determining a target routing node according to the initial routing coordinates of each routing node and the position coordinates of the target fixed point in the layout space, and acquiring a target routing ring containing the target routing node;
in all standard circular patterns, acquiring a target standard circular pattern matched with a target routing ring;
according to the standard route coordinates of each standard normal form node in the target standard normal form in the layout space and the corresponding relation between each route node in the target route ring and each standard normal form node, the initial route coordinates of each route node in the target route ring are adjusted to the standard route coordinates;
marking each routing node with the standard routing coordinate adjustment as an adjusted node, and acquiring a new target routing ring containing at least one adjusted node;
and returning to the operation of acquiring the target standard circular form matched with the target routing loop in all the standard circular forms until the initial routing coordinates of all the routing nodes are adjusted to the standard routing coordinates.
2. The method of claim 1, wherein obtaining a first connection relationship between each routing node and a second connection relationship between each ingress node and an adjacent routing node in the interconnection system to be drawn comprises:
Obtaining a plurality of pre-constructed interconnection paths, wherein each interconnection path comprises an inlet node, at least one routing node and an outlet node which are sequentially connected;
extracting a connection relation between at least one routing node in each interconnection path to form a first connection relation;
and extracting the connection relation between the inlet node and the adjacent routing node and the connection relation between the outlet node and the adjacent routing node in each interconnection path to form a second connection relation.
3. The method of claim 1, wherein determining initial routing coordinates of each routing node in the layout space based on the first connection relationship comprises:
according to the first connection relation, calling a graph data processing tool, and randomly arranging each routing node in a layout space to obtain random routing coordinates of each routing node in the layout space;
and according to the first connection relation, carrying out overall rotation and relative distance homogenization on the random routing coordinates of each routing node to obtain the initial routing coordinates of each routing node in the layout space.
4. A method according to claim 3, wherein performing overall rotation and relative distance homogenization on random routing coordinates of each routing node according to the first connection relationship to obtain initial routing coordinates of each routing node in the layout space comprises:
Calculating the total rotation angle according to the random route coordinates of all the route nodes and the total number of the route nodes in the interconnection system;
according to the total rotation angle, the random route coordinates of each route node are adjusted to be rotation route coordinates;
according to the first connection relation and each rotary route coordinate, obtaining the relative distance between every two route nodes with the connection relation, and calculating the standard relative distance according to each relative distance and the total number of connections between the route nodes;
and adjusting the rotation route coordinate of each route node to be an initial route coordinate according to the standard relative distance.
5. The method of claim 1, wherein identifying routing loops in the interconnection system based on the set of neighbor nodes for each routing node determined by the first connection relationship comprises:
sequentially acquiring current processing nodes from all routing nodes, and generating at least one routing ring matched with the current processing nodes according to neighbor node sets respectively corresponding to each routing node;
returning to execute the operation of sequentially acquiring the current processing nodes from all the routing nodes until all the routing nodes are contained in each routing ring generated currently;
And performing intersection calculation between every two routing loops, and deleting the second routing loop when the intersection between the first routing loop and the second routing loop is the first routing loop.
6. The method of claim 5, wherein generating at least one routing loop that matches the current processing node from the set of neighbor nodes corresponding to each routing node, respectively, comprises:
adding the current processing node into the empty set to obtain a current processing ring corresponding to the current processing node;
sequentially acquiring current neighbor nodes in a current neighbor node set matched with the current processing node;
if the current neighbor node is consistent with the first routing node in the current processing ring, detecting whether the number of the routing nodes contained in the current processing ring is greater than or equal to a first number threshold: if yes, determining the current processing ring as a routing ring; otherwise, selecting the next neighbor node to continue the flow;
if the current neighbor node is not the first routing node in the current processing ring, adding the current neighbor node into the current processing ring when the current processing ring does not contain the current neighbor node and the number of the routing nodes contained in the current processing ring is smaller than or equal to a second number threshold, and returning to execute the operation of acquiring the current neighbor node in the current neighbor node set matched with the current processing node after taking the current neighbor node as a new current processing node;
If the current neighbor node is not the first routing node in the current processing ring, the current neighbor node is contained in the current processing ring, or the current processing ring is discarded when the number of the routing nodes contained in the current processing ring is larger than a second number threshold;
and returning to execute the operation of adding the current processing node into the empty set to obtain one current processing ring corresponding to the current processing node until the whole traversal process of the current processing node is completed.
7. The method of claim 1, wherein obtaining a target standard pattern matching the target routing ring from all standard patterns comprises:
acquiring at least two alternative circular patterns from all standard circular patterns according to the number of routing nodes included in a target routing ring;
acquiring the standard route coordinates of each alternative circular pattern in the layout space according to the adjusted nodes currently existing in the layout space;
respectively calculating the approximation degree between the initial route coordinates of each unadjusted route node in the target route ring and the standard route coordinates of each standard form node matched in each alternative form;
and determining a target standard circular pattern in the alternative circular patterns according to the approximation degree calculation result.
8. The method of claim 1, wherein determining the gateway coordinates of each gateway node in the layout space according to the second connection relationship and the predetermined cost function comprises:
acquiring a current access node and a current adjacent routing node matched with the current access node according to the second connection relation;
calculating the optimal relative position relation between the current gateway node and the current adjacent routing node through a preset cost function;
the cost function is obtained by constructing parameters of whether the current access node is positioned in a routing node array formed by all routing nodes, whether a direct connection path exists between the current access node and the current adjacent routing node and the relative distance between the current access node and the current adjacent routing node;
and calculating to obtain the entrance and exit coordinates of the current entrance and exit node in the layout space according to the relative position relation and the standard route coordinates of the current adjacent route nodes.
9. The method of claim 1, wherein planning the connection path between each ingress node and an adjacent routing node comprises:
acquiring a current access node and a current adjacent routing node matched with the current access node according to the second connection relation;
According to the standard route coordinates of each route node in the layout space, a plurality of paths pointed to the current adjacent route node by the current access node are obtained in the layout space, and the number of the interception point pairs included in each path is calculated respectively; the connection line between each cut-off point pair is an unreachable road section in the layout space;
in all paths, acquiring a target path with the least number of cut-off points;
if the target path does not comprise the cut-off point pair, the target path is used as a connection path between the current access node and the current access node;
if the target path comprises at least one cut-off point pair, determining an adjustment area and an adjustment mode corresponding to each cut-off point pair in the layout space according to the position of the cut-off point pair in the layout space;
aiming at each cut-off point pair, according to the adjustment mode of the cut-off point pair, carrying out horizontal or vertical translation on all adjustment route nodes and adjustment access nodes with standard route coordinates falling into an adjustment area of the cut-off point pair so as to update the adjustment route nodes and the standard route coordinates of the adjustment access nodes;
and returning to execute the operation of acquiring a plurality of paths pointed to the current adjacent routing node by the current access node in the layout space according to the standard routing coordinates of each routing node in the layout space until the connection path between the current access node and the current access node is successfully determined.
10. The method of claim 9, wherein determining an adjustment region and an adjustment mode corresponding to each of the pair of cutoff points in the layout space based on the positions of the pair of cutoff points in the layout space, respectively, comprises:
sequentially acquiring target cutoff point pairs from all cutoff point pairs, and acquiring midpoints of connecting lines of two cutoff points in the target cutoff point pairs;
according to the position of the midpoint in the layout space and the standard routing coordinates of each routing node, the number of routing nodes included in the upper side, the lower side, the left side and the right side areas of the midpoint is calculated respectively;
and acquiring a side area with the least number of routing nodes as an adjustment area of the target cut-off point pair, and determining an adjustment mode of the target cut-off point pair according to the type of the adjustment area.
11. The method according to any one of claims 1-10, wherein drawing a topology of the interconnected system in the layout space based on the first connection relationship, the canonical routing coordinates, the ingress and egress coordinates, and the connection paths comprises:
drawing each routing node and each gateway node in a layout space according to each standard routing coordinate and each gateway coordinate;
Drawing path connecting lines between the routing nodes and the access nodes in the layout space according to the first connection relation and each connection path;
and performing offset processing on each path connecting line according to a preset offset function to obtain a topological graph of the interconnection system.
12. An automated placement device for an interconnect system, comprising:
the connection relation acquisition module is used for acquiring a first connection relation between each routing node and a second connection relation between each gateway node and the adjacent routing node in the interconnection system to be drawn;
the initial route coordinate determining module is used for determining the initial route coordinate of each route node in the layout space according to the first connection relation;
the standard route coordinate adjustment module is used for identifying each route ring in the interconnection system according to the neighbor node set of each route node determined by the first connection relation, and adjusting the initial route coordinate of each route node in the route ring to the standard route coordinate of each standard form node in the target standard form in the layout space after determining the target standard form corresponding to each route ring in all the standard forms;
Each routing ring is composed of a plurality of non-repeated routing nodes, and each adjacent routing node and each head-to-tail routing node are connected with each other; the number of routing nodes included in each routing ring is within a set number range; deleting the second routing ring when the intersection between the first routing ring and the second routing ring in each routing ring is the first routing ring;
the connection path planning module is used for determining the entrance and exit coordinates of each entrance node in the layout space according to the second connection relation and a preset cost function, and planning the connection path between each entrance node and the adjacent routing node;
the cost function is used for determining the optimal relative position relation between each gateway node and the adjacent routing node;
the topology drawing module is used for drawing a topology drawing of the interconnection system in the layout space according to the first connection relation, the standard routing coordinates, the entrance coordinates and the connection paths;
the standard routing coordinate adjustment module is specifically configured to:
determining a target routing node according to the initial routing coordinates of each routing node and the position coordinates of the target fixed point in the layout space, and acquiring a target routing ring containing the target routing node;
In all standard circular patterns, acquiring a target standard circular pattern matched with a target routing ring;
according to the standard route coordinates of each standard normal form node in the target standard normal form in the layout space and the corresponding relation between each route node in the target route ring and each standard normal form node, the initial route coordinates of each route node in the target route ring are adjusted to the standard route coordinates;
marking each routing node with the standard routing coordinate adjustment as an adjusted node, and acquiring a new target routing ring containing at least one adjusted node;
and returning to the operation of acquiring the target standard circular form matched with the target routing loop in all the standard circular forms until the initial routing coordinates of all the routing nodes are adjusted to the standard routing coordinates.
13. An electronic device, the electronic device comprising:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein, the liquid crystal display device comprises a liquid crystal display device,
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the automated layout method of an interconnect system of any of claims 1-11.
14. A computer readable storage medium storing computer instructions for causing a processor to perform the automated layout method of an interconnection system of any of claims 1-11.
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