CN116401114A - Mainboard debugging system, method and device, storage medium and computer equipment - Google Patents
Mainboard debugging system, method and device, storage medium and computer equipment Download PDFInfo
- Publication number
- CN116401114A CN116401114A CN202310674610.9A CN202310674610A CN116401114A CN 116401114 A CN116401114 A CN 116401114A CN 202310674610 A CN202310674610 A CN 202310674610A CN 116401114 A CN116401114 A CN 116401114A
- Authority
- CN
- China
- Prior art keywords
- debugging
- main board
- singlechip
- debug
- mainboard
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 41
- 238000004891 communication Methods 0.000 claims abstract description 64
- 230000005540 biological transmission Effects 0.000 claims description 14
- 239000004973 liquid crystal related substance Substances 0.000 claims description 3
- 230000000875 corresponding effect Effects 0.000 description 18
- 238000012545 processing Methods 0.000 description 10
- 238000010586 diagram Methods 0.000 description 8
- 238000012423 maintenance Methods 0.000 description 7
- 230000001276 controlling effect Effects 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 210000001503 joint Anatomy 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 230000009471 action Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000010295 mobile communication Methods 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/273—Tester hardware, i.e. output processing circuits
- G06F11/2733—Test interface between tester and unit under test
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
The invention discloses a mainboard debugging system, a mainboard debugging method, a mainboard debugging device, a mainboard debugging storage medium and computer equipment. Wherein, this system includes: the system comprises a singlechip, a singlechip sending channel, a singlechip receiving channel, a plurality of main board communication switches, a debugging panel interface and a plurality of main board interfaces; the debugging panel interfaces are used for accessing the debugging panel, the debugging panel is used for debugging the main board, the plurality of main board interfaces are used for accessing the main board, and the working language of the main board is different from that of the singlechip; the singlechip is connected with the interface of the debugging panel through a singlechip sending channel and a singlechip receiving channel respectively, and is used for responding to the instruction sent by the debugging panel to control the opening and closing states of the plurality of main board communication switches; the plurality of main board communication switches correspond to the plurality of main board interfaces, and the plurality of main board communication switches are respectively positioned between the corresponding main board interfaces and the debugging panel interfaces. The invention solves the technical problem of low efficiency caused by repeated manual plugging when debugging a plurality of mainboards in the server.
Description
Technical Field
The present invention relates to the field of device operation and maintenance, and in particular, to a system, a method, an apparatus, a storage medium, and a computer device for debugging a motherboard.
Background
In the related art, some rack-mounted network security devices or network cluster computers generally include a plurality of mainboards, where each of the mainboards has a dedicated serial port for control or debug, which is called a debug serial port or a reduce port, and the debug and control of the mainboards can be achieved by inputting a command of the linux operating system through the serial port. The debugging serial port is usually converted into an RS232 level which is led out to a debugging panel directly interacted with by operation and maintenance personnel through an RJ45 interface.
Because the network security device or similar server contains a plurality of mainboards, the debugging serial port of each mainboard occupies a large amount of space of the front panel of the device, for example, 4-8 debugging serial ports of a 4U rack-mounted server device generally need to be led out to the front panel, and after one mainboard in the rack-mounted device is debugged, an operation and maintenance person needs to lift up to pull out a debugging line before the device and insert the debugging line into the next mainboard to debug the next mainboard, which is very troublesome and can not carry out remote debugging.
In view of the above problems, no effective solution has been proposed at present.
Disclosure of Invention
The embodiment of the invention provides a mainboard debugging system, a method, a device, a storage medium and computer equipment, which at least solve the technical problem of low efficiency caused by repeated manual plug when a plurality of mainboards in a server are debugged.
According to an aspect of an embodiment of the present invention, there is provided a motherboard debugging system, including: the system comprises a singlechip, a singlechip sending channel, a singlechip receiving channel, a plurality of main board communication switches, a debugging panel interface and a plurality of main board interfaces; the debugging panel interfaces are used for accessing a debugging panel, the debugging panel is used for debugging a main board, the plurality of main board interfaces are used for accessing the main board, and the working language of the main board is different from that of the singlechip; the singlechip is connected with the interface of the debugging panel through the singlechip sending channel and the singlechip receiving channel respectively, and is used for responding to the instruction sent by the debugging panel to control the opening and closing states of the plurality of main board communication switches; the plurality of main board communication switches correspond to the plurality of main board interfaces, and the plurality of main board communication switches are respectively positioned between the corresponding main board interfaces and the debugging panel interfaces.
Optionally, the plurality of motherboard communication switches includes: the main board sending channel switch and the main board receiving channel switch are in one-to-one correspondence.
Optionally, the system further comprises: the main communication switch is positioned on the single chip microcomputer transmission channel, a first end of the main communication switch is connected with the single chip microcomputer, and a second end of the main communication switch is connected with the plurality of main board communication switches.
Optionally, the system further comprises a debug panel, and the debug panel interface is an RJ45 interface.
Optionally, the system further comprises a TTL-to-RS 232 chip, wherein the TTL-to-RS 232 chip is located between the singlechip and the debugging panel interface.
According to another aspect of the embodiment of the present invention, there is also provided a motherboard debugging method, including: a debug starting instruction is sent to any one of the main board debugging systems, wherein the debug starting instruction is used for indicating the object to be debugged as a target main board, and a singlechip in the main board debugging system responds to the debug starting instruction and sends a closing instruction to a target main board communication switch corresponding to the target main board in a plurality of main board communication switches; and sending debugging data to the target mainboard through the mainboard debugging system, and receiving a debugging result returned by the target mainboard through the mainboard debugging system.
Optionally, the method further comprises: transmitting a debugging query instruction to the main board debugging system, wherein the debugging query instruction is used for indicating the singlechip to keep the plurality of main board communication switches in a disconnected state and indicating the singlechip to feed back the information of the main board currently debugged by the main board debugging system through a single chip transmission channel; and receiving the information of the current debugged mainboard returned by the singlechip.
According to another aspect of the embodiment of the present invention, there is also provided a motherboard debugging device, including: the system comprises a transmitting module, a target mainboard communication switch and a target mainboard communication switch, wherein the transmitting module is used for transmitting a debugging starting instruction to any mainboard debugging system, the debugging starting instruction is used for indicating the object to be debugged as a target mainboard, and a singlechip in the mainboard debugging system responds to the debugging starting instruction and transmits a closing instruction to the target mainboard communication switch corresponding to the target mainboard in a plurality of mainboard communication switches; the debugging module is used for sending debugging data to the target mainboard through the mainboard debugging system and receiving a debugging result returned by the target mainboard through the mainboard debugging system.
According to still another aspect of the embodiments of the present invention, there is further provided a nonvolatile storage medium, where the nonvolatile storage medium includes a stored program, and when the program runs, the device in which the nonvolatile storage medium is controlled to execute any one of the above-mentioned motherboard debugging methods.
According to still another aspect of the embodiment of the present invention, there is further provided a computer device, where the computer device includes a memory and a processor, the memory is configured to store a program, and the processor is configured to execute the program stored in the memory, where the program executes any one of the above-mentioned motherboard debugging methods.
In the embodiment of the invention, the mainboard debugging system comprising the singlechip, the singlechip sending channel, the singlechip receiving channel, the plurality of mainboard communication switches, the debugging panel interface and the plurality of mainboard interfaces is adopted, and the plurality of mainboards are uniformly connected into the mainboard debugging system and respectively communicated with the debugging panel, so that the purposes of sequentially debugging the plurality of mainboards automatically without manually plugging and unplugging debugging joints are achieved, the technical effect of improving the working efficiency when the plurality of mainboards of the server are debugged is realized, and the technical problem of low efficiency caused by manually and repeatedly plugging and unplugging the plurality of mainboards in the server is solved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiments of the invention and together with the description serve to explain the invention and do not constitute a limitation on the invention. In the drawings:
FIG. 1 is a block diagram of a motherboard debug system provided in accordance with an embodiment of the present invention;
FIG. 2 is a schematic diagram of a motherboard debug system according to an alternative embodiment of the present invention;
FIG. 3 is a block diagram showing the hardware configuration of a computer terminal for implementing a motherboard debugging method;
fig. 4 is a flow chart of a motherboard debugging method according to an embodiment of the present invention;
fig. 5 is a block diagram of a motherboard debugging device according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
One network security device typically has one to more motherboards, which are used for reasons of improving device performance and reliability. In large data centers or high load environments, a single motherboard may not meet demand, and thus multiple motherboards are required for distributed computing and load balancing.
Each main board comprises a CPU, a memory, a network card and other basic hardware components, and operates an operating system and related application programs to realize specific functions. These boards are connected by interconnect technology (e.g., PCI Express) and appear to be one entity at the operating system level, but in practice they can work independently and together to accomplish tasks. In this way, the reliability is improved while the performance of the device is ensured, and if a certain part of the device fails, the whole operation is not affected.
It should be noted that, in the network security device, other types of coprocessors (such as FPGA, ASIC, etc.) may be used to accelerate specific operations (such as encryption and decryption), so as to further improve the device efficiency and throughput.
In order to solve the problem that an operation and maintenance person needs to plug a debugging line of a main board debugging serial port for many times when debugging network security equipment, the invention provides a main board debugging system for improving the debugging efficiency of a server main board, and fig. 1 is a structural block diagram of the main board debugging system provided according to an embodiment of the invention, as shown in fig. 1, the main board debugging system comprises: the system comprises a singlechip 11, a singlechip sending channel 12, a singlechip receiving channel 13, a plurality of main board communication switches 14, a debugging panel interface 15 and a plurality of main board interfaces 16; the debugging panel interfaces are used for being connected with the debugging panel, the debugging panel is used for debugging the main board, the plurality of main board interfaces are used for being connected with the main board, and the working language of the main board is different from that of the singlechip; the singlechip is connected with the interface of the debugging panel through a singlechip sending channel and a singlechip receiving channel respectively, and is used for responding to the instruction sent by the debugging panel to control the opening and closing states of the plurality of main board communication switches; the plurality of main board communication switches correspond to the plurality of main board interfaces, and the plurality of main board communication switches are respectively positioned between the corresponding main board interfaces and the debugging panel interfaces.
Alternatively, the motherboard debug system may be used to debug a network security device comprising multiple motherboards, or other rack-mounted server devices having multiple motherboards, network clustered computers, and the like. A plurality of mainboards in the network safety equipment can be led out of a debugging line through a debugging serial port and are connected into a mainboard interface of a main board debugging system, so that the butt joint of the mainboards and the main board debugging system provided by the invention is realized. The main board debugging system can be in butt joint with a debugging panel through a debugging interface, and the debugging panel can be directly controlled by operation and maintenance personnel. Furthermore, operation and maintenance personnel can debug a plurality of mainboards of the network safety equipment through the debugging panel and the mainboard debugging system without repeatedly plugging and unplugging debugging lines, so that the mainboard debugging efficiency is greatly improved.
It should be noted that, the plurality of motherboard communication switches 14 may be analog switches, and the singlechip may control the on/off states of the analog switches in the motherboard debugging system by sending control instructions. The singlechip transmission channel can be connected with a transmission serial port (serial port TX) of the singlechip, and the singlechip receiving channel can be connected with a receiving serial port (serial port RX) of the singlechip, and is respectively used for transmitting data to the debugging panel or receiving data from the debugging panel by the singlechip. The singlechip and the main board can work by adopting different programming languages, so that when the debugging panel sends out an instruction for controlling the singlechip to work or an instruction for controlling the main board to debug, the singlechip and the main board cannot be interfered with each other. For example, the debugging working language of the main board is linux, and the working language of the singlechip is not linux but other languages, so that even if the working instruction sent to the singlechip is transmitted to the main board, the main board cannot analyze the working instruction, and therefore the working instruction cannot be adversely affected; similarly, the linux instruction of the debugging main board can not cause the singlechip to generate error action.
As an optional embodiment, the main board debug system may further include a main communication switch, where the main communication switch is located on a sending channel of the single-chip microcomputer, and a first end of the main communication switch is connected to the single-chip microcomputer, and a second end of the main communication switch is connected to the plurality of main board communication switches. By setting the main communication switch, the transmission channels of signals and data in the main board debugging system can be controlled more flexibly, and working errors caused by transmission of error signals to an error serial port are avoided.
As an alternative embodiment, the plurality of main board communication switches may include a main board transmission channel switch and a main board reception channel switch, wherein the main board transmission channel switch and the main board reception channel switch are in one-to-one correspondence. Optionally, for the motherboard debug system, at least two motherboard interfaces may be provided for each motherboard accessed, where the two motherboard interfaces correspond to a motherboard transmit channel switch (SW-TX) and a motherboard receive channel switch (SW-RX), respectively. When operation and maintenance personnel wish to debug a certain mainboard, the singlechip can control the mainboard sending channel switch and the mainboard receiving channel switch corresponding to the mainboard to be closed and connected, ensure that the analog switches corresponding to other mainboards are opened, and enable the target mainboard to be connected with the debugging panel through the mainboard debugging system and start debugging work.
As an alternative embodiment, the motherboard debug system may also integrate a debug panel, and the debug panel interface may employ an RJ45 interface. Optionally, a TTL-to-RS 232 chip may be connected to the RJ45 interface of the motherboard debug system, where the TTL-to-RS 232 chip is located between the singlechip and the debug panel interface, so as to implement level conversion of signals.
Fig. 2 is a schematic structural diagram of a motherboard debug system according to an alternative embodiment of the present invention, as shown in fig. 2, in which, in a dashed frame, a single chip microcomputer controls each analog switch through a control signal, and each analog switch includes a main communication switch SW-TX0, a plurality of motherboard transmit channel switches and a plurality of motherboard receive channel switches, where the motherboard transmit channel switches are denoted by SW-TX1 to SW-TXN, and the motherboard receive channel switches are denoted by SW-RX1 to SW-RXN. The panel RJ45 represents a debugging panel, UART-RX and UART-TX respectively represent a main board interface for each main board to access a main board debugging system, UART represents a universal asynchronous receiver Transmitter (Universal Asynchronous Receiver/Transmitter), and Chinese is called a serial port for short.
According to an embodiment of the present invention, a method embodiment of motherboard debugging is provided, it should be noted that the steps shown in the flowchart of the figures may be performed in a computer system such as a set of computer executable instructions, and that although a logical order is shown in the flowchart, in some cases the steps shown or described may be performed in an order different from that shown here.
The method embodiments provided by the embodiments of the present application may be performed in a mobile terminal, a computer terminal, or similar computing device. Fig. 3 shows a block diagram of a hardware structure of a computer terminal for implementing a motherboard debugging method. As shown in fig. 3, the computer terminal 30 may include one or more (shown as processor 302a, processor 302b, … …, processor 302 n) processors (the processor may include, but is not limited to, a microprocessor MCU or a processing device such as a programmable logic device FPGA) and a memory 304 for storing data. In addition, the method may further include: a display, an input/output interface (I/O interface), a Universal Serial BUS (USB) port (which may be included as one of the ports of the BUS), a network interface, a power supply, and/or a camera. It will be appreciated by those of ordinary skill in the art that the configuration shown in fig. 3 is merely illustrative and is not intended to limit the configuration of the electronic device described above. For example, the computer terminal 30 may also include more or fewer components than shown in FIG. 3, or have a different configuration than shown in FIG. 3.
It should be noted that the one or more processors and/or other data processing circuits described above may be referred to herein generally as "data processing circuits. The data processing circuit may be embodied in whole or in part in software, hardware, firmware, or any other combination. Furthermore, the data processing circuitry may be a single stand-alone processing module or incorporated, in whole or in part, into any of the other elements in the computer terminal 30. As referred to in the embodiments of the present application, the data processing circuit acts as a processor control (e.g., selection of the path of the variable resistor termination to interface).
The memory 304 may be used to store software programs and modules of application software, such as a program instruction/data storage device corresponding to a motherboard debugging method in the embodiment of the present invention, and the processor executes the software programs and modules stored in the memory 304, thereby executing various functional applications and data processing, that is, implementing the motherboard debugging method of the application program. Memory 304 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 304 may further include memory located remotely from the processor, which may be connected to the computer terminal 30 via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The display may be, for example, a touch screen type Liquid Crystal Display (LCD) that may enable a user to interact with a user interface of the computer terminal 30.
Fig. 4 is a flowchart of a method for debugging a motherboard according to an embodiment of the present invention, as shown in fig. 4, the method includes the following steps:
step S402, a debugging starting instruction is sent to any one of the main board debugging systems, wherein the debugging starting instruction is used for indicating that a debugging object is a target main board, and a singlechip in the main board debugging system responds to the debugging starting instruction and sends a closing instruction to a target main board communication switch corresponding to the target main board in a plurality of main board communication switches;
step S404, sending debugging data to the target mainboard through the mainboard debugging system, and receiving a debugging result returned by the target mainboard through the mainboard debugging system.
Through the steps, the technical effect of improving the working efficiency when debugging a plurality of mainboards of the server can be achieved, and the technical problem that the efficiency is low due to the fact that repeated manual plugging is needed when debugging a plurality of mainboards in the server is solved.
As an alternative embodiment, the method further comprises: a debug query instruction is sent to the main board debug system, wherein the debug query instruction is used for indicating the singlechip to keep a plurality of main board communication switches in an off state and indicating the singlechip to send channel feedback information of a main board currently debugged by the main board debug system through the singlechip; and receiving the information of the current debugged mainboard returned by the singlechip.
Based on the alternative mainboard debugging system shown in fig. 2, the invention provides an alternative mainboard debugging method, and the mainboard debugging system adopted by the method comprises a plurality of analog switches with signal bandwidths larger than 200KHZ, a GD32 singlechip and a TTL-to-RS 232 level conversion chip.
Step S1, powering up the main board debugging system, and controlling all the analog switches (a plurality of main board communication switches) except the analog switch SW-TX0 (a main circuit communication switch) to be in an off state.
Step S2, starting debugging, for example, if the main board 1 is to be debugged, a specific character string "SSS_Channel_01_debug_NNN" can be input through an RJ45 serial port, the singlechip receives the character string, and after the character string is printed "Channel_0l_debug_Now|", the simulation switch SW-TX0 is opened, and the simulation switches SW-TX1 and SW-RX1 corresponding to the main board 1 are closed, so that a user can start controlling and debugging the main board 1.
Step S3, when the user wants to switch to the main board 2 for debugging, the specific character string 'SSS_Channel_02_Debug_NNN' can be input through the RJ45 serial port, the singlechip receives the character string, all the analog switches are opened, and meanwhile, the analog switch SW-TX0 is closed. After the channel_02_debug_now is printed through the serial port of the singlechip, the analog switch SW-TX0 is opened, and the analog switches SW-TX2 and SW-RX2 corresponding to the main board 2 are closed, so that a user can start to control and debug the main board 2. In this step, since the input "sss_channel_02_debug_nnn" is not a linux command, the main board 1 only prompts that the command is invalid after receiving the character string, and no other actions are performed. The command in the debugging process of the corresponding mainboard does not have corresponding actions because the command is not a characteristic character in the singlechip program. And so on, any number of mainboards can be debugged.
Step S4, when the programmer wants to know that the current debugged mainboard is the mainboard in the debugging process, the query command can be input through an RJ45 serial port, the query command can be a specific character string of SSS_Channel_Now_NNN, the singlechip receives the character string, temporarily opens all the analog switches, closes the analog switch SW-TX0, outputs the current Channel of the singlechip, then opens the analog switch SW-TX0, and controls the communication switch of the target mainboard to revert to the position of the analog switch in the past. For example, when the board 2 is debugged, the "channel_02_debug_now |" is outputted, and then the analog switch SW-TX0 is opened, and the analog switches SW-TX2 and SW-RX2 are closed.
In the above alternative embodiment, the serial printing of the character string by the single-chip microcomputer refers to outputting a segment of character sequence (i.e. character string) to a computer or other devices through the serial port of the single-chip microcomputer. This is commonly used to debug and test single chip microcomputer programs to view variable values, state information, etc. during operation. The serial port is an interface capable of transmitting data, also called UART (Universal Asynchronous Receiver/Transmitter) in a single chip microcomputer, which can send data out bit by bit and receive data from an external device. When serial ports are used for communication, parameters such as baud rate, check bit, stop bit and the like need to be set so as to ensure correct data transmission. For a singlechip, the character string to be output needs to be converted into a character array, and then each character is sent one by one through circulation. For example, in the C language, a character string may be formatted using a printf function, and then sent by a puts function or a direct loop through the character array. Of course, the corresponding hardware and software parameters also need to be configured to achieve proper transmission and reception.
It should be noted that, for simplicity of description, the foregoing method embodiments are all described as a series of acts, but it should be understood by those skilled in the art that the present invention is not limited by the order of acts described, as some steps may be performed in other orders or concurrently in accordance with the present invention. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all preferred embodiments, and that the acts and modules referred to are not necessarily required for the present invention.
From the above description of the embodiments, it will be clear to those skilled in the art that the method for debugging a motherboard according to the above embodiment may be implemented by means of software plus a necessary general hardware platform, and of course may also be implemented by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) comprising several instructions for causing a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the method of the various embodiments of the present invention.
According to an embodiment of the present invention, there is further provided a motherboard debugging device for implementing the motherboard debugging method, and fig. 5 is a block diagram of a motherboard debugging device provided according to an embodiment of the present invention, as shown in fig. 5, where the motherboard debugging device includes: the transmission module 52 and the debug module 54 will be described below.
The sending module 52 is configured to send a debug start instruction to any one of the above-mentioned motherboard debug systems, where the debug start instruction is used to indicate that the object of the present debug is a target motherboard, and a singlechip in the motherboard debug system responds to the debug start instruction to send a close instruction to a target motherboard communication switch corresponding to the target motherboard in the plurality of motherboard communication switches;
the debug module 54 is connected to the sending module 52, and is configured to send debug data to the target motherboard through the motherboard debug system, and receive a debug result returned by the target motherboard through the motherboard debug system.
Here, it should be noted that the above-mentioned transmitting module 52 and debugging module 54 correspond to step S402 to step S404 in the embodiment, and the two modules are the same as the examples and application scenarios implemented by the corresponding steps, but are not limited to the disclosure of the above-mentioned embodiment. It should be noted that the above-described module may be operated as a part of the apparatus in the computer terminal 30 provided in the embodiment.
Embodiments of the present invention may provide a computer device, optionally in this embodiment, the computer device may be located in at least one network device of a plurality of network devices of a computer network. The computer device includes a memory and a processor.
The memory may be used to store software programs and modules, such as program instructions/modules corresponding to the motherboard debugging method and apparatus in the embodiments of the present invention, and the processor executes the software programs and modules stored in the memory, thereby executing various functional applications and data processing, that is, implementing the motherboard debugging method described above. The memory may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory may further include memory remotely located relative to the processor, which may be connected to the computer terminal via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The processor may call the information and the application program stored in the memory through the transmission device to perform the following steps: a debug starting instruction is sent to any one of the main board debugging systems, wherein the debug starting instruction is used for indicating that a debug object is a target main board, and a singlechip in the main board debugging system responds to the debug starting instruction and sends a closing instruction to a target main board communication switch corresponding to the target main board in a plurality of main board communication switches; and sending debugging data to the target mainboard through the mainboard debugging system, and receiving a debugging result returned by the target mainboard through the mainboard debugging system.
Optionally, the above processor may further execute program code for: a debug query instruction is sent to the main board debug system, wherein the debug query instruction is used for indicating the singlechip to keep a plurality of main board communication switches in an off state and indicating the singlechip to send channel feedback information of a main board currently debugged by the main board debug system through the singlechip; and receiving the information of the current debugged mainboard returned by the singlechip.
Those skilled in the art will appreciate that all or part of the steps in the various methods of the above embodiments may be implemented by a program for instructing a terminal device to execute on associated hardware, the program may be stored in a non-volatile storage medium, and the storage medium may include: flash disk, read-Only Memory (ROM), random-access Memory (Random Access Memory, RAM), magnetic or optical disk, and the like.
Embodiments of the present invention also provide a nonvolatile storage medium. Alternatively, in this embodiment, the above-described nonvolatile storage medium may be used to store the program code executed by the motherboard debugging method provided in the above-described embodiment.
Alternatively, in this embodiment, the above-mentioned nonvolatile storage medium may be located in any one of the computer terminals in the computer terminal group in the computer network, or in any one of the mobile terminals in the mobile terminal group.
Optionally, in the present embodiment, the non-volatile storage medium is arranged to store program code for performing the steps of: a debug starting instruction is sent to any one of the main board debugging systems, wherein the debug starting instruction is used for indicating that a debug object is a target main board, and a singlechip in the main board debugging system responds to the debug starting instruction and sends a closing instruction to a target main board communication switch corresponding to the target main board in a plurality of main board communication switches; and sending debugging data to the target mainboard through the mainboard debugging system, and receiving a debugging result returned by the target mainboard through the mainboard debugging system.
Optionally, in the present embodiment, the non-volatile storage medium is arranged to store program code for performing the steps of: a debug query instruction is sent to the main board debug system, wherein the debug query instruction is used for indicating the singlechip to keep a plurality of main board communication switches in an off state and indicating the singlechip to send channel feedback information of a main board currently debugged by the main board debug system through the singlechip; and receiving the information of the current debugged mainboard returned by the singlechip.
The foregoing embodiment numbers of the present invention are merely for the purpose of description, and do not represent the advantages or disadvantages of the embodiments.
In the foregoing embodiments of the present invention, the descriptions of the embodiments are emphasized, and for a portion of this disclosure that is not described in detail in this embodiment, reference is made to the related descriptions of other embodiments.
In the several embodiments provided in the present application, it should be understood that the disclosed technology content may be implemented in other manners. The above-described embodiments of the apparatus are merely exemplary, and the division of units may be a logic function division, and there may be another division manner in actual implementation, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be through some interfaces, units or modules, or may be in electrical or other forms.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a non-volatile storage medium. Based on such understanding, the technical solution of the present invention may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the method of the various embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The foregoing is merely a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention, which are intended to be comprehended within the scope of the present invention.
Claims (10)
1. A motherboard debug system, comprising: the system comprises a singlechip, a singlechip sending channel, a singlechip receiving channel, a plurality of main board communication switches, a debugging panel interface and a plurality of main board interfaces; wherein, the liquid crystal display device comprises a liquid crystal display device,
the debugging panel interface is used for accessing a debugging panel, the debugging panel is used for debugging a main board, the plurality of main board interfaces are used for accessing the main board, and the working language of the main board is different from that of the singlechip;
the singlechip is connected with the interface of the debugging panel through the singlechip sending channel and the singlechip receiving channel respectively, and is used for responding to the instruction sent by the debugging panel to control the opening and closing states of the plurality of main board communication switches;
the plurality of main board communication switches correspond to the plurality of main board interfaces, and the plurality of main board communication switches are respectively positioned between the corresponding main board interfaces and the debugging panel interfaces.
2. The system of claim 1, wherein the plurality of motherboard communication switches comprises: the main board sending channel switch and the main board receiving channel switch are in one-to-one correspondence.
3. The system of claim 1, further comprising: the main communication switch is positioned on the single chip microcomputer transmission channel, a first end of the main communication switch is connected with the single chip microcomputer, and a second end of the main communication switch is connected with the plurality of main board communication switches.
4. The system of claim 1, further comprising a debug panel, the debug panel interface being an RJ45 interface.
5. The system of claim 4, further comprising a TTL to RS232 chip, wherein the TTL to RS232 chip is located between the single chip microcomputer and the debug panel interface.
6. The main board debugging method is characterized by comprising the following steps of:
a debug start instruction is sent to any one of the main board debug systems in claims 1 to 5, wherein the debug start instruction is used for indicating that the object of the present debug is a target main board, and a singlechip in the main board debug system responds to the debug start instruction and sends a closing instruction to a target main board communication switch corresponding to the target main board in a plurality of main board communication switches;
and sending debugging data to the target mainboard through the mainboard debugging system, and receiving a debugging result returned by the target mainboard through the mainboard debugging system.
7. The method as recited in claim 6, further comprising:
transmitting a debugging query instruction to the main board debugging system, wherein the debugging query instruction is used for indicating the singlechip to keep the plurality of main board communication switches in a disconnected state and indicating the singlechip to feed back the information of the main board currently debugged by the main board debugging system through a single chip transmission channel;
and receiving the information of the current debugged mainboard returned by the singlechip.
8. A motherboard debugging device, comprising:
a sending module, configured to send a debug start instruction to the motherboard debug system according to any one of claims 1 to 5, where the debug start instruction is configured to instruct a subject of the present debug to be a target motherboard, and a singlechip in the motherboard debug system responds to the debug start instruction to send a close instruction to a target motherboard communication switch corresponding to the target motherboard from a plurality of motherboard communication switches;
the debugging module is used for sending debugging data to the target mainboard through the mainboard debugging system and receiving a debugging result returned by the target mainboard through the mainboard debugging system.
9. A non-volatile storage medium, characterized in that the non-volatile storage medium comprises a stored program, wherein the device in which the non-volatile storage medium is controlled to execute the motherboard debugging method according to any one of claims 6 to 7 when the program is run.
10. A computer device, characterized in that the computer device comprises a memory for storing a program and a processor for running the program stored in the memory, wherein the program is run to perform the motherboard debugging method of any of claims 6 to 7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310674610.9A CN116401114A (en) | 2023-06-08 | 2023-06-08 | Mainboard debugging system, method and device, storage medium and computer equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310674610.9A CN116401114A (en) | 2023-06-08 | 2023-06-08 | Mainboard debugging system, method and device, storage medium and computer equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116401114A true CN116401114A (en) | 2023-07-07 |
Family
ID=87018427
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310674610.9A Pending CN116401114A (en) | 2023-06-08 | 2023-06-08 | Mainboard debugging system, method and device, storage medium and computer equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116401114A (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114038181A (en) * | 2021-10-25 | 2022-02-11 | 苏州浪潮智能科技有限公司 | Remote debugging device and server |
| CN114116364A (en) * | 2021-11-19 | 2022-03-01 | 珠海泰芯半导体有限公司 | Chip debugging method, storage medium, related device and system |
| CN115687205A (en) * | 2021-07-22 | 2023-02-03 | 北京小米移动软件有限公司 | Debugging module, terminal equipment, debugging method and device |
| CN115794702A (en) * | 2022-11-09 | 2023-03-14 | 上海遇贤微电子有限公司 | Interface switching device, server system and interface switching method |
-
2023
- 2023-06-08 CN CN202310674610.9A patent/CN116401114A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115687205A (en) * | 2021-07-22 | 2023-02-03 | 北京小米移动软件有限公司 | Debugging module, terminal equipment, debugging method and device |
| CN114038181A (en) * | 2021-10-25 | 2022-02-11 | 苏州浪潮智能科技有限公司 | Remote debugging device and server |
| CN114116364A (en) * | 2021-11-19 | 2022-03-01 | 珠海泰芯半导体有限公司 | Chip debugging method, storage medium, related device and system |
| CN115794702A (en) * | 2022-11-09 | 2023-03-14 | 上海遇贤微电子有限公司 | Interface switching device, server system and interface switching method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101853173A (en) | Software upgrading method and device of programmable logic device of distributed system | |
| US10860404B2 (en) | Server and debugging method therefor | |
| CN115794702A (en) | Interface switching device, server system and interface switching method | |
| CN107818032A (en) | A kind of mainboard, information Method of printing, system, device and storage medium | |
| CN114153782A (en) | Data processing system, method and storage medium | |
| CN102884515B (en) | Serial ports re-orientation processes method, apparatus and system | |
| CN116401114A (en) | Mainboard debugging system, method and device, storage medium and computer equipment | |
| US10445201B2 (en) | System and method for automated integration and stress testing of hardware and software service in management controller using containerized toolbox | |
| CN115794530A (en) | Hardware connection testing method, device, equipment and readable storage medium | |
| CN113760800A (en) | Serial port path selection method, system, terminal and storage medium based on BMC | |
| CN111414327A (en) | Network device | |
| CN115344105A (en) | Chip with multiplexed interfaces and debugging system of chip | |
| CN109885329B (en) | Upgrading method and system and electronic equipment | |
| CN117520234B (en) | Automatic identification circuit of Type-C interface external equipment and related equipment | |
| CN116627463A (en) | Chip upgrading method, device, equipment and medium | |
| US20020107943A1 (en) | Reset control in modular network computers | |
| CN116719712B (en) | Processor serial port log output method and device, electronic equipment and storage medium | |
| US11966309B2 (en) | Saturation of multiple PCIe slots in a server by multiple ports in a single test card | |
| CN115599191B (en) | Power-on method and power-on device of intelligent network card | |
| CN116126761A (en) | Main control system with multiple controllers sharing serial port | |
| CN114579381A (en) | Disk array remote debugging method, system, terminal and storage medium | |
| KR20200031129A (en) | Method and apparatus for initial programming of dependent computers | |
| CN116166603A (en) | Split-board type management board and communication method, device, equipment and medium thereof | |
| CN105279083A (en) | Concurrency test device and test method for performance of Web server | |
| CN116414756A (en) | External device adaptation system, method and server system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |